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Microchip Technology 25LC128-I/P
- Part No.:
- 25LC128-I/P
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
25LC128-I/P.pdf
- Description:
- IC EEPROM 128KBIT SPI 8DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,029
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Product details
Overview
25LC128-I/P from Microchip Technology Inc. is a 128 Kbit SPI Serial EEPROM with 16,384 × 8-bit organization, 64-byte page size, and industrial temperature range (–40°C to +85°C). It operates at up to 10 MHz clock frequency with 5 mA read/write current at 5.5 V and features hardware write protection via WP pin and STATUS register control. It is used in microcontroller-based systems for nonvolatile parameter storage, calibration data retention, and firmware configuration.
For engineers reviewing the 25LC128-I/P datasheet, 25LC128-I/P pinout, 25LC128-I/P application, or 25LC128-I/P equivalent, key selection considerations include its 2.5V–5.5V supply range, 5 µA standby current, AEC-Q100-qualified reliability (1M endurance, >200-year data retention), and support for HOLD/CS-controlled SPI bus arbitration in resource-constrained embedded designs.
Technical Context
The 25LC128-I/P implements a standard SPI Mode 0,0/Master-Slave interface with separate SI (data-in) and SO (data-out) lines, requiring only CS, SCK, SI, SO, WP, HOLD, VCC, and VSS. Its internal architecture includes a 64-byte page latch, HV generator for EEPROM programming, and status register with WIP, WEL, BP0/BP1, and WPEN bits for granular block protection.
Write operations require explicit WREN instruction before WRITE or WRSR commands; CS high after final data byte initiates self-timed 5 ms max internal write cycle. HOLD pin suspends ongoing SPI transfers without resetting sequence state, enabling interrupt servicing while preserving transaction context - critical for real-time microcontroller applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8-bit), directly addressable via 16-bit SPI command addressing |
| Interface | SPI-compatible serial bus (Mode 0,0), no I²C or UART compatibility |
| Max Clock Frequency | 10 MHz at VCC ≥ 4.5 V; supports 5 MHz down to 2.5 V and 3 MHz at 1.8 V minimum |
| Page Size | 64 bytes - limits contiguous writes to single physical page boundaries (0x0000–0x003F, etc.) |
| Endurance & Retention | 1,000,000 erase/write cycles and >200 years data retention at 25°C - validated for long-life industrial logging |
| Supply Voltage | 2.5 V to 5.5 V - excludes 1.8 V operation supported by 25AA128 variant |
| Temperature Range | Industrial grade: –40°C to +85°C - qualified per AEC-Q100 for automotive subsystems |
Pinout & Package
25LC128-I/P is supplied in 8-Lead PDIP (Plastic Dual In-Line Package) with 300-mil body width, through-hole mounting, and JEDEC-standard pinout. Pin 1 is marked with notch or dot; package meets RoHS compliance and includes exposed pad only in DFN variants (not applicable here).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select Input | Active-low enable: selects device for SPI communication; rising edge triggers internal write cycle after valid WRITE sequence |
| SO (Pin 2) | Serial Data Output | Tri-state open-drain output; shifts out memory data on SCK falling edge during READ; high-impedance when CS high |
| WP (Pin 3) | Write-Protect Input | Hardware lock: disables STATUS register writes when WP low and WPEN=1; does not affect array reads or byte/page writes |
| VSS (Pin 4) | Ground Reference | Primary return path for all internal circuitry and I/O drivers; must be low-impedance connection |
| SI (Pin 5) | Serial Data Input | Latches instructions, addresses, and data on SCK rising edge; accepts 8-bit opcodes (e.g., 0x03 for READ, 0x02 for WRITE) |
| SCK (Pin 6) | Serial Clock Input | Synchronizes all SPI transfers; master-generated clock with 100 ns max rise/fall time requirement |
| HOLD (Pin 7) | Hold Control Input | Pauses active SPI sequence when pulled low during SCK low phase; preserves internal state for resumed transfer |
| VCC (Pin 8) | Supply Voltage | 2.5–5.5 V power input; powers EEPROM array, logic, and I/O buffers; decoupling capacitor required near pin |
Key Features
| Feature | Design Value |
|---|---|
| Block Write Protection | Configurable via BP0/BP1 bits to protect none, upper 1/4 (0x3000–0x3FFF), upper 1/2 (0x2000–0x3FFF), or full array (0x0000–0x3FFF) |
| Self-Timed Write Cycle | Internal 5 ms max erase/write completion - eliminates need for external timing control or polling overhead |
| Power-On Write Protection | Automatic WEL reset at power-up and after each successful WRITE/WRSR/WRDI - prevents accidental writes during brownout |
| HOLD Functionality | Enables deterministic SPI bus arbitration: host can service higher-priority interrupts without losing transaction context |
| ESD Robustness | 4 kV HBM rating on all pins - ensures reliability in handling-sensitive industrial assembly environments |
Applications
| Industrial Sensor Calibration | Automotive Body Control Module |
|---|---|
Use Scenario: Storing factory-trimmed sensor offset/gain coefficients and user-adjusted thresholds in temperature/humidity sensors. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed during MCU boot or sensor initialization; SPI read occurs once per power cycle. Use Value: Eliminates need for external trimming components; enables field recalibration with verified 1M-cycle endurance and >200-year data retention. | Use Scenario: Saving seat position memory, mirror angle presets, and lighting configuration in vehicle door modules. IC Role / Device Role / Timing Role: SPI slave storing user preferences; accessed via CAN-to-SPI gateway MCU during ignition-on sequence. Use Value: AEC-Q100 qualification ensures operation across –40°C to +85°C under automotive thermal cycling; WP pin prevents corruption during ECU reset events. |
| Medical Device Parameter Storage | Smart Energy Meter Firmware Settings |
Use Scenario: Retaining dose history, alarm thresholds, and regulatory audit logs in portable infusion pumps. IC Role / Device Role / Timing Role: Secure configuration store with hardware write-protection enabled via WP pin during normal operation. Use Value: Block protection (BP0/BP1) isolates critical safety parameters from routine data logging; 5 µA standby current extends battery life. | Use Scenario: Holding tariff schedules, meter ID, and communication protocol settings in ANSI C12.22-compliant electricity meters. IC Role / Device Role / Timing Role: SPI EEPROM interfaced to 8-bit MCU for infrequent but mission-critical parameter updates over PLC or RF link. Use Value: 10 MHz SPI speed enables fast firmware reconfiguration; 64-byte page writes minimize update latency during OTA parameter sync. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25AA128-I/P | Wider 1.8–5.5 V supply range; supports 1.8 V operation not available in 25LC128-I/P | Preferred in battery-powered 1.8 V systems (e.g., wearables); not AEC-Q100 qualified | Select when lowest-voltage operation is required and automotive qualification is unnecessary |
| AT25DF041A-SSH-T | 4 Mbit density, quad SPI interface, 85 MHz max clock; no HOLD pin; different command set | Used where higher capacity and faster throughput needed; requires firmware rewrite for SPI command mapping | Choose for upgrade paths requiring >128 Kbit or quad I/O bandwidth; not drop-in compatible |
Compared with 25AA128-I/P, the 25LC128-I/P trades 1.8 V support for AEC-Q100 qualification and tighter VCC min (2.5 V), making it suitable for automotive and industrial mains-powered systems; versus AT25DF041A-SSH-T, it offers simpler SPI-00 interface and HOLD functionality at lower density and speed.
Availability
25LC128-I/P is available at Aetrix Electronics and suitable for industrial sensor calibration, automotive body control modules, medical device parameter storage, and smart energy meter firmware settings requiring stable component supply and long-term lifecycle assurance.
Supply support for 25LC128-I/P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 25LC128 belongs to Microchip's serial EEPROM product line, engineered for reliable nonvolatile data storage in cost-sensitive, space-constrained embedded systems requiring SPI interface simplicity and industrial-grade robustness.
FAQ
What is the maximum clock frequency supported by the 25LC128-I/P?
The 25LC128-I/P supports up to 10 MHz SPI clock frequency when VCC is 4.5 V to 5.5 V. At 2.5 V ≤ VCC < 4.5 V, maximum clock is 5 MHz; below 2.5 V, it drops to 3 MHz. These limits are defined in Table 1-2 AC Characteristics and ensure reliable setup/hold timing across voltage and temperature ranges. The 25LC128-I/P does not support 1.8 V operation - that capability is exclusive to the 25AA128 variant.
Does the 25LC128-I/P have built-in write protection, and how is it configured?
Yes, the 25LC128-I/P provides dual-layer write protection: hardware-level via the WP pin (active-low, enabled when WPEN bit = 1), and software-configurable block protection via BP0/BP1 bits in the STATUS register. BP0/BP1 allow protection of none, upper 1/4, upper 1/2, or the entire 128 Kbit array. The WP pin only affects STATUS register writes - not memory array writes - unless WPEN is set. This configuration is retained across power cycles.
What package type is used for the 25LC128-I/P, and what does the 'P' suffix indicate?
The 'P' suffix in 25LC128-I/P denotes the 8-Lead Plastic Dual In-Line Package (PDIP) with 300-mil body width. This through-hole package has standard JEDEC pinout, is lead (Pb)-free and RoHS compliant, and is intended for prototyping, legacy board designs, and applications requiring manual soldering or socketing. It is distinct from SOIC (SN), TSSOP (ST), or DFN (MF) variants which share identical electrical functionality but differ in footprint and mounting method.
How does the HOLD pin function during an active SPI transaction on the 25LC128-I/P?
The HOLD pin on the 25LC128-I/P suspends an ongoing SPI sequence without resetting internal state. To activate HOLD, the pin must be pulled low while SCK is low; doing so places SI, SCK, and SO in high-impedance states and ignores further input transitions except CS. Resuming requires bringing HOLD high while SCK remains low. This allows the host MCU to service time-critical interrupts and resume exactly where the transaction paused - a key advantage over full reinitialization required by simpler EEPROMs.
Is the 25LC128-I/P qualified for automotive applications, and what does the 'I' temperature grade signify?
Yes, the 25LC128-I/P is AEC-Q100 qualified for automotive applications. The 'I' in the part number indicates Industrial temperature grade (–40°C to +85°C), which satisfies the thermal requirements for passenger compartment and engine bay-adjacent ECUs. This qualification includes stress testing for reliability, endurance, and data retention under automotive environmental conditions - confirmed in Microchip's DS20001831F datasheet section "Temperature Ranges" and "Automotive AEC-Q100 Qualified" feature listing.
25LC128-I/P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
25LC128-I/P FAQ
1.How can I place an order for 25LC128-I/P through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC128-I/P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC128-I/P reliable?
The price and inventory of 25LC128-I/P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC128-I/P is usually 5 days.
3.What payment methods are accepted for 25LC128-I/P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC128-I/P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC128-I/P?
25LC128-I/P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC128-I/P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC128-I/P?
For technical support, including 25LC128-I/P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC128-I/P requirements.
6.How does Aetrix verify that 25LC128-I/P is sourced from the original manufacturer or authorized distributors?
All 25LC128-I/P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC128-I/P meets industry standards.
7.What is the process for return or replacement of 25LC128-I/P?
All 25LC128-I/P units undergo pre-shipment inspection (PSI). If there is an issue with 25LC128-I/P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC128-I/P part is unused and in its original packaging.
Return procedure for 25LC128-I/P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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