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Microchip Technology 25LC128-I/SM
- Part No.:
- 25LC128-I/SM
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
25LC128-I/SM.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIJ
- Quantity:
- Payment:
- Shipping:
Inventory:363
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Product details
Overview
25LC128-I/SM from Microchip Technology Inc. is a 128 Kbit SPI Serial EEPROM with 16,384 × 8-bit organization, 64-byte page size, and industrial temperature range (–40°C to +85°C). It operates at up to 10 MHz clock frequency with 5 mA read/write current at 5.5 V and features hardware write protection via WP pin and STATUS register control. It is used in microcontroller-based systems for nonvolatile parameter storage, calibration data retention, and firmware configuration.
For engineers reviewing the 25LC128-I/SM datasheet, 25LC128-I/SM pinout, 25LC128-I/SM application, or 25LC128-I/SM equivalent, key selection considerations include VCC range (2.5V–5.5V), TSSOP-8 package compatibility, SPI timing compliance at 10 MHz, endurance (1M cycles), and block-level write protection granularity (none/¼/½/all).
Technical Context
The 25LC128-I/SM implements a standard SPI Mode 0,0 interface with separate SI (data in) and SO (data out) lines, CS-controlled device selection, and HOLD pin for transaction suspension without reset. Its internal architecture includes a 64-byte page latch, EEPROM array with high-voltage generator, and STATUS register with WIP, WEL, BP0/BP1, and WPEN bits.
Write operations require explicit WREN instruction before WRITE or WRSR commands; CS rising edge initiates self-timed internal write cycle (≤5 ms). Block protection is configured via BP0/BP1 bits to lock upper 1/4 (3000h–3FFFh), upper 1/2 (2000h–3FFFh), or full array (0000h–3FFFh), while WP pin enables hardware-level write disable when WPEN = 1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8-bit) - supports storage of boot parameters, sensor calibration tables, or device identity data in space-constrained embedded designs. |
| Interface | SPI-compatible serial bus (Mode 0,0) - interoperable with PIC® and other MCU SPI peripherals without protocol translation logic. |
| Max Clock Frequency | 10 MHz at VCC ≥ 4.5 V - enables fast configuration reads during system startup or runtime updates. |
| Page Size | 64 bytes - defines maximum contiguous write length; crossing page boundary wraps data within same page, requiring software address alignment. |
| Endurance | 1,000,000 erase/write cycles - ensures reliable operation over 10+ years in logging or counter applications with daily writes. |
| Data Retention | >200 years at 25°C - guarantees long-term integrity of stored calibration coefficients or security keys without refresh. |
| VCC Range | 2.5 V to 5.5 V - compatible with both 3.3 V and 5 V logic domains, simplifying power domain integration. |
Pinout & Package
25LC128-I/SM is packaged in an 8-lead TSSOP (Thin Shrink Small Outline Package) with 0.65 mm pitch, body dimensions 4.4 mm × 3.0 mm × 1.2 mm, and exposed pad optional connection to VSS per Microchip drawing C04-057-ST Rev D.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select Input | Active-low enable; deselecting forces SO into high-impedance state for multi-device SPI bus sharing. |
| SO | Serial Data Output | Tri-state output delivering memory contents on SCK falling edge; high-Z when CS high or HOLD asserted. |
| WP | Write-Protect Pin | Hardware lock for STATUS register nonvolatile bits when WPEN = 1; low = protection enabled, high = full access. |
| VSS | Ground | Reference node for all I/O and internal circuitry; must be low-impedance connection to minimize noise coupling. |
| SI | Serial Data Input | Latches instructions, addresses, and data on SCK rising edge; requires clean setup/hold timing per AC specs. |
| SCK | Serial Clock Input | Synchronizes all SPI transactions; max 10 MHz rate defined by VCC level and AC timing limits. |
| HOLD | Hold Input | Suspends ongoing SPI sequence when pulled low during SCK low phase; resumes on rising edge while SCK low. |
| VCC | Supply Voltage | Power input for core logic and EEPROM programming; decoupling capacitor required near pin per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed write cycle | ≤5 ms internal erase/write completion - eliminates need for external timeout logic or polling overhead beyond WIP bit check. |
| Block write protection | Configurable via BP0/BP1 bits to protect none, upper 1/4, upper 1/2, or entire memory array - enables secure partitioning of user vs. factory data zones. |
| Built-in power-on write protection | Write enable latch resets at power-up and after each successful write - prevents accidental corruption during brown-out or reset events. |
| HOLD function | Pauses SPI communication mid-sequence without losing state - allows host MCU to service higher-priority interrupts then resume transparently. |
| High reliability | 1,000,000 write cycles and >200-year data retention - validated for mission-critical applications like medical device calibration or industrial controller settings. |
Applications
| Industrial Sensor Calibration | Embedded Firmware Configuration |
|---|---|
Use Scenario: Storing temperature-compensated offset/gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed during system initialization and runtime recalibration sequences via SPI. Use Value: Enables field-updatable calibration without firmware reflash; 64-byte page size aligns with typical coefficient sets, minimizing write wear. |
Use Scenario: Holding boot-time configuration flags (e.g., UART baud rate, CAN node ID, display brightness) in smart home hubs. IC Role / Device Role / Timing Role: SPI-configurable persistent memory mapped to MCU's peripheral initialization routine. Use Value: Supports user-customizable behavior across production batches; 10 MHz interface allows sub-millisecond config load during cold start. |
| Medical Device Settings Backup | Automotive ECU Parameter Storage |
Use Scenario: Retaining therapy parameters (dose, duration, alarm thresholds) in portable infusion pumps between battery swaps. IC Role / Device Role / Timing Role: Safety-critical nonvolatile storage with hardware write protection (WP pin + BP bits) preventing unintended modification. Use Value: Meets IEC 62304 requirements for data integrity; >200-year retention ensures lifetime validity without periodic refresh. |
Use Scenario: Saving adaptive learning values (e.g., throttle position offset, idle air control trim) in engine control units across ignition cycles. IC Role / Device Role / Timing Role: Endurance-optimized EEPROM interfaced to automotive-grade MCU via robust SPI bus. Use Value: 1M-cycle endurance sustains daily adaptation over 15+ years; industrial temp grade (–40°C to +85°C) matches under-hood environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25AA128-I/SM | Wider VCC range (1.8V–5.5V); supports 3.3V and 1.8V logic; identical pinout and instruction set. | Preferred for mixed-voltage systems or low-power battery operation where 2.5V minimum is limiting. | Select when operating below 2.5V or requiring broader supply flexibility; otherwise 25LC128-I/SM offers identical functionality at lower cost. |
| AT25128B-SSHL-T | Same density and SPI interface; 10 MHz max clock; AEC-Q100 qualified; different STATUS register bit mapping and WP behavior. | Used in automotive infotainment modules requiring AEC-Q100 Grade 2 (–40°C to +105°C) qualification. | Choose for automotive applications needing formal AEC-Q100 certification; verify STATUS register compatibility and WPEN implementation before substitution. |
Compared with 25AA128-I/SM and AT25128B-SSHL-T, the 25LC128-I/SM provides optimal balance of industrial temperature support, proven reliability, and cost efficiency for general-purpose embedded systems-without requiring AEC-Q100 validation or sub-2.5V operation.
Availability
25LC128-I/SM is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded firmware configuration, medical device settings backup, and automotive ECU parameter storage requiring stable component supply across extended product lifecycles.
Supply support for 25LC128-I/SM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 25LC128 belongs to Microchip's serial EEPROM product line, designed specifically for reliable, low-power, SPI-based nonvolatile data storage in resource-constrained embedded systems across industrial, medical, and consumer applications.
FAQ
What is the operating voltage range for the 25LC128-I/SM?
The 25LC128-I/SM operates from 2.5 V to 5.5 V. This range supports compatibility with both 3.3 V and 5 V logic families. Operation below 2.5 V is not guaranteed and may result in unreliable read/write behavior or STATUS register misreads. The 25AA128 variant extends down to 1.8 V for ultra-low-power applications.
Does the 25LC128-I/SM support SPI Mode 1,1 or only Mode 0,0?
The 25LC128-I/SM supports SPI Mode 0,0 exclusively: CPOL = 0 (clock idle low) and CPHA = 0 (sample on first edge). It does not support Mode 1,1. Data is latched on the rising edge of SCK and output on the falling edge. Attempting Mode 1,1 communication will cause timing violations and data corruption.
How does the HOLD pin function during an active SPI transaction on the 25LC128-I/SM?
The HOLD pin on the 25LC128-I/SM suspends an ongoing SPI sequence when pulled low while SCK is low. During hold, SI, SCK, and SO enter high-impedance states and ignore input transitions except CS. To resume, HOLD must be raised while SCK remains low. Resuming restores the exact byte/bit position in the transaction without restart.
Can the 25LC128-I/SM be used in automotive applications?
The 25LC128-I/SM is rated for Industrial temperature (–40°C to +85°C) and is not AEC-Q100 qualified. While it may function in some under-dash environments, Microchip explicitly qualifies the 25LC128-E/ variants for Extended temperature (–40°C to +125°C) and automotive use. For production automotive ECUs, AEC-Q100-compliant alternatives like AT25128B-SSHL-T are recommended.
What happens if a page write crosses a 64-byte boundary on the 25LC128-I/SM?
If a page write command attempts to cross a 64-byte boundary on the 25LC128-I/SM, data wraps around to the start of the current page instead of advancing to the next page. This overwrites previously written bytes in that page. Application firmware must enforce address alignment to prevent unintended data loss; no hardware boundary detection or error signaling is provided.
25LC128-I/SM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIJ
25LC128-I/SM FAQ
1.How can I place an order for 25LC128-I/SM through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC128-I/SM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC128-I/SM reliable?
The price and inventory of 25LC128-I/SM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC128-I/SM is usually 5 days.
3.What payment methods are accepted for 25LC128-I/SM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC128-I/SM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC128-I/SM?
25LC128-I/SM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC128-I/SM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC128-I/SM?
For technical support, including 25LC128-I/SM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC128-I/SM requirements.
6.How does Aetrix verify that 25LC128-I/SM is sourced from the original manufacturer or authorized distributors?
All 25LC128-I/SM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC128-I/SM meets industry standards.
7.What is the process for return or replacement of 25LC128-I/SM?
All 25LC128-I/SM units undergo pre-shipment inspection (PSI). If there is an issue with 25LC128-I/SM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC128-I/SM part is unused and in its original packaging.
Return procedure for 25LC128-I/SM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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