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Microchip Technology 25LC128XT-I/ST
- Part No.:
- 25LC128XT-I/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
25LC128XT-I/ST.pdf
- Description:
- IC EEPROM 128KBIT SPI 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,254
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Product details
Overview
25LC128XT-I/ST from Microchip Technology Inc. is a 128 Kbit SPI Serial EEPROM with 16,384 × 8-bit organization, 64-byte page size, and industrial temperature range (–40°C to +85°C). It operates at up to 10 MHz clock frequency with 5 mA read/write current at 5.5 V and features hardware write protection via WP pin and STATUS register control. It is used in microcontroller-based systems for nonvolatile parameter storage, calibration data retention, and firmware configuration.
For engineers reviewing the 25LC128XT-I/ST datasheet, 25LC128XT-I/ST pinout, 25LC128XT-I/ST application, or 25LC128XT-I/ST equivalent, this page provides verified electrical specs, SPI timing constraints, HOLD/CS/WP functional behavior, endurance (1M cycles), and package-specific pin mapping for TSSOP-8 (ST) and DFN-8 (XT) variants.
Technical Context
The 25LC128XT-I/ST implements a standard SPI Mode 0,0 interface with separate SI (data-in) and SO (data-out) lines, requiring CS low and SCK synchronized communication. It supports byte and page write operations (up to 64 bytes per page), with self-timed internal write cycles completing in ≤5 ms.
Its dual-level write protection includes volatile WEL latch control (via WREN/WRDI) and nonvolatile BP0/BP1 bits enabling selective array protection (none, 1/4, 1/2, or full memory block). The HOLD pin suspends ongoing SPI transfers without resetting sequence state, allowing interrupt servicing while preserving transaction context.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 128 Kbit (16,384 × 8-bit) - supports persistent storage of configuration, calibration, or event logs in resource-constrained embedded systems. |
| Interface | SPI-compatible serial bus (Mode 0,0) - interoperable with PIC® and other MCU SPI peripherals without protocol translation logic. |
| Max Clock Frequency | 10 MHz at VCC ≥ 4.5 V - enables fast read/write throughput (up to 1.25 MB/s theoretical) for time-critical data logging. |
| Page Size | 64 bytes - defines maximum contiguous write length before internal write cycle initiation; crossing page boundary wraps data within same page. |
| Endurance & Retention | 1,000,000 erase/write cycles, >200 years data retention - suitable for high-update-rate applications like metering or sensor calibration tables. |
| Supply Voltage Range | 2.5 V to 5.5 V - compatible with both 3.3 V and 5 V logic domains, eliminating level-shifting requirements in mixed-voltage designs. |
| Operating Temperature | –40°C to +85°C (Industrial grade) - validated for deployment in automotive ECUs, industrial controllers, and outdoor IoT nodes. |
Pinout & Package
25LC128XT-I/ST is packaged in an 8-lead TSSOP (ST suffix) with exposed pad, pin-compatible with SOIC/SOIJ/PDIP/DFN variants. Pin numbering follows standard top-view orientation with Pin 1 marked by notch or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select Input | Active-low enable signal; deselecting forces SO into high-impedance state, enabling multi-device SPI bus sharing. |
| SO | Serial Data Output | Tri-state output delivering read data on falling edge of SCK; enters high-Z when CS high or HOLD asserted. |
| WP | Write-Protect Pin | Hardware lock for STATUS register nonvolatile bits when WPEN = 1; does not block array writes unless BP bits are set. |
| VSS | Ground Reference | Primary return path for all internal circuitry; exposed pad (TSSOP) may be connected to VSS for thermal and EMI improvement. |
| SI | Serial Data Input | Latches instruction, address, and write data on rising edge of SCK; requires setup/hold timing compliance per VCC voltage tier. |
| SCK | Serial Clock Input | Synchronizes all SPI transactions; max frequency scales with VCC (10 MHz @ 4.5–5.5 V, 5 MHz @ 2.5–4.5 V). |
| HOLD | Hold Input | Suspends active SPI transfer without aborting; must be asserted while SCK is low to avoid metastability; resumes on rising edge while SCK low. |
| VCC | Supply Voltage | Power input for core logic and EEPROM array; internal charge pump enables programming at VCC ≥ 2.5 V without external HV supply. |
Key Features
| Feature | Design Value |
|---|---|
| Block Write Protection | Selective hardware/software protection of 0%, 25%, 50%, or 100% memory array via BP0/BP1 bits - prevents accidental overwrites of critical firmware or calibration sectors. |
| Self-Timed Write Cycle | ≤5 ms internal erase/write completion - eliminates need for external timeout logic; WIP bit in STATUS register enables polling-based synchronization. |
| Power-On Write Protection | Automatic WEL reset at power-up and after each WRITE/WRSR - prevents unintended writes during brown-out or reset sequences. |
| HOLD Functionality | Pause/resume capability during mid-transaction - allows host MCU to service higher-priority interrupts without reinitializing SPI frame alignment or address counters. |
| ESD Robustness | ≥4 kV HBM rating on all pins - ensures reliability in handling-sensitive manufacturing and field-repair environments without additional protection components. |
Applications
| Smart Energy Metering | Automotive Body Control Module |
|---|---|
Use Scenario: Storing tariff schedules, pulse-count history, and tamper-event timestamps across power cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter storage with guaranteed 200-year data retention and 1M-cycle endurance under daily update loads. Use Value: Eliminates battery-backed SRAM, reducing BOM cost and failure modes while meeting IEC 62056 and EN 13757-3 metering standards. |
Use Scenario: Saving seat/mirror position presets, door lock configurations, and lighting profiles in vehicle personalization systems. IC Role / Device Role / Timing Role: SPI-configurable EEPROM interfacing directly with CAN-connected microcontrollers for user preference persistence. Use Value: AEC-Q100 qualified operation ensures reliability in under-hood temperature cycling; WP pin enables factory lockdown of safety-critical settings. |
| Industrial PLC I/O Module | Medical Infusion Pump Calibration |
Use Scenario: Retaining analog sensor calibration coefficients, channel gain/offset values, and diagnostic fault logs in modular I/O cards. IC Role / Device Role / Timing Role: High-reliability data logger accessed via isolated SPI bus; withstands repeated write cycles during field recalibration. Use Value: 64-byte page writes minimize transaction overhead during multi-parameter updates; HOLD pin enables deterministic response to real-time I/O interrupts. |
Use Scenario: Storing drug library parameters, flow rate calibration constants, and usage audit trails compliant with FDA 21 CFR Part 11. IC Role / Device Role / Timing Role: Secure, traceable nonvolatile memory with write-protection granularity to prevent unauthorized modification of therapeutic settings. Use Value: Block protection (BP0/BP1) isolates regulatory-critical data sectors; >200-year retention meets long-life device requirements for Class II medical equipment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25AA128-I/ST | Wider VCC range (1.8–5.5 V); supports 3 MHz operation down to 1.8 V - not rated for 2.5 V minimum like 25LC128. | Preferred in ultra-low-power battery-operated devices where 1.8 V operation is required; lacks AEC-Q100 qualification. | Select 25AA128-I/ST only if system VCC can drop below 2.5 V; otherwise 25LC128XT-I/ST offers tighter voltage tolerance and automotive qualification. |
| AT25128B-SSHL-B | Same 128 Kbit SPI EEPROM but with 20 MHz max clock (at 5 V), different STATUS register layout, and no HOLD pin. | Higher-speed read/write in 5 V systems; lacks suspend capability for interrupt-driven hosts - requires software-managed transaction restart. | Choose AT25128B-SSHL-B only when bandwidth >10 MHz is mandatory and HOLD functionality is unused; verify STATUS register compatibility before firmware porting. |
Compared with 25AA128-I/ST and AT25128B-SSHL-B, the 25LC128XT-I/ST delivers optimal balance of industrial temperature robustness, AEC-Q100 qualification, HOLD-enabled interrupt handling, and strict 2.5–5.5 V supply compliance - making it preferred for automotive and industrial control applications where deterministic timing and long-term reliability are critical.
Availability
25LC128XT-I/ST is available at Aetrix Electronics and suitable for smart energy metering, automotive body control modules, industrial PLC I/O modules, and medical infusion pump calibration requiring stable component supply and long-lifecycle support.
Supply support for 25LC128XT-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, FPGA, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 25LC128XT-I/ST belongs to Microchip's serial EEPROM product line, designed specifically for reliable, low-power, SPI-based nonvolatile data storage in automotive, industrial, and consumer applications demanding high endurance and extended temperature operation.
FAQ
What is the maximum clock frequency supported by the 25LC128XT-I/ST?
The 25LC128XT-I/ST supports up to 10 MHz clock frequency when VCC is between 4.5 V and 5.5 V. At lower supply voltages (2.5 V ≤ VCC < 4.5 V), the maximum clock drops to 5 MHz, and operation below 2.5 V is not specified. This voltage-dependent speed scaling ensures timing margin across its full operating range.
Does the 25LC128XT-I/ST require an external high-voltage supply for write operations?
No, the 25LC128XT-I/ST does not require an external high-voltage supply. It integrates an internal charge pump that generates the necessary programming voltage from the standard 2.5–5.5 V VCC rail, enabling single-supply operation and simplifying system power architecture.
How does the HOLD pin function during an active SPI transaction in the 25LC128XT-I/ST?
In the 25LC128XT-I/ST, the HOLD pin suspends ongoing SPI communication when pulled low while SCK is low. During hold, SI/SCK/SO enter high-impedance states and ignore input transitions except CS. Resuming requires bringing HOLD high while SCK remains low - preserving address pointer and transaction state without restart.
What memory protection mechanisms are implemented in the 25LC128XT-I/ST?
The 25LC128XT-I/ST implements three-tiered protection: (1) volatile WEL latch requiring WREN instruction before writes, (2) nonvolatile BP0/BP1 bits enabling 0%/25%/50%/100% array block protection, and (3) hardware WP pin control (when WPEN=1) locking STATUS register writes. All reset on power-up for fail-safe default behavior.
Is the 25LC128XT-I/ST pin-compatible with other packages in the 25XX128 family?
Yes, the 25LC128XT-I/ST in TSSOP-8 (ST) shares identical pinout and electrical behavior with 25LC128-I/SN (SOIC), 25LC128-I/SM (SOIJ), and 25LC128-I/P (PDIP) variants. The XT suffix denotes DFN-8 packaging, which uses the same pin function mapping but different physical layout and thermal characteristics.
25LC128XT-I/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
25LC128XT-I/ST FAQ
1.How can I place an order for 25LC128XT-I/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC128XT-I/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC128XT-I/ST reliable?
The price and inventory of 25LC128XT-I/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC128XT-I/ST is usually 5 days.
3.What payment methods are accepted for 25LC128XT-I/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC128XT-I/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC128XT-I/ST?
25LC128XT-I/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC128XT-I/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC128XT-I/ST?
For technical support, including 25LC128XT-I/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC128XT-I/ST requirements.
6.How does Aetrix verify that 25LC128XT-I/ST is sourced from the original manufacturer or authorized distributors?
All 25LC128XT-I/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC128XT-I/ST meets industry standards.
7.What is the process for return or replacement of 25LC128XT-I/ST?
All 25LC128XT-I/ST units undergo pre-shipment inspection (PSI). If there is an issue with 25LC128XT-I/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC128XT-I/ST part is unused and in its original packaging.
Return procedure for 25LC128XT-I/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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