Toshiba Semiconductor and Storage 2SA1162S-GR,LF(D
- Part No.:
- 2SA1162S-GR,LF(D
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Single Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
2SA1162S-GR,LF(D.pdf
- Description:
- TRANS PNP 50V 0.15A S-MINI
- Quantity:
- Payment:

- Shipping:

Inventory:8,976
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
2SA1162S-GR,LF from Toshiba Electronic Devices & Storage Corporation is a silicon PNP epitaxial bipolar transistor designed for low-frequency and audio-frequency amplifier stages. It delivers VCEO = −50 V, IC(max) = −150 mA, hFE = 200–400 (GR grade), NF = 1 dB (typ.), and operates in S-Mini package with pinout Base–Emitter–Collector. It serves as a high-linearity, low-noise active device in preamplifier and driver circuits.
For engineers reviewing the 2SA1162S-GR,LF datasheet, 2SA1162S-GR,LF pinout, 2SA1162S-GR,LF application, or 2SA1162S-GR,LF equivalent, key selection criteria include guaranteed AEC-Q101 qualification for automotive use, hFE linearity ratio ≥0.95 at low-to-mid current, noise figure ≤10 dB max, and complementary pairing with 2SC2712 in push-pull designs.
Technical Context
This PNP transistor employs epitaxial base construction to achieve stable hFE across collector current (IC = −0.1 mA to −2 mA), enabling consistent gain in linear amplification. Its −50 V VCEO rating supports operation in higher-voltage analog rails, while the 200 mW PC rating (on FR4 board) defines thermal limits under continuous DC bias.
The device exhibits low noise performance (NF = 1 dB typ. at f = 1 kHz, RG = 10 kΩ) and transition frequency fT = 80 MHz (typ.), confirming suitability for audio-band signal conditioning and moderate-speed switching where gain stability matters more than RF response.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V: Supports amplifier stages operating up to −45 V supply rails without breakdown. |
| IC(max) | −150 mA: Enables driving medium-current loads such as speaker drivers or line-level output buffers. |
| hFE Range | 200–400 (GR grade): Ensures predictable DC biasing and gain control in Class-A/AB amplifier topologies. |
| NF | 1 dB (typ.), ≤10 dB (max): Meets low-noise requirements for microphone preamps and hi-fi input stages. |
| fT | 80 MHz (typ.): Confirms adequate bandwidth for full audio spectrum (20 Hz–20 kHz) with margin. |
| hFE Linearity | hFE(−0.1 mA)/hFE(−2 mA) = 0.95 (typ.): Minimizes harmonic distortion in small-signal amplification. |
Pinout & Package
S-Mini package (JEDEC TO-236AB), 3-pin surface-mount, 12 mg typical weight, footprint compatible with automated placement. Pin 1 = Base, Pin 2 = Emitter, Pin 3 = Collector.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Base) | Current-controlled input terminal | Receives base drive current to modulate collector-emitter conduction; requires external bias network for stable Q-point. |
| 2 (Emitter) | Common reference node in common-base/common-collector | Typically tied to ground or negative rail; provides return path for emitter current and sets voltage reference for VBE control. |
| 3 (Collector) | Output current terminal | Delivers amplified current to load; polarity must match PNP configuration (negative supply referenced). |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualified | Validated for automotive-grade reliability including temperature cycling, HTRB, and ESD testing per AEC standard. |
| High hFE linearity | 0.95 ratio ensures minimal gain variation between idle and signal peaks-critical for low-THD audio design. |
| Complementary pairing | Designed as direct PNP counterpart to 2SC2712 NPN, enabling matched push-pull output stages. |
| Low noise figure | 1 dB typical noise at 1 kHz allows use in sensitive front-end amplifiers without degrading SNR. |
Applications
| Audio Preamplifier Stage | Automotive Cabin Audio Driver |
|---|---|
Use Scenario: Low-noise voltage amplification of microphone or line-level signals before ADC or power stage. IC Role / Device Role / Timing Role: Small-signal PNP amplifier providing gain with minimal added noise and distortion. Use Value: hFE linearity ≥0.95 and NF ≤10 dB ensure clean signal integrity across dynamic range. | Use Scenario: Driving mid-range speakers or tone control networks in vehicle infotainment systems. IC Role / Device Role / Timing Role: Medium-current output stage in Class-AB amplifier topology. Use Value: AEC-Q101 qualification and −50 V VCEO support robust operation in 12 V/24 V automotive electrical environments. |
| Complementary Push-Pull Output | DC-Coupled Signal Inverter |
Use Scenario: Paired with 2SC2712 in symmetrical output stage for zero-crossing distortion reduction. IC Role / Device Role / Timing Role: PNP half of complementary emitter-follower pair delivering current sink capability. Use Value: Matched hFE range and thermal characteristics with 2SC2712 enable balanced conduction and thermal tracking. | Use Scenario: Level-shifting and signal inversion in analog control loops or sensor interface circuits. IC Role / Device Role / Timing Role: DC-coupled common-emitter inverter with fixed gain and defined output impedance. Use Value: Stable hFE over IC and low VCE(sat) = −0.3 V (max) ensure accurate inversion without saturation-induced delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PNP bipolar transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 2SA1037AK-RL | hFE = 120–270 (lower max), VCEO = −50 V, SOT-323 package, same pinout but smaller thermal mass. | Lower hFE range reduces gain margin in high-precision bias networks; not AEC-Q101 qualified. | Preferred for space-constrained consumer audio where automotive qualification is unnecessary. |
| MMBT2907ALT1G | hFE = 100–300, VCEO = −60 V, SOT-23 package, NF = 10 dB (max), no AEC-Q101 certification. | Higher VCEO offers wider supply flexibility but lacks guaranteed linearity and automotive validation. | Selected when higher breakdown voltage is prioritized over noise and linearity in industrial signal conditioning. |
Compared with 2SA1162S-GR,LF, the 2SA1037AK-RL trades AEC-Q101 compliance and hFE linearity for smaller footprint, while MMBT2907ALT1G emphasizes voltage margin over low-noise fidelity-making the 2SA1162S-GR,LF optimal for automotive audio where gain stability and noise are critical.
Availability
2SA1162S-GR,LF is available at Aetrix Electronics and suitable for automotive cabin audio systems, professional audio equipment, and industrial analog signal conditioning requiring stable component supply, long-term lifecycle assurance, and AEC-Q101-compliant sourcing.
Supply support for 2SA1162S-GR,LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and logic ICs with emphasis on reliability, efficiency, and automotive-grade validation.
The 2SA1162S-GR,LF belongs to Toshiba's legacy bipolar transistor product line, engineered specifically for high-fidelity, low-noise analog amplification in automotive and professional audio applications.
FAQ
What does the "GR" suffix indicate in 2SA1162S-GR,LF?
The "GR" suffix denotes the hFE gain bin classification: 200–400 at VCE = −6 V and IC = −2 mA. This high-gain grade ensures tighter DC bias control and improved signal-to-noise ratio in low-current amplifier stages. The 2SA1162S-GR,LF maintains this specification across its qualified operating temperature range and is validated per AEC-Q101 for automotive use.
Is 2SA1162S-GR,LF pin-compatible with other S-Mini PNP transistors?
Yes-2SA1162S-GR,LF uses the standard S-Mini (TO-236AB) package with pin 1 = Base, pin 2 = Emitter, pin 3 = Collector. It shares mechanical and solder-pad compatibility with other S-Mini PNP devices like 2SA1037AK-RL, though electrical parameters (hFE, NF, linearity) differ. Always verify bias network compatibility before substitution.
Does 2SA1162S-GR,LF require derating at elevated ambient temperatures?
Yes-its 200 mW power dissipation is rated at Ta = 25 °C on a 25.4 mm × 25.4 mm × 1.6 mm FR4 board. Derating is required above 25 °C: approximately −1.6 mW/°C above 25 °C until Tj reaches 150 °C. Full derating curves are provided in Figure 8.7 and 8.8 of the official Toshiba datasheet for 2SA1162S-GR,LF.
How is the AEC-Q101 qualification applied to 2SA1162S-GR,LF?
The 2SA1162S-GR,LF is explicitly listed in Toshiba's orderable part number table as AEC-Q101 qualified (Note 1). This qualification covers stress tests including HTGB, HTRB, TC, AC/DC life test, and ESD per JS-001, confirming suitability for automotive electronic modules. The "LF" suffix indicates lead-free plating, compliant with RoHS.
Can 2SA1162S-GR,LF be used as a direct replacement for 2SA1162-O,LF or 2SA1162-Y,LF?
No-while all share the same package and absolute ratings, the hFE bins differ: O = 70–140, Y = 120–240, GR = 200–400. Substituting 2SA1162S-GR,LF for lower-bin variants may cause overbiasing or instability in existing circuits calibrated for lower gain. Circuit revalidation is required when changing hFE grades, even within the same 2SA1162 family.
2SA1162S-GR,LF(D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP
- Current - Collector (Ic) (Max):
- 150 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Vce Saturation (Max) @ Ib, Ic:
- 300mV @ 10mA, 100mA
- Current - Collector Cutoff (Max):
- 100nA (ICBO)
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 70 @ 2mA, 6V
- Power - Max:
- 150 mW
- Frequency - Transition:
- 80MHz
- Operating Temperature:
- 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- S-Mini
2SA1162S-GR,LF(D FAQ
1.How can I place an order for 2SA1162S-GR,LF(D through Aetrix?
Please submit a Request for Quotation (RFQ) for 2SA1162S-GR,LF(D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 2SA1162S-GR,LF(D reliable?
The price and inventory of 2SA1162S-GR,LF(D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 2SA1162S-GR,LF(D is usually 5 days.
3.What payment methods are accepted for 2SA1162S-GR,LF(D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 2SA1162S-GR,LF(D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 2SA1162S-GR,LF(D?
2SA1162S-GR,LF(D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 2SA1162S-GR,LF(D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 2SA1162S-GR,LF(D?
For technical support, including 2SA1162S-GR,LF(D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 2SA1162S-GR,LF(D requirements.
6.How does Aetrix verify that 2SA1162S-GR,LF(D is sourced from the original manufacturer or authorized distributors?
All 2SA1162S-GR,LF(D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 2SA1162S-GR,LF(D meets industry standards.
7.What is the process for return or replacement of 2SA1162S-GR,LF(D?
All 2SA1162S-GR,LF(D units undergo pre-shipment inspection (PSI). If there is an issue with 2SA1162S-GR,LF(D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 2SA1162S-GR,LF(D part is unused and in its original packaging.
Return procedure for 2SA1162S-GR,LF(D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
2SA1162S-GR,LF(D Tags

-
MMBT3906LT1G
onsemi

-
MMBT3904-7-F
Diodes Incorporated

-
MMBT3904LT1G
onsemi

-
MMBT3906-7-F
Diodes Incorporated

-
MMBT3904-TP
Micro Commercial Co

-
MMBT2222A-7-F
Diodes Incorporated

-
BC846BLT1G
onsemi

-
BC847B,215
Nexperia USA Inc.

-
SMMBT3904LT1G
onsemi

-
MMBT2222A-TP
Micro Commercial Co

-
MMBTA06LT1G
onsemi

-
MMBT2222ALT1G
onsemi
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
