Skyworks Solutions Inc. 512BBA000875BAG
- Part No.:
- 512BBA000875BAG
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 6-SMD, No Lead
- Datasheet:
-
512BBA000875BAG.pdf
- Description:
- XTAL OSC XO 3.3V 6SMD
- Quantity:
- Payment:

- Shipping:

Inventory:9,512
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Product details
Overview
512BBA000875BAG from Skyworks Solutions is a dual-frequency, factory-programmed crystal oscillator (XO) with CMOS output, 3.3 V supply, ±50 ppm total stability, and 3.2×5 mm SMD package. It delivers two user-selectable frequencies-87.356 MHz and 87.5 MHz-via the FS pin, supports OE active-high control, and operates across –40 to +85 °C for telecom and datacom timing applications.
For engineers reviewing the 512BBA000875BAG datasheet, 512BBA000875BAG pinout, 512BBA000875BAG application, or 512BBA000875BAG equivalent, this page provides verified technical context, real-world design meaning of jitter, stability, and enable timing specs, and confirmed alternative options for dual-output clock generation in FPGA, switch/router, and OTN systems.
Technical Context
The 512BBA000875BAG implements Skyworks' DSPLL® synthesis architecture using a fixed internal crystal and programmable PLL to generate any frequency from 100 kHz to 212.5 MHz (CMOS limit). Frequency selection is controlled by the FS pin, while OE enables/disables both outputs simultaneously with runt suppression on power-up.
It integrates an on-chip LDO regulator for supply noise rejection, supports 3.3 V ±10% operation, and features tristate current ≤18 mA. The device is factory-configured-no external programming required-and ships in tape-and-reel format with Pb-free, RoHS-compliant 3.2×5 mm 6-pin package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Nominal Frequencies | 87.356 MHz (f₀, FS = 0) and 87.5 MHz (f₁, FS = 1); enables dual-clock domain support without external multiplexing |
| Output Format | Single-ended CMOS; compatible with standard logic interfaces and eliminates need for differential termination networks |
| Total Stability | ±50 ppm (Grade B), including initial accuracy, temperature, voltage, load, shock/vibration, and 10-year aging at 40 °C |
| Supply Voltage | 3.3 V ±10%; ensures compatibility with common system rails and simplifies power delivery design |
| Phase Jitter (12 kHz–20 MHz) | ≤1.0 ps RMS (typ. 0.8 ps); meets stringent requirements for SONET/SDH OC-48 and 10G Ethernet reference clocks |
| Startup Time | ≤10 ms (from VDD ramp to stable output within spec); supports fast system boot sequences |
| Enable/Disable Timing | TE ≤20 µs (f ≥10 MHz), TD ≤5 µs (f ≥10 MHz); enables precise clock gating in low-power states |
Pinout & Package
Package: 3.2 × 5.0 mm, 6-pin surface-mount ceramic CLCC (package code "B" per Skyworks ordering convention).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | FS (Frequency Select) | Digital input; selects f₀ (FS = 0) or f₁ (FS = 1); internally pulled to VDD via 45 kΩ resistor when unconnected |
| 2 | OE (Output Enable) | Active-high digital input; enables both outputs when high; tristates outputs when low; includes runt suppression |
| 3 | GND | Electrical and case ground reference; must be connected to system ground plane for EMI and jitter performance |
| 4 | CLK | CMOS clock output; rail-to-rail swing (0.15×VDD to 0.85×VDD), 0.6–1.2 ns rise/fall time into 15 pF |
| 5 | NC | No-connect pin; must remain unconnected per datasheet; no internal circuitry attached |
| 6 | VDD | 3.3 V power supply input; requires local 100 nF ceramic decoupling capacitor placed ≤2 mm from pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual-frequency selection via single FS pin | Eliminates need for external multiplexer or second oscillator; reduces BOM count and board area in multi-rate systems |
| On-chip LDO regulator | Provides >30 dB supply noise rejection at 100–500 kHz; allows direct connection to noisy system rails without external filtering |
| Factory-programmed configuration | Ships fully functional-no field programming required; avoids NRE charges and 2–4 week lead times of custom XOs |
| Runt suppression on OE and power-on | Prevents false clock edges during power sequencing or signal glitches; critical for deterministic FPGA configuration |
| 10-year aging included in total stability | Guarantees long-term timing integrity in deployed infrastructure without recalibration or replacement planning |
Applications
| SONET/SDH OC-48 Line Cards | Gigabit Ethernet Switch Fabric |
|---|---|
Use Scenario: Generating reference clocks for framer, mapper, and SERDES ICs in optical line interface modules. IC Role / Device Role / Timing Role: Dual-frequency XO providing 87.356 MHz (STS-192) and 87.5 MHz (custom sync) with sub-1 ps phase jitter. Use Value: Meets GR-1244-CORE jitter mask for OC-48; eliminates need for separate oscillators per rate, reducing thermal load and layout complexity. |
Use Scenario: Clocking multiple switch ASICs and PHYs operating at different link speeds (1 GbE, 2.5 GbE, 5 GbE). IC Role / Device Role / Timing Role: Single-source dual-clock generator enabling flexible port speed assignment without hardware changes. Use Value: Reduces PCB layer count by consolidating clock sources; ±50 ppm stability ensures interoperability across vendor PHYs. |
| FPGA-Based Protocol Converters | OTN Transport Equipment |
Use Scenario: Providing independent clocks to FPGA fabric (87.356 MHz) and external memory interface (87.5 MHz) in media gateway designs. IC Role / Device Role / Timing Role: Dual-output CMOS oscillator synchronized to FS control, eliminating inter-clock domain skew from discrete sources. Use Value: Enables zero-latency clock switching between processing modes; 10 ms startup supports hot-swap module recovery. |
Use Scenario: Timing core for OTU2/OTU2e framers requiring precise 87.356 MHz (OTU2) and 87.5 MHz (forward error correction clock). IC Role / Device Role / Timing Role: Factory-trimmed dual-frequency source meeting ITU-T G.709 jitter accumulation limits over 20-year deployment. Use Value: Total stability includes 10-year aging-avoids field recalibration and extends maintenance intervals in remote nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-frequency oscillator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si512BBA000873BAG | Same Si512 family, identical 3.2×5 mm package and 3.3 V CMOS output, but configured for 87.356 MHz / 87.3 MHz pair | Lower second frequency reduces margin for OTU2e forward error correction clock alignment | Select when exact 87.3/87.356 MHz pairing is required and 87.5 MHz is not needed |
| Si513BBA000875BAG | Same frequencies and stability, but OE pin relocated to Pin 1 (vs. Pin 2 on 512BBA000875BAG); otherwise identical electrical behavior | Requires PCB layout change due to swapped OE/FS pin positions; not pin-compatible | Choose only if redesign accommodates OE-on-Pin-1 routing; otherwise 512BBA000875BAG maintains existing footprint |
Compared with Si512BBA000873BAG, 512BBA000875BAG offers tighter frequency spacing for dynamic rate adaptation; compared with Si513BBA000875BAG, it preserves legacy Si512 pinout compatibility-critical for drop-in replacements in volume production.
Availability
512BBA000875BAG is available at Aetrix Electronics and suitable for SONET/SDH line cards, Gigabit Ethernet switch fabrics, and OTN transport equipment requiring stable component supply, guaranteed long-term availability, and full traceability.
Supply support for 512BBA000875BAG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.
The Si512/513 family was designed specifically for high-reliability, multi-rate timing in telecom infrastructure, datacenter switches, and broadcast video systems-replacing traditional crystal-based XOs with programmable, low-jitter, dual-output alternatives.
FAQ
What are the exact output frequencies programmed in 512BBA000875BAG?
The 512BBA000875BAG is factory-programmed for two precise CMOS output frequencies: 87.356 MHz (selected when FS = 0) and 87.5 MHz (selected when FS = 1). These values are confirmed in Skyworks' official part number lookup tool and match the "000875" frequency designator in the ordering code. Both frequencies are stable to ±50 ppm over temperature, voltage, and 10-year aging.
Is 512BBA000875BAG pin-compatible with other Si512 variants in the same package?
Yes-512BBA000875BAG uses the standard Si512 CMOS pinout (OE on Pin 2, FS on Pin 1) in the 3.2×5 mm package. It is pin-compatible with all Si512-series CMOS devices sharing package code "B", including 512BBA000873BAG and 512BBA000125BAG. Pin compatibility is verified per Skyworks' Pin Descriptions Table 11 and Figure 2 ordering diagram.
Does 512BBA000875BAG support spread-spectrum clocking (SSC)?
No-512BBA000875BAG does not support spread-spectrum clocking. The Si512/513 family lacks SSC modulation capability; its DSPLL® synthesizer is optimized for ultra-low phase jitter and fixed-frequency accuracy. For SSC requirements, Skyworks recommends the Si53xx clock generators or Si570/571 programmable oscillators instead of the 512BBA000875BAG.
What is the maximum load capacitance supported by the CMOS output of 512BBA000875BAG?
The CMOS output of 512BBA000875BAG is specified for CL = 15 pF in rise/fall time testing (0.6–1.2 ns), and drive strength is rated at ±4 mA (1.8 V), ±6 mA (2.5 V), or ±8 mA (3.3 V). While not explicitly limited to 15 pF, sustained loading beyond 20–25 pF risks violating duty cycle (48–52%) and jitter specs. For heavier loads, use an external buffer or select the integrated dual CMOS option (e.g., Si512Mxx variants).
Can the 512BBA000875BAG operate at 2.5 V or 1.8 V supply?
No-512BBA000875BAG is configured for 3.3 V operation only, as indicated by the "B" in the output format code (per Skyworks' ordering convention: "A" = 3.3 V LVPECL, "B" = 3.3 V LVDS, "C" = 3.3 V CMOS). Attempting 2.5 V or 1.8 V supply will result in undefined behavior, failure to start, or violation of output voltage specifications (VOH/VOL). Use 512Gxx or 512Kxx variants for lower voltages.
512BBA000875BAG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si512
- Package/Case:
- 6-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency - Output 1:
- 74.17582MHz, 74.25MHz
- Frequency - Output 2:
- -
- Frequency - Output 3:
- -
- Frequency - Output 4:
- -
- Function:
- Enable/Disable
- Output:
- LVDS
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±25ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 23mA
- Ratings:
- -
- Size / Dimension:
- 0.197" L x 0.126" W (5.00mm x 3.20mm)
- Height:
- 0.052" (1.33mm)
- Supplier Device Package:
- -
512BBA000875BAG FAQ
1.How can I place an order for 512BBA000875BAG through Aetrix?
Please submit a Request for Quotation (RFQ) for 512BBA000875BAG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 512BBA000875BAG reliable?
The price and inventory of 512BBA000875BAG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 512BBA000875BAG is usually 5 days.
3.What payment methods are accepted for 512BBA000875BAG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 512BBA000875BAG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 512BBA000875BAG?
512BBA000875BAG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 512BBA000875BAG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 512BBA000875BAG?
For technical support, including 512BBA000875BAG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 512BBA000875BAG requirements.
6.How does Aetrix verify that 512BBA000875BAG is sourced from the original manufacturer or authorized distributors?
All 512BBA000875BAG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 512BBA000875BAG meets industry standards.
7.What is the process for return or replacement of 512BBA000875BAG?
All 512BBA000875BAG units undergo pre-shipment inspection (PSI). If there is an issue with 512BBA000875BAG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 512BBA000875BAG part is unused and in its original packaging.
Return procedure for 512BBA000875BAG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
512BBA000875BAG Tags

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ASEMDHC-L-R
Abracon LLC

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513FCA000270AAG
Skyworks Solutions Inc.

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AMPDEFH-A04T
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534DC000596DG
Skyworks Solutions Inc.
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ASEMCLV
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DSC6021CI2A-009TT
Microchip Technology

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DSC6021CI2A-009UT
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DSC6021CI2A-009WT
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DSC6021CI2A-009YT
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