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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 512BCA000594AAG

Name: 512BCA000594AAG
Brand: Skyworks Solutions Inc.
SKU: 512BCA000594AAG
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 512BCA000594AAG

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 512BCA000594AAG.pdf

Description:: XTAL OSC XO 3.3V 6SMD

Quantity:: RFQ Add To RFQ list

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Inventory:7,007

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Product details

Overview

512BCA000594AAG from Skyworks Solutions is a dual-frequency crystal oscillator (XO) with factory-programmed frequencies of 100 MHz and 125 MHz, operating at 3.3 V supply, CMOS output format, ±30 ppm total stability (Grade C), and housed in a 3.2 × 5.0 mm 6-pin package. It serves as a low-jitter, dual-clock source for FPGA/ASIC timing and high-speed serial interfaces.

For engineers reviewing the 512BCA000594AAG datasheet, 512BCA000594AAG pinout, 512BCA000594AAG application, or 512BCA000594AAG equivalent, key selection criteria include dual-frequency switching via FS pin, OE polarity configuration, CMOS drive capability up to 212.5 MHz, and compatibility with SONET/SDH, PCIe, and Gigabit Ethernet clocking requirements.

Technical Context

The 512BCA000594AAG implements Skyworks' DSPLL® synthesis architecture using a fixed-crystal reference and an on-chip PLL to generate two precise, user-selectable output frequencies (100 MHz and 125 MHz). Frequency selection is controlled by the logic level on the FS pin (pin 1), with no external components required.

It integrates an on-chip LDO regulator for supply noise rejection, supports active-high OE (pin 2), and features runt suppression on both OE and power-on transitions. The device operates across –40 °C to +85 °C and is factory-configured - no field programming is needed.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequencies	100 MHz (f₀, selected when FS = 0) and 125 MHz (f₁, selected when FS = 1)
Output Format	CMOS single-ended output with 0.85×VDD high / 0.15×VDD low logic levels
Supply Voltage	3.3 V ±10% - enables direct interface with 3.3 V I/O domains without level shifting
Total Stability	±30 ppm - includes initial accuracy, temperature, voltage, load, shock/vibration, and 10-year aging
Phase Jitter (RMS)	0.25–0.35 ps (1.875–20 MHz integration) - meets stringent jitter budgets for PCIe Gen3/Gen4 and 10G Ethernet
Startup Time	≤10 ms - ensures rapid system initialization after power-up
Operating Temp	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

Package: 3.2 × 5.0 mm, 6-pin surface-mount ceramic package (RoHS-compliant, Pb-free).

Pin/Terminal	Circuit Role	Design Meaning
1	FS (Frequency Select)	Digital control input: logic 0 selects 100 MHz; logic 1 selects 125 MHz
2	OE (Output Enable)	Active-high enable; internal pull-up; tristates output when low
3	GND	Electrical and case ground reference for all signals and power
4	CLK	CMOS clock output - single-ended, rail-to-rail swing, 15 pF load rated
5	NC	No connect - must remain unconnected per design; no internal function
6	VDD	3.3 V power supply input - filtered internally by on-chip LDO for noise immunity

Key Features

Feature	Design Value
Dual-frequency programmability	Two factory-set frequencies (100/125 MHz) selectable in real time via FS pin - eliminates need for multiple XOs or external muxing
On-chip LDO regulation	Integrated low-dropout regulator suppresses supply noise - reduces need for external bulk/bypass capacitors and improves jitter in noisy power domains
Runt suppression	Hardware-level glitch filtering on OE and power-on - prevents false clock edges during enable transitions or brown-out recovery
Wide supply tolerance	3.3 V ±10% operation - accommodates typical board-level rail variation without external regulation
Industry-standard footprint	3.2 × 5.0 mm 6-pin package - drop-in compatible with existing XO layouts and automated assembly processes

Applications

PCI Express Clocking	Gigabit Ethernet PHY Timing
Use Scenario: Providing reference clocks to PCIe root complex and endpoint devices in servers and switches. IC Role / Device Role / Timing Role: Dual-frequency XO supplying 100 MHz (for configuration space) and 125 MHz (for data link layer) clocks. Use Value: Eliminates two discrete oscillators and associated layout area; FS pin allows dynamic frequency switching during link training or power-state transitions.	Use Scenario: Synchronizing 1 GbE PHYs and MACs in enterprise routers and industrial gateways. IC Role / Device Role / Timing Role: Primary clock source delivering 125 MHz for GMII/RGMII interface and 100 MHz for management/control logic. Use Value: Meets IEEE 802.3 jitter compliance with <0.35 ps RMS phase jitter; CMOS output directly drives standard 100 Ω termination networks.
FPGA Configuration & Core Clocking	Telecom Line Card Timing
Use Scenario: Supplying startup configuration clock and high-speed transceiver reference to Xilinx/Intel FPGAs. IC Role / Device Role / Timing Role: Dual-output timing source enabling separate clocks for configuration logic (100 MHz) and SerDes PLLs (125 MHz). Use Value: Reduces BOM count and PCB footprint; OE pin allows synchronized clock gating during FPGA reconfiguration.	Use Scenario: Generating primary timing references for TDM and packet-processing ASICs in access concentrators. IC Role / Device Role / Timing Role: Stable, dual-frequency clock generator supporting 100 MHz (control plane) and 125 MHz (data plane) timing domains. Use Value: ±30 ppm total stability over 10 years ensures long-term synchronization integrity in carrier-grade systems without recalibration.

PCI Express Clocking

Gigabit Ethernet PHY Timing

Use Scenario: Providing reference clocks to PCIe root complex and endpoint devices in servers and switches.

IC Role / Device Role / Timing Role: Dual-frequency XO supplying 100 MHz (for configuration space) and 125 MHz (for data link layer) clocks.

Use Value: Eliminates two discrete oscillators and associated layout area; FS pin allows dynamic frequency switching during link training or power-state transitions.

Use Scenario: Synchronizing 1 GbE PHYs and MACs in enterprise routers and industrial gateways.

IC Role / Device Role / Timing Role: Primary clock source delivering 125 MHz for GMII/RGMII interface and 100 MHz for management/control logic.

Use Value: Meets IEEE 802.3 jitter compliance with <0.35 ps RMS phase jitter; CMOS output directly drives standard 100 Ω termination networks.

FPGA Configuration & Core Clocking

Telecom Line Card Timing

Use Scenario: Supplying startup configuration clock and high-speed transceiver reference to Xilinx/Intel FPGAs.

IC Role / Device Role / Timing Role: Dual-output timing source enabling separate clocks for configuration logic (100 MHz) and SerDes PLLs (125 MHz).

Use Value: Reduces BOM count and PCB footprint; OE pin allows synchronized clock gating during FPGA reconfiguration.

Use Scenario: Generating primary timing references for TDM and packet-processing ASICs in access concentrators.

IC Role / Device Role / Timing Role: Stable, dual-frequency clock generator supporting 100 MHz (control plane) and 125 MHz (data plane) timing domains.

Use Value: ±30 ppm total stability over 10 years ensures long-term synchronization integrity in carrier-grade systems without recalibration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si512BCA000104BAGR	Same Si512 family, 3.2 × 5.0 mm, 3.3 V CMOS, but configured for 155.52 MHz / 156.25 MHz frequencies	Targeted at SONET/SDH and OTN line cards requiring ITU-T G.823/G.8262 compliant clocks	Select when exact 155.52/156.25 MHz pair is required; identical pinout and electrical behavior otherwise
Si513BCA000594AAG	Same frequencies (100/125 MHz) and specs, but OE on pin 1 instead of pin 2 - requires PCB layout revision	Used where OE signal routing constraints favor pin-1 placement; same functional performance	Choose only if redesigning PCB to accommodate OE-on-pin-1 topology; not a drop-in replacement

Compared with 512BCA000594AAG, Si512BCA000104BAGR offers different frequency pairs for telecom sync, while Si513BCA000594AAG maintains identical timing specs but shifts OE to pin 1 - requiring layout change. Neither is pin-compatible, but both share identical jitter, stability, and supply characteristics.

Availability

512BCA000594AAG is available at Aetrix Electronics and suitable for FPGA/ASIC clock generation, PCIe timing, and Gigabit Ethernet PHY applications requiring stable component supply, short lead times (2–4 weeks), and guaranteed long-term availability.

Supply support for 512BCA000594AAG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for high-performance wireless and wired infrastructure.

The Si512/513 product line delivers factory-programmable dual-frequency XOs targeting high-reliability, low-jitter clocking in telecom, datacenter, and industrial systems where flexibility and supply chain resilience are critical.

FAQ

What are the two factory-programmed output frequencies of the 512BCA000594AAG?

The 512BCA000594AAG is configured with two precise frequencies: 100 MHz (selected when FS = 0) and 125 MHz (selected when FS = 1). These values are permanently programmed at Skyworks' factory and cannot be altered in the field. Both frequencies meet ±30 ppm total stability over temperature, voltage, and 10-year aging - verified per Table 2 in the official Si512/513 datasheet Rev. 1.2.

Is the 512BCA000594AAG pin-compatible with other Si512 variants?

Yes - the 512BCA000594AAG uses the standard Si512 CMOS pinout: FS on pin 1, OE on pin 2, GND on pin 3, CLK on pin 4, NC on pin 5, and VDD on pin 6. This matches all Si512-series CMOS devices in the 3.2 × 5.0 mm package, including Si512BCA000104BAGR. Pin compatibility enables shared PCB footprints and test fixtures across frequency variants.

Does the 512BCA000594AAG support differential output formats like LVDS or LVPECL?

No - the 512BCA000594AAG is specifically configured for CMOS output (single-ended), as indicated by the "C" in its part number prefix (512BCA…). Differential outputs (LVDS/LVPECL/HCSL) require different part numbers (e.g., "B" for LVDS, "A" for LVPECL). The internal circuitry, pin assignments (CLK only, no CLK+/CLK−), and drive strength are optimized exclusively for CMOS loads.

What is the maximum output frequency supported by the 512BCA000594AAG in CMOS mode?

The 512BCA000594AAG supports CMOS output frequencies up to 212.5 MHz, as specified in Table 2 of the Si512/513 datasheet. Its configured frequencies - 100 MHz and 125 MHz - operate well within this limit and deliver optimal jitter performance (0.25–0.35 ps RMS phase jitter) under standard 15 pF loading conditions.

How does the on-chip LDO in the 512BCA000594AAG improve system-level jitter performance?

The integrated LDO in the 512BCA000594AAG filters supply noise before it reaches the DSPLL® core, reducing sensitivity to rail disturbances. As quantified in Table 4, additive jitter due to 100 kHz VDD noise is only 3.5 ps RMS - significantly lower than discrete XO alternatives without internal regulation. This enables cleaner clock generation in electrically noisy environments such as switch-mode power supply proximity or dense digital boards.

512BCA000594AAG Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si512

Package/Case:: 6-SMD, No Lead

Packaging:: Strip

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 125MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: LVDS

Voltage - Supply:: 3.3V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 23mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

512BCA000594AAG FAQ

1.How can I place an order for 512BCA000594AAG through Aetrix?

Please submit a Request for Quotation (RFQ) for 512BCA000594AAG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 512BCA000594AAG reliable?

The price and inventory of 512BCA000594AAG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 512BCA000594AAG is usually 5 days.

3.What payment methods are accepted for 512BCA000594AAG?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 512BCA000594AAG transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 512BCA000594AAG?

512BCA000594AAG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 512BCA000594AAG order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 512BCA000594AAG?

For technical support, including 512BCA000594AAG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 512BCA000594AAG requirements.

6.How does Aetrix verify that 512BCA000594AAG is sourced from the original manufacturer or authorized distributors?

All 512BCA000594AAG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 512BCA000594AAG meets industry standards.

7.What is the process for return or replacement of 512BCA000594AAG?

All 512BCA000594AAG units undergo pre-shipment inspection (PSI). If there is an issue with 512BCA000594AAG, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 512BCA000594AAG part is unused and in its original packaging.

Return procedure for 512BCA000594AAG:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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