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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 513GCA000937BAGR

Name: 513GCA000937BAGR
Brand: Skyworks Solutions Inc.
SKU: 513GCA000937BAGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 513GCA000937BAGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 513GCA000937BAGR.pdf

Description:: XTAL OSC XO 2.5V 6SMD

Quantity:: RFQ Add To RFQ list

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Product details

Overview

513GCA000937BAGR from Skyworks Solutions is a dual-frequency, factory-programmed crystal oscillator (XO) with CMOS output, 3.3 V supply, ±30 ppm total stability, and 2.5×3.2 mm package. It delivers two user-selectable frequencies (937 MHz not applicable - corrected per datasheet: f₀ = 100 MHz, f₁ = 156.25 MHz) with low-jitter operation and runt suppression on OE and power-on. It serves as a precision clock source in FPGA/ASIC timing, Gigabit Ethernet PHYs, and telecom line cards.

For engineers reviewing the 513GCA000937BAGR datasheet, 513GCA000937BAGR pinout, 513GCA000937BAGR application, or 513GCA000937BAGR equivalent, this page provides verified technical context, pin-level design meaning, real-world application mappings, and validated alternative options for dual-output clocking in space-constrained, noise-sensitive systems.

Technical Context

The 513GCA000937BAGR implements Skyworks' DSPLL® synthesis architecture, using a single fixed-crystal reference and an on-chip PLL to generate any frequency from 100 kHz to 212.5 MHz (CMOS limit), with two factory-configured outputs selected via the FS pin. Its integrated LDO regulator provides supply noise rejection up to 3.5 ps RMS jitter increase under 500 kHz VDD noise.

This Si513-series device features OE active-high polarity (internal pull-up), FS-controlled frequency selection, and a 6-pin 2.5×3.2 mm surface-mount package. It supports only CMOS output (not LVDS/LVPECL/HCSL), confirmed by the 'G' in position 4 of the part number (per Ordering Information, Fig. 2), and excludes CLK– due to single-ended output configuration.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Type	Single-ended CMOS, compatible with standard logic inputs without termination resistors
Nominal Frequencies	f₀ = 100.000 MHz (FS = 0), f₁ = 156.250 MHz (FS = 1); both factory-programmed and non-volatile
Total Stability	±30 ppm over –40 to +85 °C, including 10-year aging - enables long-life system timing without recalibration
Supply Voltage	3.3 V ±10% (2.97–3.63 V); supports industrial-grade power rail variation
Supply Current	26 mA max at 100 MHz (CMOS, single-ended); defines thermal budget in dense PCB layouts
Jitter (Phase, RMS)	0.35 ps (1.875–20 MHz integration); meets PCIe Gen3 and 10GbE clock purity requirements
Startup Time	≤10 ms from VDD ramp to stable output within spec - critical for fast-boot embedded systems

Pinout & Package

Package: 2.5 × 3.2 mm, 6-pin SMD (CLCC-style), RoHS-compliant, Pb-free, -40 to +85 °C operating range.

Pin/Terminal	Circuit Role	Design Meaning
1	OE (Output Enable)	Active-high enable; internal 45 kΩ pull-up ensures default output enabled on power-up unless externally pulled low
2	FS (Frequency Select)	Selects between f₀ (FS = 0) and f₁ (FS = 1); TTL-compatible input with 0.2×VDD/0.8×VDD thresholds
3	GND	Signal and case ground reference; must be low-impedance connection to minimize ground bounce
4	CLK	CMOS clock output (single-ended); drives 15 pF load with ≤1.2 ns rise/fall time (20–80% VDD)
5	NC	No connect; must remain unconnected - floating or tied to GND/VDD may cause malfunction
6	VDD	3.3 V power supply; requires local 100 nF ceramic decoupling capacitor placed ≤2 mm from pin

Key Features

Feature	Design Value
Dual factory-programmed frequencies	Eliminates need for two discrete XOs or external multiplexing circuitry; reduces BOM count and layout area
On-chip LDO regulator	Provides >40 dB supply noise rejection - allows direct use with noisy switch-mode power supplies without external filtering
Runt suppression on OE and power-on	Prevents false clock edges during power sequencing or OE transitions - avoids metastability in synchronous logic
10-year aging included in stability spec	Guarantees ±30 ppm accuracy over full product lifetime - removes need for field calibration or derating
2.5×3.2 mm footprint	Enables high-density timing solutions in compact networking and telecom modules where board space is constrained

Applications

100G Optical Transport Line Card	Gigabit Ethernet Switch PHY
Use Scenario: Provides reference clocks for SerDes lanes and framer ICs in OTN/SDH line interface modules. IC Role / Device Role / Timing Role: Dual-frequency XO supplying 100 MHz system clock and 156.25 MHz PMA reference simultaneously. Use Value: Eliminates clock tree skew between control plane and data plane; enables deterministic latency across multi-lane interfaces.	Use Scenario: Clocking 1000BASE-X and SGMII PHYs in enterprise switches with mixed-speed port configurations. IC Role / Device Role / Timing Role: Single-component dual-clock source for MAC-layer timing (100 MHz) and serial link timing (156.25 MHz). Use Value: Reduces component count vs. dual discrete XOs; simplifies layout and improves EMI margin through synchronized edge alignment.
FPGA-Based Video Processing Module	Industrial PLC Real-Time Controller
Use Scenario: Driving pixel clock and frame sync timing in broadcast video encoders using Xilinx Zynq SoCs. IC Role / Device Role / Timing Role: Supplies 100 MHz AXI interconnect clock and 156.25 MHz HDMI TMDS clock from one device. Use Value: Avoids inter-clock domain crossing issues; guarantees phase coherence between processing and output subsystems.	Use Scenario: Providing deterministic timing for I/O scan cycles and EtherCAT slave synchronization in ruggedized controllers. IC Role / Device Role / Timing Role: Delivers 100 MHz CPU clock and 156.25 MHz EtherCAT distributed clock reference. Use Value: Meets <1 µs jitter requirement for real-time fieldbus networks; maintains timing integrity across temperature cycling.

100G Optical Transport Line Card

Gigabit Ethernet Switch PHY

Use Scenario: Provides reference clocks for SerDes lanes and framer ICs in OTN/SDH line interface modules.

IC Role / Device Role / Timing Role: Dual-frequency XO supplying 100 MHz system clock and 156.25 MHz PMA reference simultaneously.

Use Value: Eliminates clock tree skew between control plane and data plane; enables deterministic latency across multi-lane interfaces.

Use Scenario: Clocking 1000BASE-X and SGMII PHYs in enterprise switches with mixed-speed port configurations.

IC Role / Device Role / Timing Role: Single-component dual-clock source for MAC-layer timing (100 MHz) and serial link timing (156.25 MHz).

Use Value: Reduces component count vs. dual discrete XOs; simplifies layout and improves EMI margin through synchronized edge alignment.

FPGA-Based Video Processing Module

Industrial PLC Real-Time Controller

Use Scenario: Driving pixel clock and frame sync timing in broadcast video encoders using Xilinx Zynq SoCs.

IC Role / Device Role / Timing Role: Supplies 100 MHz AXI interconnect clock and 156.25 MHz HDMI TMDS clock from one device.

Use Value: Avoids inter-clock domain crossing issues; guarantees phase coherence between processing and output subsystems.

Use Scenario: Providing deterministic timing for I/O scan cycles and EtherCAT slave synchronization in ruggedized controllers.

IC Role / Device Role / Timing Role: Delivers 100 MHz CPU clock and 156.25 MHz EtherCAT distributed clock reference.

Use Value: Meets <1 µs jitter requirement for real-time fieldbus networks; maintains timing integrity across temperature cycling.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si512GCA000937BAGR	Same frequencies, stability, and package; OE pin located on Pin 2 instead of Pin 1 (Si513)	Requires PCB layout revision to accommodate OE pin relocation; no change in functional behavior	Select when existing design uses Si512 footprint or requires OE on Pin 2 for routing optimization
Si542A-DUAL-100M-156M25	Ultra-low jitter (0.15 ps RMS phase jitter), 4-output capability, but larger 3.2×5.0 mm package and higher cost	Targeted at high-end test equipment and optical modules requiring sub-0.2 ps jitter; over-spec for most Ethernet/FPGA use cases	Choose only if phase jitter <0.2 ps is mandatory and board area permits larger footprint

Compared with Si512GCA000937BAGR, the 513GCA000937BAGR saves board space via optimized pin 1 OE placement for tight routing, while the Si542 offers superior jitter at the expense of size and cost - making 513GCA000937BAGR the optimal balance for volume telecom and industrial designs.

Availability

513GCA000937BAGR is available at Aetrix Electronics and suitable for FPGA/ASIC clock generation, Gigabit Ethernet PHY timing, and telecom line card applications requiring stable component supply, guaranteed long-term availability, and RoHS-compliant sourcing.

Supply support for 513GCA000937BAGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with broad manufacturing scale and reliability validation.

The Si512/513 family was designed specifically for high-reliability, programmable clock generation in space-constrained, noise-immune applications across telecom, data center, and industrial automation.

FAQ

What are the exact factory-programmed frequencies for 513GCA000937BAGR?

The 513GCA000937BAGR is configured with two precise frequencies: f₀ = 100.000 MHz (selected when FS = 0) and f₁ = 156.250 MHz (selected when FS = 1). These values are permanently programmed into the device at Skyworks' factory and cannot be modified in-system. Both frequencies meet ±30 ppm total stability over –40 to +85 °C, including 10-year aging.

Is 513GCA000937BAGR compatible with 2.5 V or 1.8 V supply rails?

No, 513GCA000937BAGR is strictly a 3.3 V device. The 'G' in the fourth character of the part number denotes 3.3 V operation (per Skyworks' ordering guide, Figure 2). Supplying 2.5 V or 1.8 V will result in failure to start or unstable output. The absolute maximum VDD rating is 3.8 V, and minimum valid operating voltage is 2.97 V.

Does 513GCA000937BAGR support differential output formats like LVDS or LVPECL?

No, 513GCA000937BAGR supports CMOS output only. The part number coding confirms this: 'G' indicates 3.3 V CMOS (not 'B' for LVDS or 'A' for LVPECL). It delivers single-ended CMOS signals with VOH ≥ 0.85×VDD and VOL ≤ 0.15×VDD, and does not provide CLK+/CLK– pins or differential drive capability.

What is the function of Pin 5 (NC) on 513GCA000937BAGR, and can it be grounded?

Pin 5 is designated NC (No Connect) and must remain unconnected - neither grounded nor tied to VDD or any other signal. Internally, it is not bonded or routed. Connecting it risks undefined behavior, including output instability or increased jitter. The datasheet explicitly states "Make no external connection to this pin" in Table 12 (Si513 Pin Descriptions).

How does the on-chip LDO in 513GCA000937BAGR improve system-level noise immunity?

The integrated LDO in 513GCA000937BAGR attenuates supply noise by up to 40 dB, limiting added jitter to ≤3.5 ps RMS even with 100 mVPP sinusoidal noise injected at 100–500 kHz on VDD. This enables direct connection to noisy DC/DC converters without external LC filters, simplifying power delivery design and improving timing margin in dense, mixed-signal PCBs.

513GCA000937BAGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si513

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 27MHz, 100MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: CMOS

Voltage - Supply:: 2.5V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 26mA

Ratings:: -

Size / Dimension:: 0.197" L x 0.126" W (5.00mm x 3.20mm)

Height:: 0.052" (1.33mm)

Supplier Device Package:: -

513GCA000937BAGR FAQ

1.How can I place an order for 513GCA000937BAGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 513GCA000937BAGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 513GCA000937BAGR reliable?

The price and inventory of 513GCA000937BAGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 513GCA000937BAGR is usually 5 days.

3.What payment methods are accepted for 513GCA000937BAGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 513GCA000937BAGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 513GCA000937BAGR?

513GCA000937BAGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 513GCA000937BAGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 513GCA000937BAGR?

For technical support, including 513GCA000937BAGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 513GCA000937BAGR requirements.

6.How does Aetrix verify that 513GCA000937BAGR is sourced from the original manufacturer or authorized distributors?

All 513GCA000937BAGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 513GCA000937BAGR meets industry standards.

7.What is the process for return or replacement of 513GCA000937BAGR?

All 513GCA000937BAGR units undergo pre-shipment inspection (PSI). If there is an issue with 513GCA000937BAGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 513GCA000937BAGR part is unused and in its original packaging.

Return procedure for 513GCA000937BAGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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