Skyworks Solutions Inc. 516AHB000976AAGR

Overview

516AHB000976AAGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) supporting 100 kHz to 250 MHz output range, factory-programmed for two selectable frequencies (97.6 MHz and 125 MHz), ±20 ppm temperature stability, 150 ppm/V tuning slope, and 3.3 V CMOS output in a 5×7 mm 6-pin package. It serves as a low-jitter clock source in telecom line cards requiring frequency agility and supply noise immunity.

For engineers reviewing the 516AHB000976AAGR datasheet, 516AHB000976AAGR pinout, 516AHB000976AAGR application, or 516AHB000976AAGR equivalent, this page delivers verified electrical specs, dual-frequency switching behavior, CMOS output drive capability, thermal resistance (110 °C/W), and RoHS-compliant packaging - all critical for timing-critical FPGA/ASIC clocking and SONET/SDH systems.

Technical Context

The 516AHB000976AAGR implements an integrated PLL-based synthesizer with a fixed AT-cut fundamental-mode crystal, enabling precise dual-frequency generation without discrete crystal swaps. Its control voltage input (VC) accepts 0.1–0.9×VDD with ±10% Kv variation and 1% linearity, ensuring stable tuning under supply ripple.

Frequency selection is performed via the FS pin (0 = higher frequency = 125 MHz, 1 = lower frequency = 97.6 MHz), with settling time ≤10 ms after FS transition. The device supports tristate operation, 10 ms startup time, and operates across –40 to +85 °C with 2.97–3.63 V supply tolerance.

Key Specifications

Pinout & Package

516AHB000976AAGR uses a 5×7 mm, 6-pin surface-mount package (JEDEC MO-220, variant VAAB) with gold-over-nickel contact pads, compliant with Pb-free reflow per JEDEC J-STD-020E (peak 260 °C, 20–40 sec).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency VCXO applications.

Compared with Si516ACB000976AAGR and Si516AHB000976AAGM, the 516AHB000976AAGR uniquely delivers 3.3 V CMOS compatibility, lower power (24–29 mA), and tape-and-reel readiness - making it optimal for cost-sensitive, high-volume embedded telecom designs requiring single-ended clock distribution.

Availability

516AHB000976AAGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, PON optical line terminals, and FPGA-based protocol converters requiring stable component supply, short lead times, and guaranteed RoHS compliance.

Supply support for 516AHB000976AAGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The Si516 product line delivers programmable dual-frequency VCXOs for telecom, datacom, and broadcast infrastructure, designed to replace multiple discrete oscillators with a single configurable device while meeting stringent jitter and stability requirements.

FAQ

What are the two factory-programmed output frequencies of the 516AHB000976AAGR?

The 516AHB000976AAGR is factory-configured for 97.6 MHz (selected when FS = 1) and 125 MHz (selected when FS = 0). These values are confirmed in Skyworks' part number lookup utility and ordering documentation for code "000976", which maps directly to this dual-frequency pair. Both frequencies operate across the full –40 to +85 °C range with ±20 ppm stability.

Does the 516AHB000976AAGR support tristate functionality, and how is it controlled?

Yes, the 516AHB000976AAGR supports output disable (tristate) mode. When V_DD is applied but the output is not actively driven, supply current drops to ≤22 mA - confirming functional disable state. Unlike devices with dedicated OE pins, tristate is achieved by holding FS and VC at valid logic levels while removing clock load; the datasheet specifies no separate enable pin, and the output enters high-impedance state inherently during power-down sequencing.

What is the maximum allowable supply voltage ripple for the 516AHB000976AAGR to maintain specified jitter performance?

The 516AHB000976AAGR adds ≤3.5 ps RMS jitter when subjected to 100 mV_PP sinusoidal noise on V_DD at 100–1000 kHz frequencies, as measured in Table 5 (JPSRR). To maintain ≤1.1 ps RMS phase jitter (12 kHz–20 MHz), design guidelines recommend keeping broadband supply noise below 30 mV_PP using local 100 nF ceramic + 10 µF tantalum decoupling adjacent to the V_DD/GND pins of the 516AHB000976AAGR.

Can the 516AHB000976AAGR be used with a 2.5 V supply, or is it limited to 3.3 V?

The 516AHB000976AAGR is configured exclusively for 3.3 V operation, as indicated by the first option code "A" in its part number (per Skyworks' ordering convention in Section 4). Attempting to power the 516AHB000976AAGR at 2.5 V will result in undefined output behavior and failure to meet specifications - including VOH/VOL thresholds, drive strength, and startup time - because internal regulator and output buffer circuitry are trimmed for 3.3 V nominal supply.

How does the 516AHB000976AAGR achieve better reliability than traditional discrete VCXOs?

The 516AHB000976AAGR achieves enhanced reliability through integration of an AT-cut fundamental-mode crystal inside a hermetically sealed 5×7 mm package, eliminating external crystal mounting stresses and solder joint fatigue. Its 10-year aging specification is ±8.5 ppm (Table 3), and it passes MIL-STD-883 mechanical shock/vibration testing - outperforming discrete VCXOs that rely on overtone crystals or less robust crystal mounting methods.