Skyworks Solutions Inc. 516FAA000270BAGR

Overview

516FAA000270BAGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) delivering two factory-programmed output frequencies-156.25 MHz and 125 MHz-with ±20 ppm temperature stability, ±100 ppm absolute pull range, and 150 ppm/V tuning slope. It operates from a 3.3 V supply, supports CMOS output format, and uses an AT-cut fundamental-mode crystal for high reliability in telecom and datacom timing applications.

For engineers reviewing the 516FAA000270BAGR datasheet, 516FAA000270BAGR pinout, 516FAA000270BAGR application, or 516FAA000270BAGR equivalent, this device provides low-jitter clock generation (0.25–0.35 ps RMS phase jitter), selectable dual-frequency operation via FS pin, and industry-standard 2.5 × 3.2 mm 6-pin package compatibility with tight aging (±8.5 ppm over 10 years).

Technical Context

The 516FAA000270BAGR implements a PLL-based frequency synthesis architecture using a fixed AT-cut crystal and proprietary digital synthesizer to generate any frequency from 100 kHz to 212.5 MHz (CMOS), eliminating need for multiple crystals. Its dual-frequency capability is controlled by a single digital FS input that selects between two preconfigured frequencies.

It features 1% control voltage linearity, 100 kΩ V_C input impedance, and high power supply noise rejection-measured at ≤4.0 ps additive jitter under 100 kHz VDD noise-enabling stable low-jitter PLL design in electrically noisy environments such as switch/router line cards and PON OLTs.

Key Specifications

Pinout & Package

516FAA000270BAGR is housed in a RoHS-compliant, lead-free 2.5 × 3.2 mm 6-pin surface-mount package (package code "B" per Skyworks ordering convention), with gold-over-nickel contact pads and JEDEC J-STD-020E reflow compliance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency VCXO applications.

Compared with Si516FAA000213AAG, 516FAA000270BAGR offers 30% smaller footprint and improved thermal resistance (164 °C/W vs. 110 °C/W), while compared with Si516FAB000270BAGR, it delivers 25% wider pull range and 25% higher tuning sensitivity-critical for tight-loop PLL designs in telecom infrastructure.

Availability

516FAA000270BAGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, PON optical line terminals, and FPGA-based packet switches requiring stable component supply with guaranteed long-term continuity.

Supply support for 516FAA000270BAGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The Si516 product line was designed specifically for high-reliability, low-jitter timing in telecom, datacom, and broadcast video infrastructure-emphasizing factory-programmable flexibility, crystal-based stability, and rapid customization without NRE.

FAQ

What output frequencies does the 516FAA000270BAGR provide?

The 516FAA000270BAGR is factory-programmed to deliver two precise frequencies: 156.25 MHz and 125 MHz. These are selected via the FS pin-logic low chooses 125 MHz, logic high selects 156.25 MHz. Both frequencies are fully specified across the operating temperature range (–40 to +85 °C) and meet jitter and stability requirements per Tables 3 and 5–8 in the Skyworks Si516 datasheet Rev. 1.2.

What is the package type and pin configuration of the 516FAA000270BAGR?

The 516FAA000270BAGR uses a 2.5 × 3.2 mm, 6-pin surface-mount package (package code "B"). Pin 1 is V_C, Pin 2 is FS, Pin 3 is GND, Pin 4 is CLK (CMOS output), Pin 5 is NC, and Pin 6 is V_DD. This matches the "CMOS Dual VCXO" pinout shown on page 12 of the Si516 datasheet Rev. 1.2, and is verified against Skyworks' official package outline diagram (Figure 7) and land pattern (Table 19).

Does the 516FAA000270BAGR support differential outputs like LVDS or LVPECL?

No-the 516FAA000270BAGR is configured exclusively for CMOS output format, as indicated by the second option code "A" in its part number and confirmed in Table 12 (CMOS pin descriptions). It does not support LVDS, LVPECL, or HCSL outputs. For differential variants, Skyworks offers part numbers with option codes B (LVDS), D (HCSL), or A with different package/output combinations-but those are distinct SKUs, not functionally interchangeable with 516FAA000270BAGR.

What is the control voltage range and tuning linearity specification for the 516FAA000270BAGR?

The 516FAA000270BAGR accepts a control voltage (V_C) from 0.1 × V_DD to 0.9 × V_DD, i.e., 0.33 V to 2.97 V at 3.3 V supply. Its tuning slope is 150 ppm/V with ±10% variation, and control voltage linearity is ±1% BSL (best straight-line), as specified in Table 2 of the Si516 datasheet Rev. 1.2. This ensures predictable, monotonic frequency adjustment across the full ±100 ppm absolute pull range.

How does the 516FAA000270BAGR achieve low phase jitter despite using a programmable PLL architecture?

The 516FAA000270BAGR achieves 0.25–0.35 ps RMS phase jitter (1.875–20 MHz) through Skyworks' proprietary PLL design optimized for low-noise fractional-N synthesis, combined with an AT-cut fundamental-mode crystal resonator. Its high PSRR (≤4.0 ps additive jitter under 100 kHz VDD noise) and 1% V_C linearity minimize noise injection paths-verified in Table 5 (LVPECL) and Table 8 (CMOS) of the datasheet Rev. 1.2.