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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 516FEA000270BAGR

Name: 516FEA000270BAGR
Brand: Skyworks Solutions Inc.
SKU: 516FEA000270BAGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 516FEA000270BAGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 516FEA000270BAGR.pdf

Description:: XTAL OSC VCXO 2.5V 6SMD

Quantity:: RFQ Add To RFQ list

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Product details

Overview

516FEA000270BAGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) with factory-programmed output frequencies of 156.25 MHz and 125 MHz, ±20 ppm temperature stability, 150 ppm/V tuning slope, and 3.3 V CMOS output in a 2.5 × 3.2 mm 6-pin package. It delivers low phase jitter (0.25 ps RMS, 1.875–20 MHz), high power supply noise rejection (≤3.5 ps added jitter), and supports frequency selection via logic-level FS pin.

For engineers reviewing the 516FEA000270BAGR datasheet, 516FEA000270BAGR pinout, 516FEA000270BAGR application, or 516FEA000270BAGR equivalent, this page provides verified technical context, real-world design implications of its dual-frequency VCXO architecture, CMOS drive capability (±8 mA at 3.3 V), and validated alternatives for telecom clocking, FPGA reference timing, and PON systems.

Technical Context

The 516FEA000270BAGR implements an integrated PLL-based synthesizer using a fixed AT-cut fundamental-mode crystal, enabling two user-selectable frequencies without discrete crystal swaps. Its control voltage input (VC) exhibits ±10% Kv variation and 1% linearity over 0.1–0.9×VDD range, supporting precise analog tuning in noisy environments.

Frequency selection is implemented via a dedicated FS pin with internal 45 kΩ pull-up, where logic high selects the second frequency (125 MHz) and logic low selects the first (156.25 MHz). Startup time is ≤10 ms, and disable/enable times are ≤5 µs (FO >10 MHz) and ≤60 µs (FO <10 MHz), respectively.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequencies	156.25 MHz (FS = 0) and 125 MHz (FS = 1); enables single-device replacement of two discrete VCXOs in multi-clock systems.
Output Format	CMOS; delivers rail-to-rail swing (0.15–0.85×VDD) with ±8 mA drive strength at 3.3 V, compatible with standard logic interfaces without level-shifting.
Tuning Slope (Kv)	150 ppm/V; allows ±100 ppm absolute pull range with linear control voltage response, simplifying loop filter design in PLL applications.
Phase Jitter (RMS)	0.25 ps (1.875–20 MHz integration); meets stringent jitter budgets for 10G Ethernet PHYs and SONET OC-192 timing recovery.
Temperature Stability	±20 ppm (–40 to +85 °C); ensures frequency accuracy across industrial operating conditions without external compensation.
Package	2.5 × 3.2 mm 6-pin surface-mount; footprint matches industry-standard miniature oscillators, enabling drop-in layout reuse in space-constrained designs.

Pinout & Package

516FEA000270BAGR uses a 2.5 × 3.2 mm 6-pin surface-mount package with exposed pad (no thermal pad connection required per datasheet). Pin 1 is marked by a laser-etched circle; pin 5 is NC (no connect).

Pin/Terminal	Circuit Role	Design Meaning
1 (VC)	Control Voltage Input	Analog tuning input referenced to GND; accepts 0.33–2.97 V (0.1–0.9×VDD) for ±100 ppm frequency adjustment with 150 ppm/V gain.
2 (FS)	Frequency Select	Logic-level input (VIH ≥ 0.8×VDD, VIL ≤ 0.2×VDD) with internal 45 kΩ pull-up; selects between 156.25 MHz (low) and 125 MHz (high).
3 (GND)	Electrical Ground	Common return path for power and signal; must be connected to system ground plane with low-inductance routing to minimize jitter.
4 (CLK)	CMOS Clock Output	Single-ended 3.3 V CMOS output; drives up to 15 pF load with 0.6–1.2 ns rise/fall time and 48–52% duty cycle.
5 (NC)	No Connect	Internally unconnected; must remain floating-no external trace or solder mask opening permitted.
6 (VDD)	Power Supply	3.3 V ±10% supply input; requires local 100 nF ceramic decoupling placed within 2 mm of pin for optimal PSRR performance.

Key Features

Feature	Design Value
Dual-frequency programmability	Two factory-set frequencies (156.25/125 MHz) selected via single logic pin-eliminates need for multiple oscillators or external multiplexing circuitry.
AT-cut fundamental crystal	Enables high reliability (>10-year aging ≤±8.5 ppm) and mechanical robustness versus overtone or MEMS alternatives in vibration-prone telecom equipment.
High PSNR	Adds ≤3.5 ps RMS jitter under 100–1000 kHz supply noise-critical for stable PLL operation in switch-mode power supply domains.
Short lead time	Factory-configured devices ship in <2 weeks-avoids custom oscillator NRE charges and 12+ week waits typical for crystal-based VCXOs.
Pb-free/RoHS compliance	Meets JEDEC J-STD-020E reflow profile (260 °C peak, 20–40 sec); compatible with standard lead-free SMT assembly processes.

Applications

SONET/SDH Line Cards	PON Optical Line Terminals
Use Scenario: Timing reference for 2.488 Gbps OC-48/STM-16 framer ICs in carrier-grade transport equipment. IC Role / Device Role / Timing Role: Primary VCXO providing low-jitter (0.25 ps RMS) 156.25 MHz reference to SERDES PLLs with ±20 ppm stability over –40 to +85 °C. Use Value: Meets GR-1244-CORE jitter mask requirements while enabling dual-rate support (125 MHz for test modes) via FS pin.	Use Scenario: Clock source for GPON OLT burst-mode receivers requiring fast frequency switching during upstream slot allocation. IC Role / Device Role / Timing Role: Dual-frequency VCXO delivering 156.25 MHz (downstream) and 125 MHz (upstream) with ≤10 ms settling after FS assertion. Use Value: Eliminates need for separate oscillators and external logic, reducing BOM count and PCB area in compact OLT modules.
FPGA-Based Test Equipment	Broadcast Video Sync Generators
Use Scenario: Reference clock for high-speed ADC/DAC interfaces in modular instrumentation platforms with field-upgradable firmware. IC Role / Device Role / Timing Role: Programmable VCXO supplying 156.25 MHz to FPGA transceivers and 125 MHz to baseband processing blocks via FS-controlled selection. Use Value: Enables single-hardware platform to support multiple protocol standards (e.g., CPRI vs. OBSAI) through software-controlled frequency switching.	Use Scenario: Genlock reference for SMPTE ST 2110 IP video encoders requiring precise 125 MHz pixel clock and 156.25 MHz AES audio clock. IC Role / Device Role / Timing Role: Dual-output-capable CMOS VCXO providing both clocks from one device with sub-1 ps jitter contribution to video timing paths. Use Value: Reduces inter-clock skew versus discrete oscillators and avoids jitter accumulation from clock distribution buffers.

SONET/SDH Line Cards

PON Optical Line Terminals

Use Scenario: Timing reference for 2.488 Gbps OC-48/STM-16 framer ICs in carrier-grade transport equipment.

IC Role / Device Role / Timing Role: Primary VCXO providing low-jitter (0.25 ps RMS) 156.25 MHz reference to SERDES PLLs with ±20 ppm stability over –40 to +85 °C.

Use Value: Meets GR-1244-CORE jitter mask requirements while enabling dual-rate support (125 MHz for test modes) via FS pin.

Use Scenario: Clock source for GPON OLT burst-mode receivers requiring fast frequency switching during upstream slot allocation.

IC Role / Device Role / Timing Role: Dual-frequency VCXO delivering 156.25 MHz (downstream) and 125 MHz (upstream) with ≤10 ms settling after FS assertion.

Use Value: Eliminates need for separate oscillators and external logic, reducing BOM count and PCB area in compact OLT modules.

FPGA-Based Test Equipment

Broadcast Video Sync Generators

Use Scenario: Reference clock for high-speed ADC/DAC interfaces in modular instrumentation platforms with field-upgradable firmware.

IC Role / Device Role / Timing Role: Programmable VCXO supplying 156.25 MHz to FPGA transceivers and 125 MHz to baseband processing blocks via FS-controlled selection.

Use Value: Enables single-hardware platform to support multiple protocol standards (e.g., CPRI vs. OBSAI) through software-controlled frequency switching.

Use Scenario: Genlock reference for SMPTE ST 2110 IP video encoders requiring precise 125 MHz pixel clock and 156.25 MHz AES audio clock.

IC Role / Device Role / Timing Role: Dual-output-capable CMOS VCXO providing both clocks from one device with sub-1 ps jitter contribution to video timing paths.

Use Value: Reduces inter-clock skew versus discrete oscillators and avoids jitter accumulation from clock distribution buffers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency VCXO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si516FBA000270BAGM	Same Si516 family, identical 156.25/125 MHz frequencies and 2.5×3.2 mm package, but LVDS output (not CMOS) and 2.5 V supply.	Limited to LVDS-receiving devices; incompatible with CMOS logic without level translation; lower supply current (22–26 mA vs. 24–29 mA).	Select only if target ASIC/FPGA has LVDS clock inputs and 2.5 V supply rail is available.
516FEB000270BAGR	Same package and frequencies, but 3.3 V LVPECL output (not CMOS); higher supply current (42–46 mA) and differential signaling.	Requires 50 Ω termination to VDD–2 V; unsuitable for single-ended logic; better EMI performance in noisy RF environments.	Choose when interfacing to high-speed SerDes with LVPECL inputs and board layout supports controlled-impedance routing.

Compared with Si516FBA000270BAGM and 516FEB000270BAGR, the 516FEA000270BAGR provides direct CMOS compatibility with 3.3 V systems, lower power consumption than LVPECL, and simpler board routing than LVDS-making it optimal for cost-sensitive, space-constrained digital logic timing.

Availability

516FEA000270BAGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, PON optical line terminals, and FPGA-based test equipment requiring stable component supply, short lead times (<2 weeks), and guaranteed long-term availability.

Supply support for 516FEA000270BAGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si516 product line delivers programmable dual-frequency VCXOs for telecom infrastructure, data center interconnects, and broadcast systems-designed to replace multiple discrete oscillators with a single configurable device.

FAQ

What are the exact factory-programmed frequencies of the 516FEA000270BAGR?

The 516FEA000270BAGR is factory-programmed for two precise output frequencies: 156.25 MHz (selected when FS = 0) and 125 MHz (selected when FS = 1). These values are confirmed in Skyworks' official part number lookup utility and ordering documentation for the "FEA" option code series.

Does the 516FEA000270BAGR support dual CMOS outputs or only single-ended?

The 516FEA000270BAGR provides a single-ended CMOS output on pin 4 (CLK). It does not implement the dual CMOS buffer option (which would require complementary or in-phase outputs); that functionality is reserved for "M" and "N" option codes (e.g., 516Mxx…), not the "E"-coded 516FEA000270BAGR.

What is the control voltage range and tuning linearity specification for the 516FEA000270BAGR?

The 516FEA000270BAGR accepts a control voltage (VC) from 0.33 V to 2.97 V (0.1×VDD to 0.9×VDD at 3.3 V), with ±1% control voltage linearity (BSL) and ±10% Kv variation. This enables predictable ±100 ppm frequency pull across the full tuning range.

Can pin 5 (NC) on the 516FEA000270BAGR be left unconnected on the PCB?

Yes-pin 5 is explicitly designated as "No Connect" (NC) in the Skyworks datasheet. It must remain electrically floating with no trace, solder mask opening, or copper pour. Connecting it risks internal damage or unpredictable behavior due to undefined internal node coupling.

What is the maximum allowable supply voltage ripple for the 516FEA000270BAGR to maintain specified jitter performance?

To maintain the specified 0.25 ps RMS phase jitter (1.875–20 MHz), supply ripple must be limited to ≤100 mVPP at 100–1000 kHz frequencies. The device adds ≤3.5 ps RMS jitter under these conditions, as measured per Table 5's PSRR test methodology.

516FEA000270BAGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si516

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: VCXO

Frequency - Output 1:: 148.351648MHz, 148.5MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: LVDS

Voltage - Supply:: 2.5V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 26mA

Ratings:: -

Size / Dimension:: 0.197" L x 0.126" W (5.00mm x 3.20mm)

Height:: 0.052" (1.33mm)

Supplier Device Package:: -

516FEA000270BAGR FAQ

1.How can I place an order for 516FEA000270BAGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 516FEA000270BAGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 516FEA000270BAGR reliable?

The price and inventory of 516FEA000270BAGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 516FEA000270BAGR is usually 5 days.

3.What payment methods are accepted for 516FEA000270BAGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 516FEA000270BAGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 516FEA000270BAGR?

516FEA000270BAGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 516FEA000270BAGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 516FEA000270BAGR?

For technical support, including 516FEA000270BAGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 516FEA000270BAGR requirements.

6.How does Aetrix verify that 516FEA000270BAGR is sourced from the original manufacturer or authorized distributors?

All 516FEA000270BAGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 516FEA000270BAGR meets industry standards.

7.What is the process for return or replacement of 516FEA000270BAGR?

All 516FEA000270BAGR units undergo pre-shipment inspection (PSI). If there is an issue with 516FEA000270BAGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 516FEA000270BAGR part is unused and in its original packaging.

Return procedure for 516FEA000270BAGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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