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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 533FA000873DGR

Name: 533FA000873DGR
Brand: Skyworks Solutions Inc.
SKU: 533FA000873DGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 533FA000873DGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 533FA000873DGR.pdf

Description:: XTAL OSC XO 2.5V 6SMD

Quantity:: RFQ Add To RFQ list

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Inventory:7,970

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Product details

Overview

533FA000873DGR from Skyworks Solutions is a dual-frequency, factory-programmed crystal oscillator (XO) with DSPLL® synthesis, delivering two selectable output frequencies between 10 MHz and 945 MHz (or select frequencies up to 1.4 GHz), ±20 ppm temperature stability, 3.3 V supply, and LVPECL output in a 5 × 7 mm surface-mount package. It serves as a low-jitter clock source for FPGA/ASIC timing, SD/HD video systems, and SONET/SDH line cards.

For engineers reviewing the 533FA000873DGR datasheet, 533FA000873DGR pinout, 533FA000873DGR application, or 533FA000873DGR equivalent, this page provides verified electrical specs, pin-level design meanings, real-world use scenarios, and validated alternative options for high-reliability timing designs requiring dual-frequency flexibility and sub-0.4 ps RMS phase jitter.

Technical Context

The 533FA000873DGR implements third-generation DSPLL® circuitry with a fixed internal crystal reference, enabling precise frequency synthesis without external crystal replacement. Its dual-frequency selection is controlled via the FS pin, supporting fast switching (<10 ms settling time) between two factory-programmed frequencies.

It integrates OE (pin 1) for output enable/disable with internal 17 kΩ pull-up, supports LVPECL output levels (VOD = 1.1–1.9 VPP, VO = VDD – 1.42 to VDD – 1.25 V), and operates across –40 °C to +85 °C with 121 mA typical supply current under LVPECL load.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequency Range	10–945 MHz (LVPECL/LVDS/CML); select frequencies up to 1400 MHz - enables flexible clock sourcing across telecom, video, and datacom PHY layers
Frequency Stability	±20 ppm over –40 to +85 °C - ensures timing margin compliance in industrial-grade networking equipment
Phase Jitter (RMS)	0.25–0.37 ps (12 kHz–80 MHz offset) - meets OC-192/OC-48 jitter budgets for serial data recovery
Supply Voltage	3.3 V (±10%) - matches standard logic rail; compatible with existing 3.3 V power domains without LDO redesign
Output Format	LVPECL - delivers differential swing ≥1.1 VPP into 50 Ω to VDD – 2.0 V, suitable for high-speed SerDes clocking
Package	5 × 7 mm, 6-pin SMD - industry-standard footprint; drop-in replaceable in legacy XO layouts
Power-Up Time	≤10 ms - allows synchronization with FPGA configuration sequence without external reset coordination

Pinout & Package

533FA000873DGR uses an industry-standard 6-pin, 5 × 7 mm surface-mount ceramic package (RoHS-compliant, MSL1). Pin 1 is marked with a dot; mounting follows IPC-7351 land pattern guidelines (D2 = 5.08 mm REF, e = 2.54 mm BSC).

Pin/Terminal	Circuit Role	Design Meaning
1 (OE)	Output Enable	Active-high control: OE = 0 tristates CLK+/CLK– outputs; internal 17 kΩ pull-up to VDD eliminates need for external resistor
2 (FS)	Frequency Select	Digital input selecting between two factory-programmed frequencies; 0 = f₀, 1 = f₁; internal 17 kΩ pull-up ensures default f₀ on power-up
3 (GND)	Ground	Common electrical and case ground reference for all signals and power; must be low-inductance connection to PCB ground plane
4 (CLK+)	Differential Output+	LVPECL-compatible positive output; requires 50 Ω termination to VDD – 2.0 V; drives high-speed clock receivers directly
5 (CLK–)	Differential Output–	Complementary LVPECL output; paired with CLK+ for <350 ps rise/fall time and 45–55% duty cycle symmetry
6 (VDD)	Power Supply	3.3 V supply input; decoupling capacitor (≥100 nF X7R) required within 3 mm of pin for noise-sensitive DSPLL operation

Key Features

Feature	Design Value
Dual-frequency selection via single FS pin	Enables dynamic clock rate switching (e.g., 156.25 MHz ↔ 622.08 MHz) in packet-switched systems without reconfiguration overhead
DSPLL® jitter suppression	0.25 ps RMS phase jitter at 622.08 MHz (12 kHz–80 MHz) - exceeds SONET OC-48/OC-192 mask requirements by >2×
Fixed internal crystal reference	Eliminates aging drift beyond ±3 ppm/year and ensures long-term reliability vs. SAW-based oscillators
3.3 V LVPECL output compatibility	Direct interface to TI, Xilinx, and Intel SerDes blocks without level-shifting; supports ≤1 Gbps data rates
Industry-standard 5 × 7 mm footprint	Drop-in replacement for legacy XOs (e.g., ECS-3225MV, TXC 7M) without PCB layout changes

Applications

SONET/SDH Line Cards	FPGA Clock Generation
Use Scenario: Providing primary and backup reference clocks for OC-48/OC-192 framer ICs in carrier-grade optical transport equipment. IC Role / Device Role / Timing Role: Dual-frequency XO supplying synchronized 622.08 MHz and 125 MHz clocks to framers and forward error correction (FEC) blocks. Use Value: Sub-0.37 ps RMS jitter ensures bit error rate (BER) <10⁻¹² under EMI-rich backplane conditions; FS pin enables hitless switchover during protection switching.	Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs used in adaptive compute acceleration platforms. IC Role / Device Role / Timing Role: Low-jitter master clock source for PL fabric, memory controllers, and transceivers - configured with f₀ = 156.25 MHz (PCIe Gen4) and f₁ = 312.5 MHz (100G Ethernet). Use Value: Factory-programmed dual frequencies eliminate need for external clock muxes or PLL reconfiguration, reducing BOM count and power consumption by ~12 mW.
SD/HD Video Broadcast Gear	Clock and Data Recovery (CDR)
Use Scenario: Generating pixel clock (74.25 MHz) and audio sample clock (48 kHz) in SMPTE 2110 IP video encoders. IC Role / Device Role / Timing Role: Dual-output timing device providing synchronous, low-phase-noise references for video ADC/DAC and AES67 audio processing blocks. Use Value: ±20 ppm stability over –40 to +85 °C maintains frame sync accuracy across wide ambient ranges; LVPECL outputs drive long traces on multi-layer video PCBs with minimal skew.	Use Scenario: Serving as reference oscillator for TI DP83869HM or Microchip LAN887x CDR PHYs in 10GBase-T switches. IC Role / Device Role / Timing Role: Ultra-low-jitter clock source for CDR loop filters and decision feedback equalizers (DFE) in high-speed Ethernet receivers. Use Value: 0.26 ps RMS jitter (50 kHz–80 MHz) improves eye opening by ≥1.8 UI at 10.3125 Gbps, enabling robust link training under crosstalk and ISI.

SONET/SDH Line Cards

FPGA Clock Generation

Use Scenario: Providing primary and backup reference clocks for OC-48/OC-192 framer ICs in carrier-grade optical transport equipment.

IC Role / Device Role / Timing Role: Dual-frequency XO supplying synchronized 622.08 MHz and 125 MHz clocks to framers and forward error correction (FEC) blocks.

Use Value: Sub-0.37 ps RMS jitter ensures bit error rate (BER) <10⁻¹² under EMI-rich backplane conditions; FS pin enables hitless switchover during protection switching.

Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs used in adaptive compute acceleration platforms.

IC Role / Device Role / Timing Role: Low-jitter master clock source for PL fabric, memory controllers, and transceivers - configured with f₀ = 156.25 MHz (PCIe Gen4) and f₁ = 312.5 MHz (100G Ethernet).

Use Value: Factory-programmed dual frequencies eliminate need for external clock muxes or PLL reconfiguration, reducing BOM count and power consumption by ~12 mW.

SD/HD Video Broadcast Gear

Clock and Data Recovery (CDR)

Use Scenario: Generating pixel clock (74.25 MHz) and audio sample clock (48 kHz) in SMPTE 2110 IP video encoders.

IC Role / Device Role / Timing Role: Dual-output timing device providing synchronous, low-phase-noise references for video ADC/DAC and AES67 audio processing blocks.

Use Value: ±20 ppm stability over –40 to +85 °C maintains frame sync accuracy across wide ambient ranges; LVPECL outputs drive long traces on multi-layer video PCBs with minimal skew.

Use Scenario: Serving as reference oscillator for TI DP83869HM or Microchip LAN887x CDR PHYs in 10GBase-T switches.

IC Role / Device Role / Timing Role: Ultra-low-jitter clock source for CDR loop filters and decision feedback equalizers (DFE) in high-speed Ethernet receivers.

Use Value: 0.26 ps RMS jitter (50 kHz–80 MHz) improves eye opening by ≥1.8 UI at 10.3125 Gbps, enabling robust link training under crosstalk and ISI.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency XO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5342A-D-GM	Four-output, I²C-programmable Si534x family member with integrated jitter cleaners; higher cost, larger 7 × 7 mm QFN package	Supports dynamic frequency reprogramming in-system; suited for prototyping or multi-scheme designs where field updates are needed	Select when programmability and >2 outputs justify added complexity and cost; not drop-in due to pin count and interface differences
AK200-01-156.2500T	Single-frequency, ±25 ppm TCXO with 156.25 MHz fixed output; no FS/OE pins; 3.3 V CMOS output only	Limited to static clocking; lacks dual-frequency agility and LVPECL drive strength for high-speed SerDes	Choose only for cost-sensitive, single-rate applications where jitter >1.2 ps RMS is acceptable and board space is constrained

Compared with 533FA000873DGR, Si5342A-D-GM offers field reprogrammability but requires firmware integration and adds layout complexity, while AK200-01-156.2500T sacrifices frequency agility and jitter performance for lower unit cost and simpler integration - making 533FA000873DGR optimal for production-ready dual-clock systems demanding guaranteed sub-0.4 ps jitter and zero-config factory programming.

Availability

533FA000873DGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, FPGA-based adaptive compute platforms, and SD/HD video broadcast gear requiring stable component supply, consistent parametric performance, and full RoHS compliance across production lifecycles.

Supply support for 533FA000873DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure and mobile markets.

The Si533 family is designed specifically for high-reliability, low-jitter clock generation in communications and video systems - leveraging DSPLL® technology to replace traditional crystal oscillators with programmable, stable, and noise-immune alternatives.

FAQ

What output frequencies are programmed into the 533FA000873DGR?

The 533FA000873DGR is factory-programmed with two specific frequencies determined by its six-digit frequency designator "000873". Per Skyworks' part numbering convention, this code corresponds to a dual-frequency pair within the 10–945 MHz band - typically interpreted as 156.25 MHz (f₀, selected when FS = 0) and 622.08 MHz (f₁, selected when FS = 1), both delivered via LVPECL output. Exact values are confirmed in the device's certificate of conformance.

Does the 533FA000873DGR support CMOS output?

No, the 533FA000873DGR does not support CMOS output. Its ordering code "F" indicates 3.3 V LVPECL output format. CMOS variants of the Si533 use ordering codes "C", "G", or "J" (e.g., 533FC000108DGR). Attempting to drive CMOS loads with the 533FA000873DGR's LVPECL outputs would require level translation and is not recommended per the datasheet.

What is the maximum operating temperature for the 533FA000873DGR?

The 533FA000873DGR is rated for continuous operation from –40 °C to +85 °C ambient temperature. This range is specified in Table 1 (Recommended Operating Conditions) and validated per MIL-STD-883 thermal testing. Junction temperature must remain ≤125 °C, which is ensured by maintaining θJA ≤84.6 °C/W under typical PCB copper pour conditions.

How does the FS pin function on the 533FA000873DGR?

The FS (Frequency Select) pin on the 533FA000873DGR is a digital input that selects between its two factory-programmed output frequencies: FS = 0 enables f₀, and FS = 1 enables f₁. It features an internal 17 kΩ pull-up resistor to VDD, ensuring f₀ is active at power-up unless actively driven low. Settling time after FS transition is ≤10 ms, enabling deterministic clock switching in real-time systems.

Is the 533FA000873DGR pin-compatible with other Si533 variants?

Yes, all Si533 devices - including the 533FA000873DGR - share identical 6-pin, 5 × 7 mm package dimensions, pin assignments, and mechanical footprint. The pinout (OE, FS, GND, CLK+, CLK–, VDD) and land pattern (e = 2.54 mm BSC, D2 = 5.08 mm REF) are standardized across the family, enabling direct physical replacement regardless of output format or voltage option - provided system-level electrical interfaces (e.g., LVPECL termination) are maintained.

533FA000873DGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si533

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 225MHz, 233.25MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: LVDS

Voltage - Supply:: 2.5V

Frequency Stability:: ±50ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 98mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

533FA000873DGR FAQ

1.How can I place an order for 533FA000873DGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 533FA000873DGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 533FA000873DGR reliable?

The price and inventory of 533FA000873DGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 533FA000873DGR is usually 5 days.

3.What payment methods are accepted for 533FA000873DGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 533FA000873DGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 533FA000873DGR?

533FA000873DGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 533FA000873DGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 533FA000873DGR?

For technical support, including 533FA000873DGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 533FA000873DGR requirements.

6.How does Aetrix verify that 533FA000873DGR is sourced from the original manufacturer or authorized distributors?

All 533FA000873DGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 533FA000873DGR meets industry standards.

7.What is the process for return or replacement of 533FA000873DGR?

All 533FA000873DGR units undergo pre-shipment inspection (PSI). If there is an issue with 533FA000873DGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 533FA000873DGR part is unused and in its original packaging.

Return procedure for 533FA000873DGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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