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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 533KA000873DGR

Name: 533KA000873DGR
Brand: Skyworks Solutions Inc.
SKU: 533KA000873DGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 533KA000873DGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 533KA000873DGR.pdf

Description:: XTAL OSC XO 1.8V 6SMD

Quantity:: RFQ Add To RFQ list

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Inventory:7,723

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Product details

Overview

533KA000873DGR from Skyworks Solutions is a dual-frequency, factory-programmed crystal oscillator (XO) with DSPLL® synthesis, delivering two selectable output frequencies between 10 MHz and 945 MHz (or select bands up to 1400 MHz), ±7 ppm temperature stability, 3.3 V supply, and CML output in a 5 × 7 mm 6-pin package. It serves as a low-jitter clock source for FPGA/ASIC timing in high-noise communication systems.

For engineers reviewing the 533KA000873DGR datasheet, 533KA000873DGR pinout, 533KA000873DGR application, or 533KA000873DGR equivalent, this part supports frequency switching via FS pin, tristate control via OE, and operates across –40 °C to +85 °C with sub-0.4 ps RMS phase jitter (12 kHz–20 MHz) at >500 MHz outputs.

Technical Context

The 533KA000873DGR implements third-generation DSPLL® architecture with a fixed internal crystal reference, enabling any-frequency synthesis without external VCXO tuning. Its dual-frequency capability is controlled by the FS pin, selecting between two factory-programmed frequencies.

It integrates on-chip 17 kΩ pull-up resistors on OE and FS pins, supports CML output with 1.1–1.9 VPP differential swing (3.3 V option), and achieves ±7 ppm temperature stability over –40 °C to +85 °C - verified per Table 2 and Section 3 ordering conventions.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequency Range	10–945 MHz (any-frequency); select bands up to 1400 MHz - enables flexible clock sourcing without custom crystals
Temperature Stability	±7 ppm - ensures tight frequency accuracy across industrial temperature range (–40 °C to +85 °C)
Phase Jitter (RMS)	0.25–0.40 ps (12 kHz–20 MHz, FOUT > 500 MHz) - meets OC-48/OC-192 timing budgets for serial data recovery
Supply Voltage	3.3 V (VDD = 2.97–3.63 V) - compatible with standard logic rails and noise-tolerant power domains
Output Format	CML - provides high-speed, low-skew differential signaling with 1.5 V typical mid-level and 1.5 VPP typical swing
Package	5 × 7 mm, 6-pin surface-mount - industry-standard footprint with GND/VDD/CLK+/CLK–/OE/FS pinout
Powerup Time	≤10 ms - enables fast system initialization after reset or power sequencing

Pinout & Package

533KA000873DGR uses an industry-standard 5 × 7 mm, 6-pad surface-mount package with exposed pad thermal enhancement (θJA = 84.6 °C/W). Pin 1 is marked with a dot; orientation follows top-view layout.

Pin/Terminal	Circuit Role	Design Meaning
1 (OE)	Output Enable	Active-high control: OE = 0 disables CLK+/CLK– (tristate); includes internal 17 kΩ pull-up to VDD
2 (FS)	Frequency Select	Selects between two factory-programmed frequencies: FS = 0 → f₀, FS = 1 → f₁; internal 17 kΩ pull-up to VDD
3 (GND)	Ground	Common electrical and case ground reference for all signals and power return path
4 (CLK+)	Differential Clock Output	True leg of CML output pair; requires 50 Ω termination to VDD – 1.3 V for proper operation
5 (CLK–)	Complementary Clock Output	Inverted leg of CML output pair; used with CLK+ for balanced differential signaling
6 (VDD)	Power Supply	3.3 V supply input (2.97–3.63 V); decoupling capacitor required near pin for noise suppression

Key Features

Feature	Design Value
Dual-frequency selection via FS pin	Enables dynamic clock switching between two factory-set frequencies without reprogramming or external components
DSPLL® jitter reduction	Delivers ≤0.40 ps RMS phase jitter (12 kHz–20 MHz) - critical for SerDes and high-speed ADC/DAC sampling clocks
Fixed internal crystal reference	Eliminates aging drift and mechanical sensitivity of external crystals; guarantees ±3 ppm first-year aging
CML output compatibility	Supports 3.3 V CML with 1.5 VPP typical swing and <350 ps rise/fall time - interoperable with FPGA transceivers and ASIC clock inputs
Industry-standard 5 × 7 mm footprint	Drop-in replacement for legacy XOs; simplifies PCB redesign and qualifies for existing assembly processes

Applications

SONET/SDH Line Cards	High-Speed Networking Switches
Use Scenario: Synchronous optical transport at OC-48/OC-192 rates requiring deterministic clock recovery and low-phase-noise timing. IC Role / Device Role / Timing Role: Primary reference clock generator for framer, mapper, and SERDES ICs with dual-frequency support for hitless protection switching. Use Value: Sub-0.4 ps RMS jitter ensures BER <10⁻¹² under EMI-rich backplane conditions; ±7 ppm stability maintains frame alignment across temperature swings.	Use Scenario: 10/25/100 GbE switch fabric where multiple line-rate clocks must be synchronized across ASICs and PHYs. IC Role / Device Role / Timing Role: Low-jitter clock source for Ethernet MAC/PHY interfaces and packet buffer timing, with FS pin enabling protocol-aware frequency agility. Use Value: CML output drives long traces with minimal skew; DSPLL® supply noise rejection prevents clock-induced crosstalk in dense switch PCB layouts.
FPGA-Based Video Processing	SD/HD Broadcast Equipment
Use Scenario: Real-time video encoding/decoding pipelines in broadcast-grade FPGA platforms requiring precise pixel-clock generation. IC Role / Device Role / Timing Role: Dual-frequency XO supplying independent clocks for sensor interface (e.g., 74.25 MHz) and processing core (e.g., 300 MHz). Use Value: Factory-programmed f₀/f₁ eliminates external configuration EEPROM; ±7 ppm stability prevents frame sync loss during ambient temperature shifts.	Use Scenario: SDI signal generation and distribution in professional video routers and converters demanding ultra-low jitter and rapid format switching. IC Role / Device Role / Timing Role: Reference oscillator for SMPTE ST 292/424 serializers and reclockers, with OE enabling seamless mute during format transitions. Use Value: Tristate control via OE pin allows glitch-free clock muting without disrupting downstream PLL lock; CML output meets SMPTE impedance requirements.

SONET/SDH Line Cards

High-Speed Networking Switches

Use Scenario: Synchronous optical transport at OC-48/OC-192 rates requiring deterministic clock recovery and low-phase-noise timing.

IC Role / Device Role / Timing Role: Primary reference clock generator for framer, mapper, and SERDES ICs with dual-frequency support for hitless protection switching.

Use Value: Sub-0.4 ps RMS jitter ensures BER <10⁻¹² under EMI-rich backplane conditions; ±7 ppm stability maintains frame alignment across temperature swings.

Use Scenario: 10/25/100 GbE switch fabric where multiple line-rate clocks must be synchronized across ASICs and PHYs.

IC Role / Device Role / Timing Role: Low-jitter clock source for Ethernet MAC/PHY interfaces and packet buffer timing, with FS pin enabling protocol-aware frequency agility.

Use Value: CML output drives long traces with minimal skew; DSPLL® supply noise rejection prevents clock-induced crosstalk in dense switch PCB layouts.

FPGA-Based Video Processing

SD/HD Broadcast Equipment

Use Scenario: Real-time video encoding/decoding pipelines in broadcast-grade FPGA platforms requiring precise pixel-clock generation.

IC Role / Device Role / Timing Role: Dual-frequency XO supplying independent clocks for sensor interface (e.g., 74.25 MHz) and processing core (e.g., 300 MHz).

Use Value: Factory-programmed f₀/f₁ eliminates external configuration EEPROM; ±7 ppm stability prevents frame sync loss during ambient temperature shifts.

Use Scenario: SDI signal generation and distribution in professional video routers and converters demanding ultra-low jitter and rapid format switching.

IC Role / Device Role / Timing Role: Reference oscillator for SMPTE ST 292/424 serializers and reclockers, with OE enabling seamless mute during format transitions.

Use Value: Tristate control via OE pin allows glitch-free clock muting without disrupting downstream PLL lock; CML output meets SMPTE impedance requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency XO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si534A-D-GM	Four-output, programmable Si534-based clock generator; requires external configuration; higher integration but no OE/FS pins	Used in multi-clock domain systems (e.g., CPU + GPU + I/O clocks); not drop-in for single-output XO roles	Choose when needing >2 outputs or programmability in-system; avoid if only dual-frequency XO functionality is required
AK21E-100.0000T	Single-output, ±20 ppm TCXO; no frequency select or OE; 3.3 V CMOS output; 3.2 × 2.5 mm package	Targeted at portable/embedded systems where size and power matter more than dual-frequency agility	Choose for space-constrained designs with static clock needs; not suitable for FS-driven frequency switching

Compared with Si534A-D-GM and AK21E-100.0000T, the 533KA000873DGR uniquely delivers factory-programmed dual-frequency agility in a simple 6-pin XO form factor - eliminating configuration overhead while supporting hitless switching and tristate control essential for telecom and broadcast timing.

Availability

533KA000873DGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, high-speed networking switches, and FPGA-based video processing systems requiring stable component supply, guaranteed long-term availability, and RoHS-compliant packaging.

Supply support for 533KA000873DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The Si533 family is designed as a high-performance, dual-frequency XO platform targeting telecom infrastructure, enterprise networking, and broadcast video - emphasizing low jitter, factory configurability, and robust thermal performance.

FAQ

What output frequencies are programmed in the 533KA000873DGR?

The 533KA000873DGR is factory-programmed with two specific frequencies determined by its six-digit code "000873". Per Skyworks' Part Number Convention (Rev. 1.4, p.7), codes >000100 indicate the lower frequency is selected when FS = 0 and the higher when FS = 1. Exact values require decoding via Skyworks' ClockBuilder tool or datasheet lookup - the 533KA000873DGR does not expose raw frequency values in its marking.

Does the 533KA000873DGR support CMOS output?

No, the 533KA000873DGR does not support CMOS output. Its part number suffix "K" specifies 3.3 V CML output (per Table on p.7 of Rev. 1.4). CMOS is only supported by option codes C, G, J, P, T, and V - "K" explicitly denotes CML. Using it with CMOS loads would violate output voltage and drive specifications.

What is the meaning of the "D" revision letter in 533KA000873DGR?

The "D" in 533KA000873DGR is the device revision letter, indicating hardware revision D per Skyworks' mark specification (Rev. 1.4, p.9). Revision D includes updated supply current specs, refined phase jitter characterization, and compliance with JEDEC J-STD-020C soldering profiles - all verified in the Rev. 1.4 datasheet dated March 4, 2022.

Can the 533KA000873DGR operate at 1.8 V supply?

No, the 533KA000873DGR cannot operate at 1.8 V. Its part number prefix "K" corresponds to the 3.3 V supply option (per p.7 Option Code table). The 1.8 V supply variants use prefixes J or K only with 1.8 V CML/CMOS - but "K" alone in the first option position means 3.3 V CML. Applying 1.8 V would result in functional failure or damage.

Is the 533KA000873DGR pin-compatible with other Si533 variants?

Yes, all Si533 devices share identical 6-pin 5 × 7 mm package and pinout (GND/FS/VDD/CLK+/CLK–/OE), regardless of output format, supply voltage, or stability grade. The 533KA000873DGR is mechanically and electrically pin-compatible with variants like 533AB000108DGR or 533BC000215DGR - only electrical parameters (jitter, stability, drive strength) differ.

533KA000873DGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si533

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 225MHz, 233.25MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: CML

Voltage - Supply:: 1.8V

Frequency Stability:: ±50ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 108mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

533KA000873DGR FAQ

1.How can I place an order for 533KA000873DGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 533KA000873DGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 533KA000873DGR reliable?

The price and inventory of 533KA000873DGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 533KA000873DGR is usually 5 days.

3.What payment methods are accepted for 533KA000873DGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 533KA000873DGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 533KA000873DGR?

533KA000873DGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 533KA000873DGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 533KA000873DGR?

For technical support, including 533KA000873DGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 533KA000873DGR requirements.

6.How does Aetrix verify that 533KA000873DGR is sourced from the original manufacturer or authorized distributors?

All 533KA000873DGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 533KA000873DGR meets industry standards.

7.What is the process for return or replacement of 533KA000873DGR?

All 533KA000873DGR units undergo pre-shipment inspection (PSI). If there is an issue with 533KA000873DGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 533KA000873DGR part is unused and in its original packaging.

Return procedure for 533KA000873DGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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