Skyworks Solutions Inc. 534AB002364DG
- Part No.:
- 534AB002364DG
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 8-SMD, No Lead
- Datasheet:
-
534AB002364DG.pdf
- Description:
- XTAL OSC XO 3.3V 8SMD
- Quantity:
- Payment:

- Shipping:

Inventory:5,304
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
534AB002364DG from Skyworks Solutions is a factory-programmed quad-output crystal oscillator (XO) delivering four selectable frequencies in the 10 MHz to 945 MHz range, with ±20 ppm temperature stability and LVDS output format at 3.3 V supply. It uses DSPLL® synthesis for low-jitter clock generation and supports frequency selection via FS[1:0] pins. This device serves as a timing source in high-speed serial interfaces requiring stable multi-frequency clocks.
For engineers reviewing the 534AB002364DG datasheet, 534AB002364DG pinout, 534AB002364DG application, or 534AB002364DG equivalent, key selection criteria include its quad-frequency capability, LVDS output compatibility, ±20 ppm total stability over –40 to +85 °C, tristate-enabled OE control, and industry-standard 5 × 7 mm 8-pin package.
Technical Context
The 534AB002364DG implements third-generation DSPLL® circuitry to synthesize any-rate output frequencies from a single fixed internal crystal, eliminating need for multiple crystals per frequency. Its architecture provides superior supply noise rejection and enables sub-0.4 ps RMS phase jitter performance across OC-48 and OC-192 integration bands.
Frequency selection is controlled by two logic inputs (FS[1], FS[0]) with internal 17 kΩ pull-up resistors to VDD, enabling four discrete output frequencies without external configuration. The device operates with LVDS differential outputs referenced to 1.2 V mid-level, supporting 100 Ω differential termination and delivering 0.5–0.9 VPP swing with 45–55% duty cycle symmetry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Nominal Frequency Range | 10–945 MHz (LVDS); supports four factory-configured frequencies |
| Output Format | LVDS - differential signaling with 100 Ω termination, 1.2 V common-mode level |
| Supply Voltage | 3.3 V ±10% - compatible with standard logic rails and low-noise LDOs |
| Temperature Stability | ±20 ppm total - includes ±20 ppm temp stability + ±3 ppm aging over first year |
| Phase Jitter (RMS) | 0.36–0.50 ps (12 kHz–20 MHz, OC-48 band) - meets SONET/SDH jitter compliance |
| Supply Current | 90 mA typical (LVDS enabled) - enables thermal budget planning in dense PCB layouts |
| Package | 5 × 7 mm, 8-pin surface-mount - industry-standard footprint compatible with automated assembly |
Pinout & Package
534AB002364DG is housed in an industry-standard 5 × 7 mm, 8-pin surface-mount package with exposed pad (not electrically connected). Pin 1 is marked by a dot; pin numbering follows top-view clockwise convention starting from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | No Connection (NC) | Unused terminal - must remain unconnected on PCB |
| 2 | Output Enable (OE) | Active-high control: drives outputs to high-impedance when low; internal 17 kΩ pull-up to VDD |
| 3 | GND | Electrical and case ground reference - requires low-inductance connection to system ground plane |
| 4 | CLK+ | LVDS positive output - routed differentially with CLK–; 100 Ω termination required |
| 5 | CLK– | LVDS complementary output - matched length and impedance routing essential for jitter performance |
| 6 | VDD | 3.3 V power supply - requires local 100 nF + 10 µF decoupling near pin |
| 7 | FS[1] | Frequency select MSB - selects one of four preprogrammed frequencies; internal 17 kΩ pull-up |
| 8 | FS[0] | Frequency select LSB - used with FS[1] to define 2-bit code (00–11) for frequency selection |
Key Features
| Feature | Design Value |
|---|---|
| Quad-frequency programmability | Four factory-set frequencies selected dynamically via FS[1:0], enabling flexible clock domain management without hardware change |
| DSPLL® jitter suppression | 0.36 ps RMS phase jitter (12 kHz–20 MHz) ensures reliable sampling in high-speed SerDes links |
| Single-crystal architecture | Fixed internal resonator eliminates crystal sourcing variability and improves long-term aging (< ±3 ppm/year) |
| LVDS output compliance | Meets JEDEC JESD8-12 standards with 1.125–1.275 V common-mode and 0.5–0.9 VPP differential swing |
| Tristate enable with pull-up | OE pin simplifies power sequencing and clock gating; internal 17 kΩ pull-up avoids need for external resistor |
Applications
| SONET/SDH Line Cards | Multi-Port Ethernet Switches |
|---|---|
Use Scenario: Synchronous optical transport in carrier-grade line cards requiring precise 155.52 MHz, 622.08 MHz, 1.244 Gbps, and 2.488 Gbps clock domains. IC Role / Device Role / Timing Role: Primary quad-frequency clock source providing jitter-clean references to framer, mapper, and PHY ICs. Use Value: DSPLL® synthesis achieves < 0.4 ps RMS jitter, meeting GR-1244-CORE mask requirements for OC-48/OC-192 systems. |
Use Scenario: Clocking multiple 10G/25G/100G Ethernet PHYs and switch fabric interfaces on a single board. IC Role / Device Role / Timing Role: Configurable timing engine supplying independent frequencies to different MAC/PHY lanes. Use Value: Four factory-programmed outputs eliminate need for multiple oscillators or clock generators, reducing BOM count and layout area. |
| FPGA-Based Test Equipment | HD/3G-SDI Video Processing |
Use Scenario: High-precision signal generation and analysis using FPGA-based instruments requiring synchronized clocks at 125 MHz, 250 MHz, 500 MHz, and 1 GHz. IC Role / Device Role / Timing Role: Reference clock provider for ADC/DAC sampling, digital pattern generation, and data capture subsystems. Use Value: Sub-0.5 ps RMS jitter preserves SNR in wideband digitization paths and minimizes bit error rates in high-speed I/O. |
Use Scenario: Timing synchronization across SDI serializers, deserializers, and video processing pipelines operating at 27 MHz, 74.25 MHz, 148.5 MHz, and 297 MHz. IC Role / Device Role / Timing Role: Multi-rate timing hub ensuring frame-accurate alignment between baseband, transport, and encoding blocks. Use Value: ±20 ppm total stability guarantees genlock accuracy across temperature swings in broadcast enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-frequency XO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si534AB002365DG | Same Si534 family, identical package and pinout, but configured for ±7 ppm temperature stability (total ±20 ppm same) | Preferred where tighter initial accuracy or lower aging drift is required in lab/test environments | Select if design requires < ±10 ppm deviation over full temperature range and first-year operation |
| Si534BB002364DG | Different output format: LVPECL instead of LVDS; higher supply current (111 mA typ), different voltage levels (VDD – 1.42 V common-mode) | Better suited for legacy backplane or ECL-compatible systems needing higher drive strength | Choose only when interfacing with LVPECL receivers and existing 50 Ω to VDD–2 V termination infrastructure |
Compared with 534AB002364DG, Si534AB002365DG offers improved temperature coefficient at identical form factor, while Si534BB002364DG trades LVDS compatibility for higher drive capability and different termination - neither is pin-compatible due to output stage differences, requiring layout review for signal integrity.
Availability
534AB002364DG is available at Aetrix Electronics and suitable for SONET/SDH line cards, multi-port Ethernet switches, and FPGA-based test equipment requiring stable component supply, consistent lead times, and guaranteed long-term availability.
Supply support for 534AB002364DG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.
The Si534 product line delivers highly configurable, low-jitter clock sources for communications infrastructure, enterprise networking, and broadcast video systems - designed to replace multiple fixed-frequency XOs with a single programmable solution.
FAQ
What output frequencies are programmed into the 534AB002364DG?
The 534AB002364DG is factory-programmed with four specific frequencies within the 10–945 MHz range, determined by the six-digit frequency designator "002364" in its part number. Per Skyworks' ordering convention, this code maps to defined frequency pairs; exact values are specified in the device's configuration record and shipped calibration report. The 534AB002364DG does not allow field reprogramming - all frequencies are set at manufacture.
Does the 534AB002364DG support CMOS output?
No, the 534AB002364DG does not support CMOS output. Its part number suffix "AB" indicates LVDS output format with 3.3 V supply. CMOS variants use suffixes "AC", "AG", "AJ", or "AV" per Skyworks' ordering guide. Attempting to operate the 534AB002364DG as CMOS would violate output stage specifications and risk signal integrity failure.
What is the power-up time specification for the 534AB002364DG?
The 534AB002364DG has a maximum power-up time of 10 ms - defined as the interval from VDD reaching valid operating voltage to CLK± outputs achieving stable nominal frequency and amplitude. This value applies under all supply voltages and temperature conditions within the –40 to +85 °C range, and is independent of OE or FS[1:0] state transitions.
Can the 534AB002364DG be used in place of a traditional single-output XO?
Yes, the 534AB002364DG can replace a single-output XO by fixing FS[1:0] to a constant logic level (e.g., 00) and using only one of its four outputs. Its LVDS output, ±20 ppm stability, and 3.3 V supply match common XO requirements. However, unused FS and OE pins must still be properly terminated per datasheet guidance to avoid floating inputs and ensure robust operation of the 534AB002364DG.
Is the 534AB002364DG RoHS-compliant and Pb-free?
Yes, the 534AB002364DG is RoHS-compliant and Pb-free, as confirmed by its "+" mark on the top-side marking per Skyworks' Si534 Mark Specification (Rev. 1.4, page 9). It meets JEDEC J-STD-020C MSL1 moisture sensitivity classification and supports Pb-free reflow profiles with peak temperature of 260 °C for 20–40 seconds - fully compliant with modern electronics manufacturing standards.
534AB002364DG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si534
- Package/Case:
- 8-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency - Output 1:
- 164.35547MHz, 166.625MHz, 174.70304MHz, 176.82813MHz
- Frequency - Output 2:
- -
- Frequency - Output 3:
- -
- Frequency - Output 4:
- -
- Function:
- Enable/Disable
- Output:
- LVPECL
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±20ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 121mA
- Ratings:
- -
- Size / Dimension:
- 0.276" L x 0.197" W (7.00mm x 5.00mm)
- Height:
- 0.071" (1.80mm)
- Supplier Device Package:
- -
534AB002364DG FAQ
1.How can I place an order for 534AB002364DG through Aetrix?
Please submit a Request for Quotation (RFQ) for 534AB002364DG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 534AB002364DG reliable?
The price and inventory of 534AB002364DG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 534AB002364DG is usually 5 days.
3.What payment methods are accepted for 534AB002364DG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 534AB002364DG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 534AB002364DG?
534AB002364DG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 534AB002364DG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 534AB002364DG?
For technical support, including 534AB002364DG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 534AB002364DG requirements.
6.How does Aetrix verify that 534AB002364DG is sourced from the original manufacturer or authorized distributors?
All 534AB002364DG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 534AB002364DG meets industry standards.
7.What is the process for return or replacement of 534AB002364DG?
All 534AB002364DG units undergo pre-shipment inspection (PSI). If there is an issue with 534AB002364DG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 534AB002364DG part is unused and in its original packaging.
Return procedure for 534AB002364DG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
534AB002364DG Tags

-
ASEMDHC-L-R
Abracon LLC

-
513FCA000270AAG
Skyworks Solutions Inc.

-
LMK61PD0A2-SIAT
Texas Instruments
-
ASEMDLV-LR
Abracon LLC
-
AMPDAFI-A09T
Abracon LLC
-
AMPDEFH-A04T
Abracon LLC
-
534DC000596DG
Skyworks Solutions Inc.
-
ASEMCLV
Abracon LLC

-
DSC6021CI2A-009TT
Microchip Technology

-
DSC6021CI2A-009UT
Microchip Technology

-
DSC6021CI2A-009WT
Microchip Technology

-
DSC6021CI2A-009YT
Microchip Technology
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
