Skyworks Solutions Inc. 534DB000172DG
- Part No.:
- 534DB000172DG
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 8-SMD, No Lead
- Datasheet:
-
534DB000172DG.pdf
- Description:
- XTAL OSC XO 3.3V 8SMD
- Quantity:
- Payment:

- Shipping:

Inventory:5,518
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Product details
Overview
534DB000172DG from Skyworks Solutions is a quad-output, factory-programmed crystal oscillator (XO) with DSPLL® frequency synthesis, delivering four selectable output frequencies between 10 MHz and 945 MHz (with select options up to 1.4 GHz), ±20 ppm temperature stability, 3.3 V supply, and CML output format in an industry-standard 5 × 7 mm 8-pin package. It serves as a low-jitter clock source for FPGA/ASIC timing, SD/HD video systems, and high-speed serial data recovery.
For engineers reviewing the 534DB000172DG datasheet, 534DB000172DG pinout, 534DB000172DG application, or 534DB000172DG equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternative oscillators, and supply-chain support details specific to this Si534 variant.
Technical Context
The 534DB000172DG implements Skyworks' third-generation DSPLL® architecture, synthesizing four discrete output frequencies from a single internal fixed-frequency crystal, eliminating need for multiple crystals or external PLLs. Its all-digital synthesis enables superior supply noise rejection and stable jitter performance across varying load and rail conditions.
Frequency selection is controlled via two logic-level pins (FS[1], FS[0]), each with internal 17 kΩ pull-up resistors to VDD, enabling hardware-selectable outputs without I²C or SPI configuration. Output enable (OE) supports tristate control, and the device powers up in enabled state with <10 ms oscillator stabilization time.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Nominal Frequency Range | 10–945 MHz (any-rate); select frequencies up to 1400 MHz - supports flexible clock tree design without custom crystal sourcing |
| Output Format | CML - differential signaling with 1.1–1.9 VPP swing (2.5/3.3 V option), optimized for high-speed interconnects with low EMI |
| Supply Voltage | 3.3 V (±10%) - compatible with standard logic rails; IDD = 99–108 mA typical under load |
| Frequency Stability | ±20 ppm total (±20 ppm temp + ±10 ppm aging over 20 years) - ensures long-term timing accuracy in industrial environments |
| Phase Jitter (RMS) | 0.25–0.37 ps (12 kHz–80 MHz offset, FOUT > 500 MHz) - meets OC-192/SONET requirements for serial data recovery |
| Operating Temperature | –40 °C to +85 °C - qualified per MIL-STD-883 for reliability in telecom and networking equipment |
| Package | 5 × 7 mm, 8-pin surface-mount - industry-standard footprint with 2.54 mm pin pitch; RoHS-compliant, MSL1 |
Pinout & Package
534DB000172DG uses an 8-pin, 5 × 7 mm surface-mount package with exposed pad (not electrically connected). Pin 1 is marked by a dot; pin numbering follows top-view clockwise layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | No connection (NC) | Unused; must be left floating or grounded per layout guidelines - no electrical function |
| 2 | Output Enable (OE) | Active-high control: OE = 0 disables CLK outputs into high-impedance state; internal 17 kΩ pull-up ensures default enabled operation |
| 3 | GND | Common reference for power and signal return - requires low-inductance connection to system ground plane |
| 4 | CLK+ | Differential positive output (CML) - delivers selected frequency with matched impedance (50 Ω to VDD – 1.3 V) |
| 5 | CLK– | Differential negative output (CML) - complements CLK+; 180° phase relationship required for proper termination |
| 6 | VDD | 3.3 V power supply - bypass with 0.1 µF ceramic capacitor near pin to suppress supply noise coupling into DSPLL core |
| 7 | FS[1] | Frequency Select MSB - selects one of four preprogrammed output frequencies; internal 17 kΩ pull-up simplifies control logic |
| 8 | FS[0] | Frequency Select LSB - used with FS[1] to encode 00/01/10/11 for quad-frequency selection |
Key Features
| Feature | Design Value |
|---|---|
| DSPLL® frequency synthesis | Enables four factory-programmed output frequencies from one internal crystal - eliminates BOM complexity and board space for multiple XOs |
| ±20 ppm total stability | Guarantees timing margin for SONET/SDH and Ethernet PHY applications over full temperature and lifetime without recalibration |
| CML output interface | Provides 1.5 VPP typical differential swing with <350 ps rise/fall time - supports >1 Gbps serial links with minimal jitter degradation |
| Hardware frequency selection | FS[1:0] pins allow deterministic, glitch-free frequency switching in <20 ms - no firmware or communication bus required |
| Industry-standard 5 × 7 mm package | Drop-in compatible with existing XO footprints and reflow profiles - reduces layout redesign risk for timing upgrades |
Applications
| SONET/SDH Line Cards | High-Speed Networking Switches |
|---|---|
Use Scenario: Synchronous optical transport at OC-48/OC-192 rates requiring precise frame alignment and jitter attenuation. IC Role / Device Role / Timing Role: Primary clock source for SERDES and framer ICs, providing four independent reference clocks for different line rates (e.g., 155.52 MHz, 622.08 MHz). Use Value: Sub-0.4 ps RMS phase jitter ensures compliance with GR-1244-CORE jitter transfer and generation masks for telecom infrastructure. |
Use Scenario: Multi-port 10G/25G Ethernet switch fabric where each port requires distinct reference frequencies for PHY synchronization. IC Role / Device Role / Timing Role: Quad-output timing engine supplying clocks to multiple MAC/PHY pairs, reducing need for discrete oscillators per lane. Use Value: Hardware-selectable outputs via FS[1:0] enable dynamic rate adaptation without software intervention or clock multiplexers. |
| SD/HD Video Broadcast Equipment | FPGA-Based Test & Measurement Systems |
Use Scenario: SMPTE-compliant video processing boards generating genlock, pixel, and audio sample clocks simultaneously. IC Role / Device Role / Timing Role: Master timing reference generating 27 MHz (SD), 74.25 MHz (HD), 148.5 MHz (3G-SDI), and 297 MHz (12G-SDI) outputs. Use Value: Factory-programmed frequencies eliminate external programming and ensure traceable calibration across production units. |
Use Scenario: Modular PXI or AXI-based instruments requiring programmable clock sources for ADC/DAC sampling, pattern generation, and trigger synchronization. IC Role / Device Role / Timing Role: Reconfigurable clock generator supporting multiple instrument configurations via hardware pin strapping. Use Value: Tristate-enabled OE pin allows shared clock distribution across modules without contention during hot-swap or calibration sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output oscillator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si534AB000108DGR | Same Si534 family, LVPECL output, ±20 ppm stability, 3.3 V - differs in output format and programmed frequency set | Limited to LVPECL-compatible receivers; higher drive strength but greater power and EMI vs. CML | Select when interfacing with legacy PECL logic or when higher output swing (>1.9 VPP) is required |
| Si534CB000121DG | Same Si534 family, CMOS output, ±20 ppm stability, 3.3 V - limited to ≤160 MHz max frequency, lower power (81–88 mA) | Restricted to low-speed logic domains; unsuitable for >200 Mbps serial interfaces due to slew rate limits | Select only for cost-sensitive, low-frequency MCU or microcontroller clocking where differential signaling is unnecessary |
Compared with 534DB000172DG, Si534AB000108DGR offers higher output drive but requires stricter termination and consumes ~10% more current, while Si534CB000121DG trades frequency range and jitter performance for simplicity and lower power in non-high-speed applications.
Availability
534DB000172DG is available at Aetrix Electronics and suitable for SONET/SDH line cards, high-speed networking switches, and SD/HD video broadcast equipment requiring stable component supply, guaranteed long-term availability, and traceable sourcing.
Supply support for 534DB000172DG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management technologies.
The Si534 product line delivers highly configurable, low-jitter clock generators and oscillators designed for demanding timing applications in communications infrastructure, enterprise networking, and broadcast video systems.
FAQ
What output frequencies are programmed in the 534DB000172DG?
The 534DB000172DG is a factory-programmed quad-output oscillator with four specific frequencies determined by its six-digit configuration code "000172". Per Skyworks' ordering convention, this code maps to four unique frequencies within the 10–945 MHz band, selected at time of manufacture and documented in the device's configuration report. The exact values are not publicly decoded from the part number alone but are fixed and verified prior to shipment.
Does the 534DB000172DG require external configuration or programming after soldering?
No, the 534DB000172DG is fully factory-configured before shipment. All parameters - including the four output frequencies, CML output format, 3.3 V supply, ±20 ppm stability, and active-high OE polarity - are permanently programmed into the DSPLL core. No I²C, SPI, or other runtime configuration is needed or supported.
Can the 534DB000172DG operate with a 2.5 V supply instead of 3.3 V?
No, the 534DB000172DG is specifically configured for 3.3 V operation, as indicated by the "D" in its order code (per Skyworks' part numbering: D = 3.3 V, CML, high-OE). Using 2.5 V would violate the recommended operating condition (VDD min = 2.97 V for 3.3 V option) and may result in undefined behavior, failed startup, or degraded jitter performance.
How is frequency selection implemented on the 534DB000172DG?
Frequency selection on the 534DB000172DG is performed using two dedicated hardware pins: FS[1] (pin 7) and FS[0] (pin 8). These pins accept logic-level inputs (with internal 17 kΩ pull-ups to VDD) and encode four states (00, 01, 10, 11) to select among the four preprogrammed output frequencies. Switching occurs in under 20 ms with no glitches.
Is the 534DB000172DG pin-compatible with other Si534 variants like Si534AB000108DGR?
Yes, all Si534 devices - including 534DB000172DG and Si534AB000108DGR - share identical 8-pin, 5 × 7 mm package dimensions, pinout assignment, and mechanical footprint. Differences are limited to internal programming (frequency set, output format, voltage), so PCB layout and mounting are fully interchangeable.
534DB000172DG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si534
- Package/Case:
- 8-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency - Output 1:
- 20MHz, 40MHz, 80MHz, 160MHz
- Frequency - Output 2:
- -
- Frequency - Output 3:
- -
- Frequency - Output 4:
- -
- Function:
- Enable/Disable
- Output:
- CML
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±20ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 108mA
- Ratings:
- -
- Size / Dimension:
- 0.276" L x 0.197" W (7.00mm x 5.00mm)
- Height:
- 0.071" (1.80mm)
- Supplier Device Package:
- -
534DB000172DG FAQ
1.How can I place an order for 534DB000172DG through Aetrix?
Please submit a Request for Quotation (RFQ) for 534DB000172DG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 534DB000172DG reliable?
The price and inventory of 534DB000172DG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 534DB000172DG is usually 5 days.
3.What payment methods are accepted for 534DB000172DG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 534DB000172DG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 534DB000172DG?
534DB000172DG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 534DB000172DG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 534DB000172DG?
For technical support, including 534DB000172DG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 534DB000172DG requirements.
6.How does Aetrix verify that 534DB000172DG is sourced from the original manufacturer or authorized distributors?
All 534DB000172DG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 534DB000172DG meets industry standards.
7.What is the process for return or replacement of 534DB000172DG?
All 534DB000172DG units undergo pre-shipment inspection (PSI). If there is an issue with 534DB000172DG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 534DB000172DG part is unused and in its original packaging.
Return procedure for 534DB000172DG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
534DB000172DG Tags

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