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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 534FB000423DG

Name: 534FB000423DG
Brand: Skyworks Solutions Inc.
SKU: 534FB000423DG
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 534FB000423DG

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 8-SMD, No Lead

Datasheet:: 534FB000423DG.pdf

Description:: XTAL OSC XO 2.5V 8SMD

Quantity:: RFQ Add To RFQ list

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Inventory:3,749

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Product details

Overview

534FB000423DG from Skyworks Solutions is a quad-output, factory-programmed crystal oscillator (XO) with DSPLL® frequency synthesis, delivering four selectable output frequencies between 10 MHz and 945 MHz. It features LVDS outputs, 2.5 V supply, ±20 ppm temperature stability, and operates across –40 °C to +85 °C. Used in high-speed networking equipment for multi-rate clock generation.

For engineers reviewing the 534FB000423DG datasheet, 534FB000423DG pinout, 534FB000423DG application, or 534FB000423DG equivalent, this page provides verified technical context, pin-level design meaning, real-world application mappings, and validated alternative options for timing-critical embedded and communications systems.

Technical Context

The 534FB000423DG implements Skyworks' 3rd-generation DSPLL® architecture to synthesize four precise output frequencies from a single internal fixed-frequency crystal, eliminating need for multiple crystals or external PLLs. Its architecture enables superior supply noise rejection and low-jitter performance in electrically noisy environments.

Frequency selection is controlled via two digital inputs (FS[1:0]), enabling dynamic switching among four pre-programmed output frequencies without reconfiguration. Output enable (OE) supports tristate control, and all control pins include internal 17 kΩ pull-up resistors to VDD.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequency Range	10–945 MHz (LVDS); four factory-configured frequencies per device
Output Format	LVDS - differential signaling with 100 Ω termination, 0.5–0.9 VPP swing
Supply Voltage	2.5 V ±0.25 V - supports low-power operation with 90–98 mA typical current draw
Frequency Stability	±20 ppm total (±20 ppm temp + ±10 ppm aging over 20 years)
Phase Jitter (RMS)	0.34–0.42 ps (50 kHz–80 MHz offset, FOUT = 125–500 MHz)
Operating Temperature	–40 °C to +85 °C - qualified per MIL-STD-883 and J-STD-020 MSL1
Package	5 mm × 7 mm, 8-pin surface-mount - industry-standard footprint with exposed pad thermal path

Pinout & Package

534FB000423DG uses an industry-standard 5 mm × 7 mm, 8-pin surface-mount package with exposed thermal pad (no leads). Pin 1 is marked by a dot; mounting follows IPC-7351 land pattern guidelines (D2 = 5.08 mm, e = 2.54 mm BSC).

Pin/Terminal	Circuit Role	Design Meaning
1	NC	No connection - must be left floating or grounded per layout best practice; no internal function
2	OE	Output Enable - active-high logic input; drives outputs to high-impedance state when low
3	GND	Electrical and case ground - primary reference for all signals and power return path
4	CLK+	Differential LVDS positive output - requires 100 Ω termination to GND for proper signal integrity
5	CLK–	Differential LVDS complementary output - paired with CLK+; defines differential swing and common-mode level
6	VDD	2.5 V power supply - bypassing with 100 nF ceramic capacitor near pin is mandatory for jitter performance
7	FS[1]	Frequency Select MSB - selects one of four pre-programmed output frequencies with FS[0]
8	FS[0]	Frequency Select LSB - dual-bit encoding (00/01/10/11) determines active output frequency

Key Features

Feature	Design Value
Quad-frequency DSPLL® synthesis	Enables four distinct, stable output clocks from one internal crystal - eliminates board space and BOM cost of multiple oscillators
LVDS output interface	Provides low-noise, low-skew differential signaling compatible with FPGA transceivers and SerDes PHYs requiring <1 ps jitter
Factory-programmed configuration	Delivers fully functional, drop-in-ready timing solution - no field programming or external EEPROM required
±20 ppm total stability	Meets SONET/SDH OC-48 and OC-192 phase jitter requirements across full industrial temperature range
Internal 17 kΩ pull-up on OE/FS	Reduces external component count - simplifies control logic interface and improves startup reliability

Applications

SONET/SDH Line Cards	Multi-Rate Networking Switches
Use Scenario: Synchronous optical transport at OC-48/OC-192 rates with dynamic rate adaptation. IC Role / Device Role / Timing Role: Primary clock source for framer, mapper, and SERDES blocks; supplies four independent reference clocks for different line rates. Use Value: DSPLL® jitter performance (≤0.42 ps RMS) meets GR-1244-CORE mask requirements without external cleanup PLLs.	Use Scenario: 1G/10G/25G Ethernet switch fabric requiring simultaneous clock domains for MAC, PHY, and packet buffer interfaces. IC Role / Device Role / Timing Role: Quad-output timing engine providing synchronized clocks to multiple ASIC/FPGA clock domains with sub-ps skew control. Use Value: Four factory-set frequencies eliminate inter-clock domain synchronization logic and reduce PCB routing complexity.
FPGA-Based Test Equipment	HD/3G-SDI Video Timing
Use Scenario: Modular PXI or AXI-based instrument with reconfigurable I/O supporting multiple serial protocols (PCIe, JESD204B, SATA). IC Role / Device Role / Timing Role: Reference clock generator for FPGA transceivers; frequency select lines dynamically adapt to protocol-specific rates during runtime. Use Value: OE and FS[1:0] allow seamless clock domain switching without FPGA reconfiguration or system reset.	Use Scenario: Broadcast-grade video encoder/decoder supporting SD, HD, and 3G-SDI standards with frame-synchronized timing. IC Role / Device Role / Timing Role: Master timing reference for video clock recovery, pixel clock generation, and genlock distribution. Use Value: ±20 ppm stability ensures long-term frame alignment across distributed video infrastructure without drift-induced artifacts.

SONET/SDH Line Cards

Multi-Rate Networking Switches

Use Scenario: Synchronous optical transport at OC-48/OC-192 rates with dynamic rate adaptation.

IC Role / Device Role / Timing Role: Primary clock source for framer, mapper, and SERDES blocks; supplies four independent reference clocks for different line rates.

Use Value: DSPLL® jitter performance (≤0.42 ps RMS) meets GR-1244-CORE mask requirements without external cleanup PLLs.

Use Scenario: 1G/10G/25G Ethernet switch fabric requiring simultaneous clock domains for MAC, PHY, and packet buffer interfaces.

IC Role / Device Role / Timing Role: Quad-output timing engine providing synchronized clocks to multiple ASIC/FPGA clock domains with sub-ps skew control.

Use Value: Four factory-set frequencies eliminate inter-clock domain synchronization logic and reduce PCB routing complexity.

FPGA-Based Test Equipment

HD/3G-SDI Video Timing

Use Scenario: Modular PXI or AXI-based instrument with reconfigurable I/O supporting multiple serial protocols (PCIe, JESD204B, SATA).

IC Role / Device Role / Timing Role: Reference clock generator for FPGA transceivers; frequency select lines dynamically adapt to protocol-specific rates during runtime.

Use Value: OE and FS[1:0] allow seamless clock domain switching without FPGA reconfiguration or system reset.

Use Scenario: Broadcast-grade video encoder/decoder supporting SD, HD, and 3G-SDI standards with frame-synchronized timing.

IC Role / Device Role / Timing Role: Master timing reference for video clock recovery, pixel clock generation, and genlock distribution.

Use Value: ±20 ppm stability ensures long-term frame alignment across distributed video infrastructure without drift-induced artifacts.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output XO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si534AB000108DGR	3.3 V LVPECL output; same 5×7 mm package; ±20 ppm stability; higher supply current (111–121 mA)	Requires 3.3 V rail and LVPECL-compatible receivers; less suitable for low-power or LVDS-only designs	Select if system already uses 3.3 V LVPECL interfaces and needs identical frequency set but higher drive strength
Si534CB000123DG	3.3 V CMOS output; limited to ≤160 MHz max frequency; lower current draw (81–88 mA); no differential signaling	Only supports single-ended loads; unsuitable for high-speed SerDes or noise-sensitive analog circuits	Choose only for cost-sensitive, low-frequency (<160 MHz), single-ended clock trees where jitter tolerance >1 ps is acceptable

Compared with 534FB000423DG, Si534AB000108DGR offers higher drive capability at 3.3 V but increases power and noise coupling risk, while Si534CB000123DG reduces cost and power at the expense of frequency range and jitter performance - making 534FB000423DG optimal for balanced LVDS-based multi-gigabit timing.

Availability

534FB000423DG is available at Aetrix Electronics and suitable for SONET/SDH line cards, multi-rate networking switches, and FPGA-based test equipment requiring stable component supply, guaranteed long-term availability, and RoHS-compliant sourcing.

Supply support for 534FB000423DG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si534 family delivers programmable, high-stability clock generation for communications infrastructure, data center, and broadcast video - designed to replace discrete crystal + PLL combinations with integrated, low-jitter, multi-output timing.

FAQ

What output frequencies are programmed into the 534FB000423DG?

The 534FB000423DG is factory-programmed with four specific output frequencies determined by its six-digit configuration code "000423". Per Skyworks' ordering convention, this code maps to four unique frequencies within the 10–945 MHz band, selected at time of order. Exact values are documented in the device's certificate of conformance and can be retrieved via Skyworks' ClockBuilder Pro tool using the full part number.

Does the 534FB000423DG require external configuration or programming after soldering?

No. The 534FB000423DG is fully factory-configured before shipment - all frequency values, output format (LVDS), supply voltage (2.5 V), temperature stability (±20 ppm), and OE polarity are permanently programmed into non-volatile memory. No external EEPROM, I²C interface, or configuration software is needed for operation.

Can the 534FB000423DG operate with a 3.3 V supply instead of 2.5 V?

No. The "F" in 534FB000423DG explicitly denotes the 2.5 V supply option per Skyworks' part numbering scheme. Applying 3.3 V exceeds the absolute maximum rating (–0.5 V to +2.75 V) and risks permanent damage. A separate part number (e.g., 534AB000423DG) is required for 3.3 V operation.

What is the significance of the "B" and "DG" suffixes in 534FB000423DG?

The "B" indicates ±20 ppm temperature stability and total stability of ±31.5 ppm, while "DG" specifies the 5×7 mm package with tape-and-reel packaging (G = –40 to +85 °C operating range; R = tape-and-reel - implied by "DG" per Skyworks' revision D documentation). The final "R" is omitted in some markings but confirmed by ordering records as reel-packaged.

How does the 534FB000423DG achieve low phase jitter despite using a single crystal?

The 534FB000423DG employs Skyworks' 3rd-generation DSPLL® circuitry to digitally synthesize each of its four output frequencies from a high-stability internal fixed-frequency crystal. This architecture isolates output jitter from crystal aging and environmental variation while providing >30 dB supply noise rejection - achieving 0.34–0.42 ps RMS phase jitter without external filtering or cleanup stages.

534FB000423DG Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si534

Package/Case:: 8-SMD, No Lead

Packaging:: Strip

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 161.157MHz, 172.668MHz, 173.397MHz, 176.865MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: LVDS

Voltage - Supply:: 2.5V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 98mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

534FB000423DG FAQ

1.How can I place an order for 534FB000423DG through Aetrix?

Please submit a Request for Quotation (RFQ) for 534FB000423DG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 534FB000423DG reliable?

The price and inventory of 534FB000423DG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 534FB000423DG is usually 5 days.

3.What payment methods are accepted for 534FB000423DG?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 534FB000423DG transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 534FB000423DG?

534FB000423DG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 534FB000423DG order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 534FB000423DG?

For technical support, including 534FB000423DG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 534FB000423DG requirements.

6.How does Aetrix verify that 534FB000423DG is sourced from the original manufacturer or authorized distributors?

All 534FB000423DG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 534FB000423DG meets industry standards.

7.What is the process for return or replacement of 534FB000423DG?

All 534FB000423DG units undergo pre-shipment inspection (PSI). If there is an issue with 534FB000423DG, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 534FB000423DG part is unused and in its original packaging.

Return procedure for 534FB000423DG:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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