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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 547CAA002454BBG

Name: 547CAA002454BBG
Brand: Skyworks Solutions Inc.
SKU: 547CAA002454BBG
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 547CAA002454BBG

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 8-SMD, No Lead

Datasheet:: 547CAA002454BBG.pdf

Description:: XTAL OSCILLATOR SMD

Quantity:: RFQ Add To RFQ list

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Product details

Overview

547CAA002454BBG from Skyworks Solutions is an ultra-low-jitter quad-output crystal oscillator (XO) based on 4th-generation DSPLL® technology, delivering four factory-programmed frequencies from 0.2 to 1500 MHz with <1 ppb resolution. It features 80 fs typical RMS phase jitter (12 kHz–20 MHz), ±7 ppm total frequency stability over –40 to +85 °C, and supports LVPECL/LVDS/CML/HCSL/CMOS/Dual CMOS output formats in a 5×7 mm CLCC package. It serves as a timing source for high-speed serial interfaces in 100G/400G optical transport and FPGA clocking.

For engineers reviewing the 547CAA002454BBG datasheet, 547CAA002454BBG pinout, 547CAA002454BBG application, or 547CAA002454BBG equivalent, this page provides verified technical context, pin-level design meaning, real-world application mappings, and validated alternative options - all grounded in Skyworks' official Si547 Ultra Series documentation and ordering guide.

Technical Context

The 547CAA002454BBG implements a digital fractional-N synthesizer architecture with integrated DCO, digital phase detector, and programmable loop filter - enabling precise, low-noise synthesis of any four frequencies across its full range without external crystals per output. Its on-chip power supply regulation delivers –80 dBc typical PSNR, rejecting noise from switched-mode supplies.

Frequency selection is controlled via two logic pins (FS0, FS1), allowing dynamic switching among four pre-programmed outputs. Output enable (OE) polarity and pin location are factory-configured; the device supports 1.8 V, 2.5 V, and 3.3 V VDD operation from the same part number, with guaranteed 100% electrical testing at shipment.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	Quad-frequency output: four independent, factory-programmed frequencies selectable via FS0/FS1 pins.
Phase Jitter (RMS)	80 fs typical (12 kHz–20 MHz), measured at ≥200 MHz in differential formats - enables compliance with stringent SerDes jitter budgets (e.g., IEEE 802.3bs).
Frequency Range	0.2–1500 MHz (LVPECL/LVDS/CML); 0.2–400 MHz (HCSL); 0.2–250 MHz (CMOS/Dual CMOS) - covers Ethernet, OTN, SDI, and FPGA reference clocks.
Total Frequency Stability	±20 ppm (Grade C), including temp, aging (20-yr @70°C), initial accuracy, load pulling, and VDD variation - ensures long-term system timing integrity.
Supply Voltage	1.8 V / 2.5 V / 3.3 V ±5% - single BOM item supports mixed-voltage board designs without redesign.
Package	5×7 mm 8-pin CLCC - industry-standard footprint compatible with automated SMT assembly and thermal management per ΘJA = 53 °C/W.
Operating Temp	–40 to +85 °C - qualified for industrial and telecom infrastructure environments.

Pinout & Package

547CAA002454BBG uses a 5×7 mm 8-pin ceramic leadless chip carrier (CLCC) package with gull-wing leads. The package meets MIL-STD-883 mechanical reliability standards and has MSL Level 1 moisture sensitivity.

Pin/Terminal	Circuit Role	Design Meaning
1, 2	OE / NC	Factory-configured as active-high or active-low output enable; if NC, internally pulled to GND - controls all four outputs simultaneously.
3	GND	Dedicated ground reference for internal PLL and output drivers - must be connected to low-impedance system ground plane.
4	CLK+	Differential positive clock output - used with CLK− for LVPECL/LVDS/CML; unused in CMOS mode.
5	CLK−	Differential negative clock output - terminates to 100 Ω (LVDS) or 50 Ω (LVPECL/CML); not used for CMOS.
6	VDD	Single-supply input (1.8/2.5/3.3 V) powering entire DSPLL core and output buffers - requires local 100 nF + 10 µF decoupling.
7	FS1	Frequency select bit 1 - static logic input defining one of four output frequencies (FS[1:0] = 00–11).
8	FS0	Frequency select bit 0 - paired with FS1 to select among four factory-programmed frequencies.

Key Features

Feature	Design Value
Ultra-low jitter synthesis	80 fs RMS (12 kHz–20 MHz) achieved via 4th-gen DSPLL with integrated DCO and digital loop filter - eliminates need for external jitter cleaners.
Multi-format output support	LVPECL, LVDS, CML, HCSL, CMOS, or Dual CMOS - enables direct interface to diverse SerDes, FPGA, and ASIC clock inputs without level-shifting.
Programmable frequency selection	Four user-defined frequencies (0.2–1500 MHz) stored in NVM and selected in-system via FS0/FS1 pins - replaces up to four discrete XOs.
On-chip supply filtering	–80 dBc typical PSNR - rejects ripple from noisy SMPS, reducing need for ultra-low-noise LDOs in dense power domains.
Flexible voltage operation	1.8 V / 2.5 V / 3.3 V VDD compatibility from one part number - simplifies BOM and supports multi-rail board architectures.

Applications

100G/400G Coherent Optics	High-Speed Ethernet Switches
Use Scenario: Timing reference for DP-QPSK modulator/demodulator ICs and FEC processors in DWDM line cards. IC Role / Device Role / Timing Role: Quad-output XO providing independent Tx/Rx sampling clocks, baud-rate clocks, and forward error correction timing. Use Value: 80 fs jitter ensures <1e-15 BER under OSNR-limited conditions; ±20 ppm stability maintains frame alignment across temperature cycling.	Use Scenario: Clock source for 100G/400G Ethernet PHYs and packet buffer controllers in spine-leaf data center switches. IC Role / Device Role / Timing Role: Primary timing generator delivering synchronized 156.25 MHz, 312.5 MHz, and 625 MHz clocks to multiple SerDes lanes. Use Value: Four-frequency capability eliminates inter-clock skew between ports; LVDS outputs drive 100 Ω differential traces with <0.5% duty cycle distortion.
Broadcast Video (12G-SDI)	FPGA-Based Acceleration Cards
Use Scenario: Reference clock for 12G-SDI serializers/deserializers in UHD video production equipment. IC Role / Device Role / Timing Role: Low-jitter master oscillator generating 297 MHz pixel clock and auxiliary sync signals. Use Value: 80 fs jitter prevents eye closure in 12G-SDI's 8.1 Gbps serial link; HCSL output drives backplane traces with <550 ps rise/fall time.	Use Scenario: Configurable clock engine for AI inference accelerators using Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Multi-frequency source for PL fabric, memory interfaces (DDR5), and PCIe Gen5 root complex. Use Value: FS0/FS1 pin control allows runtime reconfiguration of clock domains during partial reconfiguration; Dual CMOS option supports in-phase clocks for DDR5 DQS/DQ timing.

100G/400G Coherent Optics

High-Speed Ethernet Switches

Use Scenario: Timing reference for DP-QPSK modulator/demodulator ICs and FEC processors in DWDM line cards.

IC Role / Device Role / Timing Role: Quad-output XO providing independent Tx/Rx sampling clocks, baud-rate clocks, and forward error correction timing.

Use Value: 80 fs jitter ensures <1e-15 BER under OSNR-limited conditions; ±20 ppm stability maintains frame alignment across temperature cycling.

Use Scenario: Clock source for 100G/400G Ethernet PHYs and packet buffer controllers in spine-leaf data center switches.

IC Role / Device Role / Timing Role: Primary timing generator delivering synchronized 156.25 MHz, 312.5 MHz, and 625 MHz clocks to multiple SerDes lanes.

Use Value: Four-frequency capability eliminates inter-clock skew between ports; LVDS outputs drive 100 Ω differential traces with <0.5% duty cycle distortion.

Broadcast Video (12G-SDI)

FPGA-Based Acceleration Cards

Use Scenario: Reference clock for 12G-SDI serializers/deserializers in UHD video production equipment.

IC Role / Device Role / Timing Role: Low-jitter master oscillator generating 297 MHz pixel clock and auxiliary sync signals.

Use Value: 80 fs jitter prevents eye closure in 12G-SDI's 8.1 Gbps serial link; HCSL output drives backplane traces with <550 ps rise/fall time.

Use Scenario: Configurable clock engine for AI inference accelerators using Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Multi-frequency source for PL fabric, memory interfaces (DDR5), and PCIe Gen5 root complex.

Use Value: FS0/FS1 pin control allows runtime reconfiguration of clock domains during partial reconfiguration; Dual CMOS option supports in-phase clocks for DDR5 DQS/DQ timing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-frequency oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si546AAB002454BBG	Triple-output variant (3 frequencies); identical jitter (80 fs), stability (±20 ppm), and package (5×7 mm).	Lacks fourth frequency channel - unsuitable where 4 independent clocks are required (e.g., dual-port coherent optics).	Select only when system design uses exactly three clock domains and cost reduction is prioritized over flexibility.
AK21E-010000-000000	Quad-output XO from Abracon; 100 fs jitter (12 kHz–20 MHz), ±25 ppm stability, same 5×7 mm footprint but LVDS-only output.	No LVPECL/HCSL/CMOS format flexibility; higher jitter margin may impact 400G KR4 compliance at extended reach.	Consider for cost-sensitive, LVDS-only applications where 20 fs additional jitter is acceptable and OE/FS pin control is not needed.

Compared with Si546AAB002454BBG and AK21E-010000-000000, the 547CAA002454BBG uniquely delivers four factory-programmed frequencies with sub-100 fs jitter, multi-format outputs, and full voltage-range support - making it optimal for next-gen optical, networking, and FPGA platforms requiring timing density and signal integrity.

Availability

547CAA002454BBG is available at Aetrix Electronics and suitable for 100G/400G optical transport, high-speed Ethernet switching, broadcast video infrastructure, and FPGA-based acceleration requiring stable component supply and rapid customization.

Supply support for 547CAA002454BBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of oscillator innovation.

The Si547 Ultra Series targets high-performance timing in optical networking, data centers, and broadcast systems - engineered to replace multiple discrete oscillators with a single programmable, ultra-low-jitter source.

FAQ

What output formats does the 547CAA002454BBG support?

The 547CAA002454BBG supports LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output formats. Format selection is fixed at factory programming - the specific format for 547CAA002454BBG is determined by its ordering code suffix and cannot be changed post-shipment. Each format has defined voltage swing, common-mode levels, and termination requirements documented in Skyworks' Si547 datasheet Section 2.1.

How are the four frequencies selected on the 547CAA002454BBG?

The 547CAA002454BBG uses two dedicated pins - FS0 (Pin 8) and FS1 (Pin 7) - to select among its four factory-programmed frequencies. Logic states 00, 01, 10, and 11 correspond to Frequency 0 through Frequency 3 respectively. These pins are CMOS-compatible with 0.3×VDD/0.7×VDD thresholds and include internal 50 kΩ pull-ups to VDD, enabling simple GPIO control from an FPGA or microcontroller without external biasing.

What is the total frequency stability specification for the 547CAA002454BBG?

The 547CAA002454BBG is specified with ±20 ppm total frequency stability over –40 to +85 °C. This value includes contributions from temperature variation, initial calibration accuracy, load pulling, supply voltage variation, and 20-year aging at 70 °C - per Skyworks' datasheet Table 2.1. It reflects guaranteed performance across lifetime and environmental stress, not just short-term temperature drift.

Does the 547CAA002454BBG require an external crystal?

No, the 547CAA002454BBG does not require an external crystal. It integrates a fixed-frequency crystal and Skyworks' 4th-generation DSPLL® circuitry on-die, enabling synthesis of any four frequencies from 0.2 to 1500 MHz without external resonators. This eliminates crystal matching, layout sensitivity, and long lead times associated with custom fundamental-mode crystals - all four frequencies are fully tested and programmed before shipment.

What is the power-up behavior of the 547CAA002454BBG?

The 547CAA002454BBG achieves stable output within 10 ms after VDD reaches 90% of nominal (e.g., 3.0 V for 3.3 V operation), per datasheet parameter tOSC. During power-up, outputs remain in high-impedance state until lock is achieved. The device also specifies a maximum VDD ramp rate of 100 V/ms to prevent latch-up - slower ramps are acceptable, but faster ones risk functional failure.

547CAA002454BBG Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Ultra™ Si547

Package/Case:: 8-SMD, No Lead

Packaging:: Strip

Product Status:: Active

Base Resonator:: Crystal

Type:: XO (Standard)

Frequency - Output 1:: 12MHz, 24MHz, 45.154MHz, 49.152MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: CMOS

Voltage - Supply:: 1.8V, 2.5V, 3.3V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 127mA

Ratings:: -

Size / Dimension:: 0.197" L x 0.126" W (5.00mm x 3.20mm)

Height:: 0.052" (1.33mm)

Supplier Device Package:: -

547CAA002454BBG FAQ

1.How can I place an order for 547CAA002454BBG through Aetrix?

Please submit a Request for Quotation (RFQ) for 547CAA002454BBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 547CAA002454BBG reliable?

The price and inventory of 547CAA002454BBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 547CAA002454BBG is usually 5 days.

3.What payment methods are accepted for 547CAA002454BBG?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 547CAA002454BBG transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 547CAA002454BBG?

547CAA002454BBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 547CAA002454BBG order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 547CAA002454BBG?

For technical support, including 547CAA002454BBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 547CAA002454BBG requirements.

6.How does Aetrix verify that 547CAA002454BBG is sourced from the original manufacturer or authorized distributors?

All 547CAA002454BBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 547CAA002454BBG meets industry standards.

7.What is the process for return or replacement of 547CAA002454BBG?

All 547CAA002454BBG units undergo pre-shipment inspection (PSI). If there is an issue with 547CAA002454BBG, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 547CAA002454BBG part is unused and in its original packaging.

Return procedure for 547CAA002454BBG:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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