Skyworks Solutions Inc. 552BA000338DGR
- Part No.:
- 552BA000338DGR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 6-SMD, No Lead
- Datasheet:
-
552BA000338DGR.pdf
- Description:
- XTAL OSC VCXO 3.3V 6SMD
- Quantity:
- Payment:

- Shipping:

Inventory:4,468
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Product details
Overview
552BA000338DGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) with factory-programmed output frequencies of 156.25 MHz and 312.5 MHz, 3.3 V LVDS output, ±50 ppm temperature stability, and 90 ppm/V tuning slope. It delivers ultra-low phase jitter (0.37 ps RMS, 12 kHz–20 MHz) and operates across –40 to +85 °C in telecom and datacom timing applications.
For engineers reviewing the 552BA000338DGR datasheet, 552BA000338DGR pinout, 552BA000338DGR application, or 552BA000338DGR equivalent, this page provides verified electrical specs, dual-frequency switching behavior, DSPLL®-based supply noise rejection, LVDS output compliance, and real-world selection guidance for SONET/SDH, 10GbE, and optical module clocking.
Technical Context
The 552BA000338DGR implements Skyworks' 3rd-generation DSPLL® architecture to synthesize two precise output frequencies from a single internal fixed-crystal reference. Its dual-frequency selection is controlled via the FS pin, enabling seamless switching between 156.25 MHz and 312.5 MHz without reconfiguration delay (settling time ≤10 ms).
It features an analog VC input with 90 ppm/V tuning slope, 0–VDD control range, and 10.0 kHz modulation bandwidth, supporting tight PLL lock in jitter-sensitive systems. The LVDS output delivers 0.7 VPP differential swing with 45–55% duty cycle symmetry and 350 ps rise/fall time, compliant with industry-standard termination (100 Ω differential).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Nominal Frequencies | 156.25 MHz (FS = 0), 312.5 MHz (FS = 1); enables dual-rate clocking in SerDes and Ethernet PHYs |
| Output Format | LVDS; requires 100 Ω differential termination, supports point-to-point or multi-drop with proper layout |
| Supply Voltage | 3.3 V ±10%; stable operation at 2.97–3.63 V ensures compatibility with standard logic rails |
| Phase Jitter (RMS) | 0.37 ps (12 kHz–20 MHz); meets OC-48/OC-192 requirements for SONET/SDH clock recovery |
| Temp Stability | ±50 ppm (–40 to +85 °C); maintains frequency accuracy across industrial temperature range |
| Tuning Slope (KV) | 90 ppm/V; balances APR (±80 ppm) and jitter sensitivity for robust PLL design |
| Aging (15 yr) | ±10 ppm; guarantees long-term frequency drift control in deployed infrastructure equipment |
Pinout & Package
552BA000338DGR is housed in an industry-standard 5 × 7 mm, 6-pad surface-mount package (RoHS-compliant, Pb-free). Pin 1 is marked by a dot on top silkscreen; device uses exposed pad for thermal conduction and ground connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VC | Analog control input | Accepts 0–VDD tuning voltage; 500 kΩ input impedance minimizes loading on loop filter |
| 2 - FS | Digital frequency select | Logic high selects 312.5 MHz; logic low selects 156.25 MHz; internal 17 kΩ pull-up to VDD |
| 3 - GND | Ground reference | Common return for power, outputs, and control; must be low-inductance connection to PCB ground plane |
| 4 - CLK+ | Differential output (+) | LVDS-compatible; 1.20 V nominal mid-level, 0.7 VPP swing into 100 Ω diff load |
| 5 - CLK− | Differential output (−) | Complementary to CLK+; unused in CMOS mode but required for LVDS operation |
| 6 - VDD | Power supply | 3.3 V input; decoupling capacitor (0.1 µF + 10 µF) required within 5 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual-frequency programmability | Two factory-set frequencies (156.25/312.5 MHz) enable flexible rate adaptation in multi-standard PHYs |
| DSPLL® jitter suppression | 0.37 ps RMS phase jitter enables clean clocking for 10 GbE LAN/WAN and OTU-2/OTU-3 interfaces |
| Fixed internal crystal | Eliminates external crystal sourcing; improves reliability and reduces aging vs. SAW-based VCXOs |
| Supply noise rejection | Superior PSR inherent to DSPLL architecture simplifies power integrity design in noisy communication boards |
| Industry-standard footprint | 5 × 7 mm, 6-pad layout matches legacy timing devices-no PCB redesign needed for drop-in replacement |
Applications
| SONET/SDH Line Cards | xDSL Central Office Equipment |
|---|---|
Use Scenario: Generating synchronous clocks for OC-48/OC-192 framer and mapper ICs in optical line terminals. IC Role / Device Role / Timing Role: Primary low-jitter reference for clock and data recovery (CDR) subsystems requiring <0.5 ps RMS jitter. Use Value: 0.37 ps RMS phase jitter at 156.25 MHz meets GR-1244-CORE jitter mask for SONET OC-48 transport layers. | Use Scenario: Providing master timing for ADSL2+/VDSL2 line cards handling multiple simultaneous DSLAM channels. IC Role / Device Role / Timing Role: Dual-frequency VCXO supplying both 156.25 MHz (for ATM cell processing) and 312.5 MHz (for G.fast PHY layer). Use Value: FS pin switching enables dynamic rate adaptation without external frequency synthesizers or clock muxes. |
| 10 GbE Optical Transceivers | Clock and Data Recovery (CDR) Modules |
Use Scenario: Driving the reference input of CDR ICs in SFP+ and XFP modules used in enterprise switches and routers. IC Role / Device Role / Timing Role: Low-phase-noise clock source for 10.3125 Gbps serial links with stringent BER requirements. Use Value: –132 dBc/Hz @ 10 kHz offset (at 156.25 MHz) suppresses deterministic jitter induced by power supply ripple. | Use Scenario: Serving as the tunable reference oscillator in adaptive CDR circuits that track incoming data streams with variable clock rates. IC Role / Device Role / Timing Role: Voltage-controlled reference with 90 ppm/V KV and ±80 ppm APR for wide-lock-range PLLs. Use Value: 10.0 kHz modulation bandwidth supports fast frequency acquisition during link training sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-frequency VCXO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si552BA000108DGR | Same family, same 3.3 V LVDS output, but programmed for 644.53 MHz / 693.48 MHz pair | Targets higher-speed OTN (OTU-4) and CPRI applications instead of 10GbE/SONET | Select when system requires >500 MHz dual frequencies and can accommodate higher supply current (108 mA typ) |
| Si5342-D06984-GM | Multi-output clock generator (not VCXO); includes integrated jitter cleaner, no analog VC input | Used in complex timing architectures requiring multiple synchronized outputs, not single VCXO replacement | Choose only if board already uses Si534x platform and needs jitter cleaning + frequency translation-not for direct 552BA000338DGR substitution |
Compared with Si552BA000108DGR and Si5342-D06984-GM, the 552BA000338DGR uniquely combines dual-frequency flexibility, analog voltage control, sub-0.4 ps jitter, and drop-in 5×7 mm packaging-making it optimal for cost-sensitive, space-constrained 10GbE and SONET line card designs where discrete VCXO simplicity is prioritized over multi-output complexity.
Availability
552BA000338DGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, xDSL central office equipment, and 10 GbE optical transceivers requiring stable component supply, long-lifecycle support, and RoHS-compliant timing solutions.
Supply support for 552BA000338DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and infrastructure markets.
The Si552 product line was designed specifically for high-reliability, low-jitter dual-frequency clock generation in telecom and datacom systems where traditional SAW-based VCXOs fail to meet phase noise and stability requirements.
FAQ
What are the exact factory-programmed frequencies for 552BA000338DGR?
The 552BA000338DGR is factory-configured for two precise output frequencies: 156.25 MHz when the FS pin is logic low (0), and 312.5 MHz when FS is logic high (1). These values are confirmed in Skyworks' official ordering documentation for part number 552BA000338DGR and align with common Ethernet and SONET reference clock standards.
Does 552BA000338DGR support CMOS output mode?
No, 552BA000338DGR does not support CMOS output. The "B" in its part number denotes LVDS output format per Skyworks' Si552 ordering convention. CMOS is only available in variants with "C", "G", or "J" as the second option code. Attempting to use 552BA000338DGR with CMOS load conditions will result in signal integrity failure.
What is the Absolute Pull Range (APR) for 552BA000338DGR?
The 552BA000338DGR has a minimum APR of ±80 ppm, calculated from its 90 ppm/V tuning slope and 3.3 V supply (0.5 × 3.3 V × 90 ppm/V = ±148.5 ppm nominal pull range, reduced by ±50 ppm temp stability and ±10 ppm aging per 15-year spec). This APR enables reliable lock in PLLs tracking signals with up to ±80 ppm long-term drift.
Can the 552BA000338DGR operate at 2.5 V supply?
No, 552BA000338DGR is specified exclusively for 3.3 V operation. The "A" in its part number indicates the 3.3 V supply option per Skyworks' configuration chart. Supplying 2.5 V will cause functional failure, including loss of output, incorrect frequency, or excessive jitter. Always verify VDD = 2.97–3.63 V per datasheet Table 1.
Is the 552BA000338DGR pin-compatible with other Si552 variants?
Yes, all Si552 devices-including 552BA000338DGR-share identical 6-pin, 5 × 7 mm package dimensions and pinout (VC, FS, GND, CLK+, CLK−, VDD). Mechanical and electrical pin compatibility is guaranteed across the family, enabling layout reuse when migrating between frequency, voltage, or output format variants.
552BA000338DGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si552
- Package/Case:
- 6-SMD, No Lead
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- VCXO
- Frequency - Output 1:
- 69MHz, 108MHz
- Frequency - Output 2:
- -
- Frequency - Output 3:
- -
- Frequency - Output 4:
- -
- Function:
- Enable/Disable
- Output:
- LVDS
- Voltage - Supply:
- 3.3V
- Frequency Stability:
- ±100ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 108mA
- Ratings:
- -
- Size / Dimension:
- 0.276" L x 0.197" W (7.00mm x 5.00mm)
- Height:
- 0.071" (1.80mm)
- Supplier Device Package:
- -
552BA000338DGR FAQ
1.How can I place an order for 552BA000338DGR through Aetrix?
Please submit a Request for Quotation (RFQ) for 552BA000338DGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 552BA000338DGR reliable?
The price and inventory of 552BA000338DGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 552BA000338DGR is usually 5 days.
3.What payment methods are accepted for 552BA000338DGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 552BA000338DGR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 552BA000338DGR?
552BA000338DGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 552BA000338DGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 552BA000338DGR?
For technical support, including 552BA000338DGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 552BA000338DGR requirements.
6.How does Aetrix verify that 552BA000338DGR is sourced from the original manufacturer or authorized distributors?
All 552BA000338DGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 552BA000338DGR meets industry standards.
7.What is the process for return or replacement of 552BA000338DGR?
All 552BA000338DGR units undergo pre-shipment inspection (PSI). If there is an issue with 552BA000338DGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 552BA000338DGR part is unused and in its original packaging.
Return procedure for 552BA000338DGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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