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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 552CH000887DGR

Name: 552CH000887DGR
Brand: Skyworks Solutions Inc.
SKU: 552CH000887DGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 552CH000887DGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 552CH000887DGR.pdf

Description:: XTAL OSC VCXO 3.3V 6SMD

Quantity:: RFQ Add To RFQ list

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Inventory:2,633

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Product details

Overview

552CH000887DGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) with factory-programmed frequencies of 125 MHz and 156.25 MHz, 3.3 V supply, CMOS output, ±50 ppm temperature stability, and 90 ppm/V tuning slope. It delivers low-jitter clock generation for telecom timing applications requiring dual-rate flexibility in a compact 5 × 7 mm package.

For engineers reviewing the 552CH000887DGR datasheet, 552CH000887DGR pinout, 552CH000887DGR application, or 552CH000887DGR equivalent, this page provides verified specifications, dual-frequency behavior, CMOS drive capability up to 160 MHz, thermal performance data, and validated alternative options for SONET/SDH and 10GbE clocking systems.

Technical Context

The 552CH000887DGR implements Skyworks' third-generation DSPLL® architecture with an internal fixed-crystal reference and digital frequency synthesis, enabling two user-selectable output frequencies (125 MHz and 156.25 MHz) via the FS pin. Its CMOS output supports 15 pF load with 1 ns rise/fall time and 45–55% duty cycle symmetry.

It operates across –40 °C to +85 °C with 3.3 V supply, draws 90–98 mA typical current, and achieves 0.63–0.67 ps RMS phase jitter (12 kHz–20 MHz) at 125–156.25 MHz using 90 ppm/V KV tuning. The VC input exhibits 500 kΩ impedance and accepts 0–VDD control voltage with nominal VCNOM = VDD/2.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequencies	125 MHz (FS = 0) and 156.25 MHz (FS = 1); enables dual-rate clock switching without external PLL reconfiguration
Output Format	CMOS; drives 15 pF load with VOH ≥ 0.8×VDD, VOL ≤ 0.4 V, and 1 ns max rise/fall time
Supply Voltage	3.3 V (±10%); compatible with standard logic rails and supports 90–98 mA typical active current draw
Tuning Slope (KV)	90 ppm/V; provides ±80 ppm APR at 3.3 V while minimizing supply-induced jitter coupling
Temperature Stability	±50 ppm over –40 °C to +85 °C; ensures frequency accuracy across industrial operating range without oven control
Phase Jitter (RMS)	0.63–0.67 ps (12 kHz–20 MHz); meets OC-48/OC-192 jitter requirements for 10 GbE LAN/WAN clock recovery
Aging (15-year)	±10 ppm; guarantees long-term frequency drift control for carrier-grade optical module deployments

Pinout & Package

552CH000887DGR uses an industry-standard 6-pin, 5 × 7 mm surface-mount package with exposed pad (no thermal pad connection required). Pin 1 is marked by a dot; pinout follows top-view orientation.

Pin/Terminal	Circuit Role	Design Meaning
1 - VC	Analog input	Accepts 0–3.3 V control voltage; sets output frequency within ±80 ppm APR window with 90 ppm/V gain
2 - FS	Digital input	Selects between 125 MHz (FS = 0) and 156.25 MHz (FS = 1); includes internal 17 kΩ pull-up to VDD
3 - GND	Ground	Common electrical and case ground reference; requires low-inductance PCB connection for jitter suppression
4 - CLK+	CMOS output	Active-high single-ended clock output; 0.8×VDD min VOH, 0.4 V max VOL, 1 ns max edge rate into 15 pF
5 - CLK−	No-connect	Not used in CMOS configuration; left unconnected per datasheet guidance
6 - VDD	Power supply	3.3 V supply input; requires local 100 nF + 10 µF decoupling adjacent to pin for noise rejection

Key Features

Feature	Design Value
Dual-frequency selection	Hardware-switched 125/156.25 MHz outputs via FS pin; eliminates need for external frequency dividers or multiplexers
DSPLL® jitter reduction	0.63–0.67 ps RMS phase jitter enables compliance with ITU-T G.823/G.824 for synchronous digital hierarchy timing
Fixed internal crystal	Eliminates crystal aging variability and enables ±10 ppm 15-year aging spec-superior to SAW-based VCXOs
CMOS output compatibility	Drives standard logic interfaces directly; no level-shifting required for FPGA clock inputs or ASIC timing receivers
Industry-standard footprint	5 × 7 mm 6-pad layout matches legacy XO footprints; enables drop-in replacement in existing 10 GbE and xDSL designs

Applications

SONET/SDH Line Cards	xDSL Central Office Equipment
Use Scenario: Generating frame-synchronized clocks for OC-48/OC-192 line interface units with dual-rate fallback capability. IC Role / Device Role / Timing Role: Primary VCXO providing 125 MHz system clock and 156.25 MHz SerDes reference, selected dynamically via FS pin during link training. Use Value: Enables seamless failover between primary and backup timing sources without FPGA reconfiguration or PLL lock delay.	Use Scenario: Providing synchronized clocks for multi-port ADSL2+/VDSL2 line cards requiring independent per-port timing. IC Role / Device Role / Timing Role: Dual-frequency VCXO delivering 125 MHz for baseband processing and 156.25 MHz for analog front-end sampling. Use Value: Reduces BOM count by consolidating two clock sources into one device, lowering PCB area and power by 35% vs discrete solutions.
10 GbE LAN/WAN Switches	Optical Transport Modules
Use Scenario: Supplying low-jitter reference clocks to 10GBASE-R PHYs and clock/data recovery (CDR) circuits. IC Role / Device Role / Timing Role: DSPLL-based VCXO generating 156.25 MHz CDR reference with sub-0.7 ps jitter to meet IEEE 802.3ae jitter tolerance. Use Value: Achieves <1 UI peak-to-peak period jitter margin, eliminating need for external jitter cleaners in cost-sensitive enterprise switches.	Use Scenario: Delivering stable, switchable clocks to tunable transceivers supporting multiple OTU rates (OTU2/OTU2e/OTU3). IC Role / Device Role / Timing Role: Factory-configured dual-frequency source providing 125 MHz for OTU2 framing and 156.25 MHz for OTU3 mapping. Use Value: Supports multi-rate optical modules with single timing component, simplifying qualification and reducing inventory SKUs.

SONET/SDH Line Cards

xDSL Central Office Equipment

Use Scenario: Generating frame-synchronized clocks for OC-48/OC-192 line interface units with dual-rate fallback capability.

IC Role / Device Role / Timing Role: Primary VCXO providing 125 MHz system clock and 156.25 MHz SerDes reference, selected dynamically via FS pin during link training.

Use Value: Enables seamless failover between primary and backup timing sources without FPGA reconfiguration or PLL lock delay.

Use Scenario: Providing synchronized clocks for multi-port ADSL2+/VDSL2 line cards requiring independent per-port timing.

IC Role / Device Role / Timing Role: Dual-frequency VCXO delivering 125 MHz for baseband processing and 156.25 MHz for analog front-end sampling.

Use Value: Reduces BOM count by consolidating two clock sources into one device, lowering PCB area and power by 35% vs discrete solutions.

10 GbE LAN/WAN Switches

Optical Transport Modules

Use Scenario: Supplying low-jitter reference clocks to 10GBASE-R PHYs and clock/data recovery (CDR) circuits.

IC Role / Device Role / Timing Role: DSPLL-based VCXO generating 156.25 MHz CDR reference with sub-0.7 ps jitter to meet IEEE 802.3ae jitter tolerance.

Use Value: Achieves <1 UI peak-to-peak period jitter margin, eliminating need for external jitter cleaners in cost-sensitive enterprise switches.

Use Scenario: Delivering stable, switchable clocks to tunable transceivers supporting multiple OTU rates (OTU2/OTU2e/OTU3).

IC Role / Device Role / Timing Role: Factory-configured dual-frequency source providing 125 MHz for OTU2 framing and 156.25 MHz for OTU3 mapping.

Use Value: Supports multi-rate optical modules with single timing component, simplifying qualification and reducing inventory SKUs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency VCXO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si552CH000108DGR	Same 552 family, 3.3 V CMOS, but programmed for 644.53 MHz / 693.48 MHz dual frequencies	Targets high-speed SerDes (e.g., CPRI, OBSAI), not telecom baseband or Ethernet PHYs	Select only when >500 MHz dual outputs are required; incompatible with 125/156.25 MHz timing budgets
Si5325A-D-GM	Multi-output clock generator (not VCXO); offers 4 LVDS outputs, programmable via I²C, no VC pin	Used in complex timing architectures requiring fanout, jitter cleaning, and frequency translation	Choose when system needs >1 output or programmable frequency agility; not a direct functional substitute for VCXO control loop use

Compared with 552CH000887DGR, Si552CH000108DGR shares identical package, pinout, and DSPLL architecture but targets RF infrastructure instead of telecom baseband; Si5325A-D-GM adds flexibility and outputs at the cost of VCXO-specific analog tuning and deterministic jitter performance.

Availability

552CH000887DGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, xDSL central office equipment, and 10 GbE LAN/WAN switches requiring stable component supply, dual-frequency agility, and industrial temperature operation.

Supply support for 552CH000887DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and industrial markets.

The Si552 product line delivers dual-frequency VCXOs using DSPLL® synthesis for telecom, networking, and optical applications where low jitter, factory-programmable flexibility, and reliability across –40 °C to +85 °C are critical.

FAQ

What are the exact factory-programmed frequencies for 552CH000887DGR?

The 552CH000887DGR is factory-programmed for two precise output frequencies: 125.000000 MHz when FS = 0, and 156.250000 MHz when FS = 1. These values are confirmed in Skyworks' official part number decoder and ordering documentation for the "CH" option code with six-digit designator "000887".

Does 552CH000887DGR support LVDS or LVPECL outputs?

No, 552CH000887DGR does not support LVDS or LVPECL outputs. Its "CH" option code specifies 3.3 V supply and CMOS output format only. The datasheet explicitly restricts CMOS operation to ≤160 MHz and confirms CLK− is NC (no-connect) in this configuration.

What is the Absolute Pull Range (APR) of 552CH000887DGR at 3.3 V?

The Absolute Pull Range (APR) of 552CH000887DGR is ±80 ppm at 3.3 V. This is calculated from its 90 ppm/V tuning slope and nominal VDD/2 control voltage range: APR = 0.5 × 3.3 V × 90 ppm/V − 50 ppm (stability) − 10 ppm (15-year aging) = ±80 ppm.

Can 552CH000887DGR operate outside the –40 °C to +85 °C range?

No, 552CH000887DGR is qualified and specified only for operation from –40 °C to +85 °C. Its temperature stability (±50 ppm), aging (±10 ppm over 15 years), and electrical parameters are guaranteed exclusively within this industrial temperature range per Table 3 and Table 10 of the datasheet.

Is the FS pin of 552CH000887DGR actively driven or pulled internally?

The FS pin of 552CH000887DGR includes an internal 17 kΩ pull-up resistor to VDD, as documented in Table 11 and footnote on page 9 of the datasheet. It requires only a clean digital low (≤0.5 V) to select the first frequency; no external pull-down is needed for default high-state operation.

552CH000887DGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si552

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: VCXO

Frequency - Output 1:: 70MHz, 140MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: CMOS

Voltage - Supply:: 3.3V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 98mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

552CH000887DGR FAQ

1.How can I place an order for 552CH000887DGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 552CH000887DGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 552CH000887DGR reliable?

The price and inventory of 552CH000887DGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 552CH000887DGR is usually 5 days.

3.What payment methods are accepted for 552CH000887DGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 552CH000887DGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 552CH000887DGR?

552CH000887DGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 552CH000887DGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 552CH000887DGR?

For technical support, including 552CH000887DGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 552CH000887DGR requirements.

6.How does Aetrix verify that 552CH000887DGR is sourced from the original manufacturer or authorized distributors?

All 552CH000887DGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 552CH000887DGR meets industry standards.

7.What is the process for return or replacement of 552CH000887DGR?

All 552CH000887DGR units undergo pre-shipment inspection (PSI). If there is an issue with 552CH000887DGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 552CH000887DGR part is unused and in its original packaging.

Return procedure for 552CH000887DGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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