Skyworks Solutions Inc. 554AA000129DGR

Overview

554AA000129DGR from Skyworks Solutions is a quad-frequency voltage-controlled crystal oscillator (VCXO) with factory-programmed output frequencies of 125 MHz, 155.52 MHz, 156.25 MHz, and 161.1328125 MHz, ±50 ppm temperature stability, 3.3 V supply, LVPECL output, and 135 ppm/V tuning slope. It delivers ultra-low phase jitter (0.26 ps RMS, 12 kHz–20 MHz) for clock and data recovery in high-speed serial links.

For engineers reviewing the 554AA000129DGR datasheet, 554AA000129DGR pinout, 554AA000129DGR application, or 554AA000129DGR equivalent, this device supports frequency selection via FS[1:0], output enable control, and precise analog tuning - critical for SONET/SDH timing, 10GbE PHY synchronization, and optical module clocking where low-jitter, multi-rate VCXO performance is required.

Technical Context

The 554AA000129DGR implements Skyworks' third-generation DSPLL® architecture, synthesizing four discrete output frequencies from a single internal fixed-crystal reference. Its analog VC input (0–VDD) drives a digitally controlled loop with programmable KV = 135 ppm/V, enabling precise APR tracking while maintaining ±50 ppm stability over –40 to +85 °C.

It features LVPECL differential outputs (VOD = 1.1–1.9 VPP, symmetry 45–55%), integrated 17 kΩ pull-up resistors on OE and FS[1:0], and tristate capability with 60–75 mA standby current. Power-up time is ≤10 ms, and frequency settling after FS[1:0] change is ≤20 ms.

Key Specifications

Pinout & Package

554AA000129DGR is housed in an industry-standard, RoHS-compliant, 5 × 7 mm, 8-pad surface-mount package (MSL 1, Pb-free).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-frequency VCXO applications.

Compared with Si552AA000129DGR and MAX2682AETM+, the 554AA000129DGR uniquely delivers four factory-programmed frequencies with sub-0.3 ps jitter and DSPLL-based supply noise immunity - essential for next-generation telecom and optical timing architectures.

Availability

554AA000129DGR is available at Aetrix Electronics and suitable for SONET/SDH line cards, 10GbE PHYs, and optical transceiver modules requiring stable component supply, long-lifecycle support, and guaranteed RoHS compliance.

Supply support for 554AA000129DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si554 product line is designed for high-reliability, low-jitter timing in telecom infrastructure, enterprise networking, and optical communications - delivering programmable VCXO performance without custom crystal dependencies.

FAQ

What output frequencies are factory-programmed in the 554AA000129DGR?

The 554AA000129DGR is configured with four specific output frequencies: 125 MHz, 155.52 MHz, 156.25 MHz, and 161.1328125 MHz. These are permanently programmed during manufacturing and selected via the 2-bit FS[1:0] interface. The part number suffix '000129' maps to this exact frequency set per Skyworks' ordering convention.

Does the 554AA000129DGR support CMOS output format?

No, the 554AA000129DGR uses LVPECL output, as indicated by the second option code 'A' in its part number. CMOS is only available for Si554 variants with option codes C, G, J, P, T, or V - and is limited to frequencies ≤160 MHz. This part's 155.52–161.1328125 MHz outputs exceed that limit for CMOS.

What is the absolute pull range (APR) of the 554AA000129DGR?

The 554AA000129DGR has an APR of ±100 ppm at 3.3 V, calculated as (0.5 × 3.3 V) × 135 ppm/V − ±50 ppm stability − 10 ppm aging. This allows it to track reference signals with up to ±100 ppm deviation over temperature, aging, and supply variation - meeting OC-192 and OTN timing requirements.

How does the DSPLL® architecture in the 554AA000129DGR improve jitter performance?

The DSPLL® in the 554AA000129DGR replaces traditional analog PLLs with a digital loop filter and fractional-N synthesis, achieving 0.26 ps RMS phase jitter (12 kHz–20 MHz). It provides superior supply noise rejection and eliminates VCO gain variation, resulting in consistent jitter across all four output frequencies - unlike SAW-based VCXOs.

Can the 554AA000129DGR be reprogrammed after shipment?

No, the 554AA000129DGR is factory-programmed with fixed parameters including frequencies, KV, output format, and stability. Configuration is one-time and non-volatile. Reprogramming is not supported; alternative configurations require ordering a new part number with updated option codes.