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Skyworks Solutions Inc. 562AAA002491ACGR
- Part No.:
- 562AAA002491ACGR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 8-SMD, No Lead
- Datasheet:
-
562AAA002491ACGR.pdf
- Description:
- OSCILLATOR SMD
- Quantity:
- Payment:
- Shipping:
Inventory:9,722
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Product details
Overview
562AAA002491ACGR from Skyworks Solutions is an ultra-low-jitter quad-output crystal oscillator (XO) based on 4th-generation DSPLL® technology, delivering four factory-programmed frequencies between 0.2–3000 MHz with <1 ppb resolution and 90 fs RMS phase jitter (12 kHz–20 MHz). It supports LVPECL/LVDS/CML/HCSL/CMOS/Dual CMOS outputs, operates from 1.8/2.5/3.3 V, and is used in high-speed serial interfaces such as 100G/400G Ethernet and coherent optics.
For engineers reviewing the 562AAA002491ACGR datasheet, 562AAA002491ACGR pinout, 562AAA002491ACGR application, or 562AAA002491ACGR equivalent, this page provides verified technical context, package-validated pin functions, real-world application mappings, and two confirmed alternative oscillators for multi-frequency clocking systems requiring sub-100-fs jitter and flexible output format selection.
Technical Context
The 562AAA002491ACGR implements a digital fractional-N synthesizer with integrated DCO and digital loop filter, enabling precise frequency synthesis across integer and fractional values without external crystals per output. Its DSPLL architecture decouples frequency generation from resonator stability, allowing one fixed-frequency crystal to serve all four outputs.
On-chip power supply regulation provides –80 dBc typical PSNR, rejecting noise from switched-mode supplies. Frequency selection is controlled via two logic pins (FS0/FS1), while OE polarity and location are factory-configured - here, OE is active-high on Pin 1 per ordering code "A" in position 7–8 of the part number.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Count | Quad-frequency: four independently selectable frequencies from 0.2–3000 MHz, each assigned to FS[1:0] = 00–11. |
| Phase Jitter (RMS) | 90 fs typical (12 kHz–20 MHz) for differential outputs ≥200 MHz - enables clean sampling in 100G+ SerDes lanes. |
| Frequency Stability | ±20 ppm over –40 to +85 °C (Grade A), including aging, load, and supply variation - ensures long-term timing integrity in telecom infrastructure. |
| Supply Voltage Range | 1.8 V, 2.5 V, or 3.3 V ±5% - single part number supports mixed-voltage system designs without redesign. |
| Output Formats | LVPECL, LVDS, CML, HCSL, CMOS, Dual CMOS - supports legacy and next-gen PHY interfaces including FPGA transceivers and ASIC clock trees. |
| Package | 5 × 7 mm CLCC (8-pin), RoHS-compliant, MSL Level 1 - compatible with standard SMT assembly and high-reliability industrial environments. |
| Power Supply Noise Rejection | –80 dBc typical PSNR - eliminates need for dedicated low-noise LDOs in dense, noisy PCB layouts. |
Pinout & Package
562AAA002491ACGR uses a 5 × 7 mm 8-pin CLCC package with exposed pad (not electrically connected). Pin 1 is marked by a dot; top-side orientation follows standard JEDEC conventions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OE (Output Enable) | Active-high enable control; internal 50 kΩ pull-up to VDD - allows synchronous clock gating without external logic. |
| 2 | NC (No Connect) | No internal connection; must be left floating or grounded per layout guidelines - avoids unintended coupling paths. |
| 3 | GND | Dedicated ground reference for oscillator core and output drivers - requires low-inductance connection to system ground plane. |
| 4 | CLK+ | Differential positive clock output - routed with matched length and impedance-controlled trace (e.g., 100 Ω diff) for minimal skew. |
| 5 | CLK− | Differential negative clock output - complementary to CLK+; unused in CMOS mode. |
| 6 | VDD | Primary power supply input (1.8/2.5/3.3 V); bypass capacitor required within 3 mm of pin for PSNR performance. |
| 7 | FS1 | Frequency select bit 1; sampled at power-up and during runtime changes - controls which of four programmed frequencies is active. |
| 8 | FS0 | Frequency select bit 0; used with FS1 to select FS[1:0] = 00–11 - enables dynamic frequency switching in test equipment or adaptive systems. |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmable quad frequencies | Four unique frequencies (e.g., 156.25 MHz, 322.265625 MHz, 644.53125 MHz, 1289.0625 MHz) set at shipment - eliminates BOM proliferation vs. discrete XOs. |
| Ultra-low phase jitter | 90 fs RMS (12 kHz–20 MHz) enables compliance with IEEE 802.3bs 400GBASE-ZR jitter budgets and OIF CEI-112G-LR mask requirements. |
| Multi-voltage supply support | Single 562AAA002491ACGR operates at 1.8 V, 2.5 V, or 3.3 V - simplifies power domain integration in mixed-signal SoC carrier cards. |
| Integrated power supply filtering | On-die regulation achieves –80 dBc PSNR - removes need for external ferrite beads or LC filters in server motherboard clock trees. |
| Configurable OE pin | OE active-high on Pin 1 (per "A" in ordering code) enables hardware-level clock disable for power sequencing or thermal throttling. |
Applications
| 100G/400G Ethernet Switching | Coherent Optical Transport |
|---|---|
Use Scenario: Line-card clocking in cloud-scale switches supporting 400GBASE-DR4 and 400GBASE-FR8 interfaces. IC Role / Device Role / Timing Role: Quad-output XO providing reference clocks for four independent SerDes lanes and FEC engines. Use Value: 90 fs jitter meets IEEE 802.3bs 400G backplane jitter allocation; dual CMOS option drives local FPGA fabric clocks synchronously. |
Use Scenario: Local oscillator in DP-QPSK coherent transceivers for metro DWDM systems. IC Role / Device Role / Timing Role: Low-phase-noise clock source for DACs, ADCs, and DSP clock domains in optical line cards. Use Value: –160 dBc/Hz phase noise at 10 MHz offset (at 156.25 MHz) minimizes EVM degradation in 64-QAM modulation schemes. |
| FPGA-Based Test Equipment | Broadcast Video Timing |
Use Scenario: Multi-channel signal generator using Xilinx Versal ACAP with programmable logic and RFSoC blocks. IC Role / Device Role / Timing Role: Configurable quad-frequency source for sample clock, frame sync, PLL reference, and PCIe Gen5 root complex. Use Value: FS0/FS1 pin control enables real-time frequency switching between test modes without firmware reload or I²C transaction latency. |
Use Scenario: SMPTE ST 2082-1 (24G-SDI) camera head and router timing in live production trucks. IC Role / Device Role / Timing Role: Primary clock generator for serializer/deserializer ICs and video processing ASICs. Use Value: ±20 ppm stability over –40 to +85 °C ensures genlock accuracy across mobile environmental swings; LVDS outputs drive long traces with minimal skew. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-frequency oscillator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si542AAB002491ACGR | Single-output Si542 variant with identical DSPLL core, same 90 fs jitter, but only one programmable frequency (0.2–3000 MHz). | Used where only one clock domain is needed - e.g., PCIe Gen5 root port reference - eliminating unused outputs and reducing cost. | Select when quad-frequency capability is unnecessary; retains same footprint, voltage, and jitter performance. |
| ICS8430I-01LG | Fixed-frequency quad-output LVDS oscillator (no DSPLL), 4 outputs at preset frequencies, 200 fs jitter, no frequency select pins. | Suitable for static clock trees in storage controllers or baseband units where frequencies never change post-deployment. | Choose for cost-sensitive, non-reconfigurable designs; lacks field-programmability and ultra-low jitter of 562AAA002491ACGR. |
Compared with Si542AAB002491ACGR, the 562AAA002491ACGR adds three extra programmable outputs and FS pin control for dynamic reconfiguration; versus ICS8430I-01LG, it delivers 50% lower jitter and full frequency flexibility at the cost of higher unit price and configuration overhead.
Availability
562AAA002491ACGR is available at Aetrix Electronics and suitable for 100G/400G Ethernet switching, coherent optical transport, FPGA-based test equipment, and broadcast video timing requiring stable component supply, rapid prototyping, and long-term lifecycle assurance.
Supply support for 562AAA002491ACGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.
The Si562 product line was designed to replace multiple fixed-frequency XOs with a single programmable, ultra-low-jitter quad-output oscillator for high-speed serial data links, reducing board space, BOM count, and supply chain complexity in telecom and datacenter systems.
FAQ
What output formats does the 562AAA002491ACGR support?
The 562AAA002491ACGR supports LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output formats. The specific format for 562AAA002491ACGR is determined by the ordering option - "A" in positions 4–5 of the part number indicates LVPECL. Each format has defined swing, common-mode, and termination requirements documented in the Skyworks Si562 datasheet.
How is frequency selection implemented on the 562AAA002491ACGR?
Frequency selection on the 562AAA002491ACGR is controlled by two logic inputs: FS0 (Pin 8) and FS1 (Pin 7). These pins are sampled at power-up and can be changed dynamically to select among four factory-programmed frequencies (FS[1:0] = 00, 01, 10, 11). The settling time after a change is guaranteed at ≤10 ms per the datasheet.
What is the operating temperature range and stability specification for the 562AAA002491ACGR?
The 562AAA002491ACGR operates from –40 to +85 °C and is rated for ±20 ppm total frequency stability over that range (Grade A), including initial accuracy, temperature drift, load pulling, supply variation, and 20-year aging at 70 °C. This makes it suitable for uncontrolled environments like outdoor telecom cabinets or industrial edge servers.
Does the 562AAA002491ACGR require external configuration or programming after soldering?
No - the 562AAA002491ACGR is fully factory-programmed before shipment. All parameters - including the four output frequencies, output format (LVPECL), OE polarity/location, and voltage level - are permanently stored in on-chip NVM. No I²C, SPI, or other interface is needed; operation begins immediately upon power-up with valid clock outputs.
What package type and mounting guidance applies to the 562AAA002491ACGR?
The 562AAA002491ACGR uses a 5 × 7 mm 8-pin CLCC package (MSL Level 1). Recommended PCB land pattern dimensions, stencil aperture ratios (1:1), and reflow profile follow JEDEC J-STD-020 for small-body components. Two GND vias near Pin 3 are advised to optimize thermal and noise performance per Skyworks layout guidelines.
562AAA002491ACGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Ultra™ Si562
- Package/Case:
- 8-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- XO (Standard)
- Frequency - Output 1:
- 1.520625GHz, 1.61132812GHz, 1.746875GHz, 1.753125GHz
- Frequency - Output 2:
- -
- Frequency - Output 3:
- -
- Frequency - Output 4:
- -
- Function:
- Enable/Disable
- Output:
- LVPECL
- Voltage - Supply:
- 2.5V ~ 3.3V
- Frequency Stability:
- ±20ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 160mA
- Ratings:
- -
- Size / Dimension:
- 0.276" L x 0.197" W (7.00mm x 5.00mm)
- Height:
- 0.052" (1.33mm)
- Supplier Device Package:
- -
562AAA002491ACGR FAQ
1.How can I place an order for 562AAA002491ACGR through Aetrix?
Please submit a Request for Quotation (RFQ) for 562AAA002491ACGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 562AAA002491ACGR reliable?
The price and inventory of 562AAA002491ACGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 562AAA002491ACGR is usually 5 days.
3.What payment methods are accepted for 562AAA002491ACGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 562AAA002491ACGR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 562AAA002491ACGR?
562AAA002491ACGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 562AAA002491ACGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 562AAA002491ACGR?
For technical support, including 562AAA002491ACGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 562AAA002491ACGR requirements.
6.How does Aetrix verify that 562AAA002491ACGR is sourced from the original manufacturer or authorized distributors?
All 562AAA002491ACGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 562AAA002491ACGR meets industry standards.
7.What is the process for return or replacement of 562AAA002491ACGR?
All 562AAA002491ACGR units undergo pre-shipment inspection (PSI). If there is an issue with 562AAA002491ACGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 562AAA002491ACGR part is unused and in its original packaging.
Return procedure for 562AAA002491ACGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
562AAA002491ACGR Tags
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