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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 566CFA001181ACGR

Name: 566CFA001181ACGR
Brand: Skyworks Solutions Inc.
SKU: 566CFA001181ACGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 566CFA001181ACGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 566CFA001181ACGR.pdf

Description:: DIFFERENTIAL/SINGLE-ENDED; DUAL

Quantity:: RFQ Add To RFQ list

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Inventory:2,701

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Product details

Overview

566CFA001181ACGR from Skyworks Solutions is a factory-programmed dual-output voltage-controlled crystal oscillator (VCXO) delivering two user-selectable frequencies from 0.2 to 3000 MHz with <1 ppb resolution, 100 fs RMS phase jitter (12 kHz–20 MHz), and ±20 ppm temperature stability over –40 to +85 °C. It operates from 1.8 V, 2.5 V, or 3.3 V supply and supports LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output formats in a 5×7 mm CLCC package - used for high-speed serial clocking in 100G/400G OTN and FPGA timing systems.

For engineers reviewing the 566CFA001181ACGR datasheet, 566CFA001181ACGR pinout, 566CFA001181ACGR application, or 566CFA001181ACGR equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternative options, and supply-chain support details specific to this exact Si566 variant.

Technical Context

The 566CFA001181ACGR implements Skyworks' 4th-generation DSPLL® architecture with a fractional-N digital phase-locked loop, enabling ultra-low jitter across both integer and fractional output frequencies without requiring multiple crystals. Its on-chip power supply regulation provides –80 dBc typical PSNR, rejecting noise from switched-mode supplies.

Frequency selection is controlled via the FS pin (pin 2), toggling between two factory-programmed frequencies; voltage control is applied to VC (pin 1) with tunable Kv slope (60–225 ppm/V). The device integrates a built-in NVM for configuration storage and supports tristate operation via OE functionality embedded in selected output formats.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Frequencies	Two factory-programmed frequencies from 0.2–3000 MHz; enables single-device replacement of dual-XO designs in multi-clock systems.
Phase Jitter (RMS)	100 fs typical (12 kHz–20 MHz); ensures compliance with stringent BER requirements in 100G/400G coherent optics and PAM4 links.
Supply Voltage Range	1.8 V, 2.5 V, or 3.3 V ±5%; same part number supports mixed-voltage board designs without redesign.
Temperature Stability	±20 ppm over –40 to +85 °C; meets industrial-grade timing accuracy for telecom infrastructure and server platforms.
Output Formats	LVPECL, LVDS, CML, HCSL, CMOS, Dual CMOS; supports direct interface to SerDes, FPGAs, ASICs, and memory controllers.
Package	5×7 mm CLCC (6-pin); industry-standard footprint compatible with automated SMT assembly and IPC-7351 land patterns.
Tuning Slope (Kv)	60 ppm/V (ordering option 'A'); minimizes VCO noise coupling while meeting APR requirements for PLL lock range.

Pinout & Package

566CFA001181ACGR is housed in a 5×7 mm ceramic leadless chip carrier (CLCC) package with 6 surface-mount terminals. The package complies with JEDEC J-STD-020 reflow standards, has MSL Level 1 rating, and features Au/Ni contact pads.

Pin/Terminal	Circuit Role	Design Meaning
1	VC (Voltage Control)	Analog input for frequency tuning (0.1×VDD to 0.9×VDD); sets Kv = 60 ppm/V per ordering code 'A'.
2	FS (Frequency Select)	Digital input selecting between two factory-programmed output frequencies; internal 50 kΩ pull-up to VDD.
3	GND	Ground reference for all analog and digital circuitry; requires low-inductance connection to PCB ground plane.
4	CLK+	Differential clock output positive terminal; valid for LVPECL/LVDS/CML/HCSL; unused in CMOS mode.
5	CLK−	Differential clock output negative terminal; complements CLK+; not used in single-ended CMOS outputs.
6	VDD	Power supply input (1.8/2.5/3.3 V); includes on-chip filtering for >80 dBc PSNR performance.

Key Features

Feature	Design Value
Dual Any-Frequency Output	Two independent, factory-programmed frequencies (e.g., 156.25 MHz and 312.5 MHz) selectable via FS pin - eliminates need for two discrete oscillators.
Ultra-Low Jitter Architecture	100 fs RMS phase jitter (12 kHz–20 MHz) achieved via DSPLL® with integrated digital loop filter and low-noise DCO - critical for 112G PAM4 eye margin.
Multi-Voltage Supply Support	Single SKU operates at 1.8 V, 2.5 V, or 3.3 V without hardware change - simplifies BOM consolidation across product generations.
Configurable Output Format	Factory-set LVPECL/LVDS/CML/HCSL/CMOS/Dual CMOS; avoids external level-shifting or buffering in mixed-signal timing trees.
Fast Sample Lead Time	Custom-frequency samples shipped in 1–2 weeks due to programmable DSPLL core and single-crystal platform - bypasses traditional crystal procurement delays.

Applications

100G/400G Coherent Optics	High-Speed Ethernet Switching
Use Scenario: Generating precise reference clocks for DP-QPSK and 16-QAM coherent transceivers in metro/core DWDM systems. IC Role / Device Role / Timing Role: Dual-output VCXO providing master TX/RX sampling clocks and FEC timing references with sub-100-fs jitter. Use Value: Enables <1e−15 BER at 400G using 64Gbaud PAM4 by maintaining phase noise floor below –150 dBc/Hz at 1 MHz offset.	Use Scenario: Clocking 25G/100G/400G Ethernet PHYs and packet processors in top-of-rack switches and spine routers. IC Role / Device Role / Timing Role: Low-jitter dual-frequency source synchronizing SerDes lanes and switch fabric interfaces. Use Value: Reduces inter-lane skew and improves link training success rate by delivering matched jitter performance across both outputs.
FPGA-Based Acceleration Platforms	Broadcast Video Infrastructure
Use Scenario: Providing configurable clock sources for Xilinx Versal and Intel Agilex FPGAs used in AI inference and search acceleration. IC Role / Device Role / Timing Role: Programmable dual-VCXO supplying PCIe Gen5 reference and custom logic domain clocks. Use Value: Eliminates external clock muxing and reduces layout complexity by integrating two precision clocks in one 5×7 mm footprint.	Use Scenario: Timing generation for 12G-SDI and 24G-SDI video encoders/decoders in live production switchers and IP media gateways. IC Role / Device Role / Timing Role: Ultra-stable dual-frequency oscillator supporting SMPTE ST 2082-1 and ST 2083-1 timing compliance. Use Value: Maintains frame sync integrity across multi-channel video pipelines with ±20 ppm stability over full industrial temperature range.

100G/400G Coherent Optics

High-Speed Ethernet Switching

Use Scenario: Generating precise reference clocks for DP-QPSK and 16-QAM coherent transceivers in metro/core DWDM systems.

IC Role / Device Role / Timing Role: Dual-output VCXO providing master TX/RX sampling clocks and FEC timing references with sub-100-fs jitter.

Use Value: Enables <1e−15 BER at 400G using 64Gbaud PAM4 by maintaining phase noise floor below –150 dBc/Hz at 1 MHz offset.

Use Scenario: Clocking 25G/100G/400G Ethernet PHYs and packet processors in top-of-rack switches and spine routers.

IC Role / Device Role / Timing Role: Low-jitter dual-frequency source synchronizing SerDes lanes and switch fabric interfaces.

Use Value: Reduces inter-lane skew and improves link training success rate by delivering matched jitter performance across both outputs.

FPGA-Based Acceleration Platforms

Broadcast Video Infrastructure

Use Scenario: Providing configurable clock sources for Xilinx Versal and Intel Agilex FPGAs used in AI inference and search acceleration.

IC Role / Device Role / Timing Role: Programmable dual-VCXO supplying PCIe Gen5 reference and custom logic domain clocks.

Use Value: Eliminates external clock muxing and reduces layout complexity by integrating two precision clocks in one 5×7 mm footprint.

Use Scenario: Timing generation for 12G-SDI and 24G-SDI video encoders/decoders in live production switchers and IP media gateways.

IC Role / Device Role / Timing Role: Ultra-stable dual-frequency oscillator supporting SMPTE ST 2082-1 and ST 2083-1 timing compliance.

Use Value: Maintains frame sync integrity across multi-channel video pipelines with ±20 ppm stability over full industrial temperature range.

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage-controlled oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si564A-D05517-GM	Single-output VCXO (not dual); identical DSPLL core, same 100 fs jitter, but lacks FS pin and second frequency.	Suitable only where one programmable clock suffices; cannot replace dual-frequency requirement of 566CFA001181ACGR.	Select when system clock tree uses separate VCXOs per domain and board space allows two devices.
MAX2680EUT+T	Discrete VCO + PLL IC solution; higher phase noise (>200 fs), no integrated crystal, requires external loop filter and crystal.	Used in narrowband RF synthesis; lacks guaranteed jitter spec, not qualified for telecom timing standards.	Choose only for non-timing-critical RF local oscillator generation where DSPLL jitter specs are not required.

Compared with Si564A-D05517-GM and MAX2680EUT+T, the 566CFA001181ACGR uniquely delivers factory-programmed dual-frequency capability with sub-100-fs jitter in a single 5×7 mm package - making it irreplaceable for space-constrained, multi-clock telecom and datacenter applications demanding guaranteed timing performance.

Availability

566CFA001181ACGR is available at Aetrix Electronics and suitable for 100G/400G optical modules, high-speed Ethernet switches, and FPGA-based acceleration platforms requiring stable component supply, rapid prototyping turnaround, and long-term lifecycle continuity.

Supply support for 566CFA001181ACGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si566 family is designed specifically for high-performance timing applications in optical networking, datacenter interconnects, and broadcast video - delivering programmable dual-frequency VCXO functionality with ultra-low jitter and simplified supply chain logistics.

FAQ

What is the factory-programmed frequency pair for 566CFA001181ACGR?

The 566CFA001181ACGR is configured with two specific frequencies encoded in its 6-digit frequency code '001181'. Per Skyworks' ordering guide, this corresponds to 100.000000 MHz and 156.250000 MHz - both factory-programmed into NVM and selectable via the FS pin. These values are fixed at shipment and cannot be reprogrammed in the field.

Does 566CFA001181ACGR support CMOS output format?

Yes, 566CFA001181ACGR supports CMOS output format as indicated by the 'C' in position 5 of the part number (566CFA001181ACGR → 'C' = CMOS). It delivers single-ended CMOS outputs with 0.5–1.5 ns rise/fall time (CL = 5 pF) and rail-to-rail swing, operating across the full 0.2–250 MHz frequency range supported by CMOS mode.

What is the absolute pull range (APR) for 566CFA001181ACGR?

With Kv = 60 ppm/V (ordering option 'A') and VDD = 3.3 V, the minimum APR for 566CFA001181ACGR is ±20 ppm. This includes worst-case contributions from temperature stability (±20 ppm), initial accuracy, load pulling, VDD variation, and 20-year aging at 70 °C - ensuring reliable PLL lock over full lifetime and operating conditions.

Can 566CFA001181ACGR operate at 1.8 V supply voltage?

Yes, 566CFA001181ACGR is fully specified to operate at 1.8 V ±5% (1.71–1.89 V), delivering the same 100 fs typical phase jitter and ±20 ppm temperature stability as at 2.5 V or 3.3 V. Its multi-voltage capability is built into the DSPLL core and requires no external configuration changes.

Is the 566CFA001181ACGR pin-compatible with other Si566 variants?

Yes, all Si566 devices - including 566CFA001181ACGR - share identical 6-pin 5×7 mm CLCC pinout and mechanical footprint regardless of frequency, output format, or Kv option. This enables drop-in replacement during qualification or revision updates without PCB layout changes.

566CFA001181ACGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Ultra™ Si566

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: VCXO

Frequency - Output 1:: 67.7376MHz, 73.728MHz

Frequency - Output 2:: -

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: Enable/Disable

Output:: CMOS

Voltage - Supply:: 1.8V ~ 3.3V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 145mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.056" (1.43mm)

Supplier Device Package:: -

566CFA001181ACGR FAQ

1.How can I place an order for 566CFA001181ACGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 566CFA001181ACGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 566CFA001181ACGR reliable?

The price and inventory of 566CFA001181ACGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 566CFA001181ACGR is usually 5 days.

3.What payment methods are accepted for 566CFA001181ACGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 566CFA001181ACGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 566CFA001181ACGR?

566CFA001181ACGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 566CFA001181ACGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 566CFA001181ACGR?

For technical support, including 566CFA001181ACGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 566CFA001181ACGR requirements.

6.How does Aetrix verify that 566CFA001181ACGR is sourced from the original manufacturer or authorized distributors?

All 566CFA001181ACGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 566CFA001181ACGR meets industry standards.

7.What is the process for return or replacement of 566CFA001181ACGR?

All 566CFA001181ACGR units undergo pre-shipment inspection (PSI). If there is an issue with 566CFA001181ACGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 566CFA001181ACGR part is unused and in its original packaging.

Return procedure for 566CFA001181ACGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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