Skyworks Solutions Inc. 567BAA002604ACG
- Part No.:
- 567BAA002604ACG
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Pin Configurable/Selectable Oscillators
- Package:
- 8-SMD, No Lead
- Datasheet:
-
567BAA002604ACG.pdf
- Description:
- DIFFERENTIAL/SINGLE-ENDED; QUAD
- Quantity:
- Payment:

- Shipping:

Inventory:4,357
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Product details
Overview
567BAA002604ACG from Skyworks Solutions is a factory-programmed, quad-frequency voltage-controlled crystal oscillator (VCXO) based on 4th-generation DSPLL® technology. It delivers four user-selectable frequencies from 0.2 to 3000 MHz with <1 ppb resolution, 100 fs RMS phase jitter (12 kHz–20 MHz), ±20 ppm temperature stability, and operates from 1.8/2.5/3.3 V supply. It serves as a low-jitter clock source in high-speed serial interfaces such as 100G Ethernet and coherent optics.
For engineers reviewing the 567BAA002604ACG datasheet, 567BAA002604ACG pinout, 567BAA002604ACG application, or 567BAA002604ACG equivalent, key selection criteria include VCXO tuning slope (Kv = 60 ppm/V), 5×7 mm CLCC package, LVPECL output compatibility, and PSNR of –83 dBc under 50 mVpp supply ripple - all critical for noise-sensitive PLL and FPGA clocking designs.
Technical Context
The 567BAA002604ACG integrates a fractional-N DSPLL with on-chip power supply filtering and digital loop control, enabling ultra-low jitter across integer and fractional output frequencies without external crystal swaps. Its architecture includes a fixed-frequency crystal oscillator feeding a digitally controlled oscillator (DCO), with ADC-based VC input conditioning and built-in NVM for factory configuration.
It supports pin-controlled frequency selection via FS[1:0] inputs and output enable (OE) with internal 50 kΩ pull-up/pull-down, while maintaining independent voltage control (VC) with 0.1×VDD to 0.9×VDD range and ±10% Kv variation. The device uses a single crystal and programmable DCO to generate up to four distinct frequencies, eliminating custom crystal procurement per frequency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 0.2–3000 MHz (LVPECL/LVDS/CML); supports any four factory-programmed frequencies with <1 ppb resolution |
| Phase Jitter (RMS) | 100 fs typical (12 kHz–20 MHz, Kv = 60 ppm/V, FCLK ≥ 200 MHz), directly enabling clean sampling in 112G PAM4 receivers |
| Supply Voltage | 1.8 V / 2.5 V / 3.3 V ±5% - single part number supports three rail voltages without redesign |
| Temperature Stability | ±20 ppm over –40 to +85 °C, contributing to worst-case APR calculation for long-term PLL lock reliability |
| Power Supply Noise Rejection | –83 dBc typical (100–500 kHz ripple), allowing robust operation with switched-mode power supplies in dense server PCBs |
| Tuning Slope (Kv) | 60 ppm/V (ordering option A), minimizing noise coupling into the control path for optimal jitter performance |
| Package | 5×7 mm 8-pin CLCC - industry-standard footprint with ΘJA = 53 °C/W for thermal-aware board layout |
Pinout & Package
567BAA002604ACG is housed in a 5×7 mm 8-pin ceramic leadless chip carrier (CLCC) package with exposed pad (not electrically connected). Pin 1 is marked by a dot; pins are arranged in two rows (4×2), with GND (Pin 1), OE (Pin 2), VDD (Pin 3), CLK+ (Pin 4), CLK− (Pin 5), VC (Pin 6), FS1 (Pin 7), and FS0 (Pin 8).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Ground reference for all internal circuitry and output drivers; requires low-impedance connection to system ground plane |
| 2 | OE | Output enable (active-high, internal 50 kΩ pull-up); asserts tristate within 3 µs when disabled |
| 3 | VDD | Primary power supply (1.8/2.5/3.3 V); decoupling capacitor required within 3 mm of pin |
| 4 | CLK+ | Differential clock output positive leg; used with CLK− for LVPECL/LVDS/CML; unused in CMOS mode |
| 5 | CLK− | Differential clock output negative leg; provides complementary signal for balanced transmission and EMI reduction |
| 6 | VC | Voltage control input (0.1×VDD to 0.9×VDD); sets output frequency deviation with 60 ppm/V slope |
| 7 | FS1 | Frequency select bit 1 (50 kΩ pull-up); selects one of four factory-programmed frequencies (FS[1:0] = 00–11) |
| 8 | FS0 | Frequency select bit 0 (50 kΩ pull-up); LSB of 2-bit frequency selection interface |
Key Features
| Feature | Design Value |
|---|---|
| Quad-frequency programmability | Four distinct, factory-configured frequencies (0.2–3000 MHz) selectable via two logic pins - replaces multiple discrete oscillators |
| Ultra-low jitter architecture | 100 fs RMS phase jitter enables compliance with IEEE 802.3bs 400G KR4 and OIF CEI-112G-LR jitter budgets |
| Multi-voltage supply support | Single 567BAA002604ACG operates at 1.8 V, 2.5 V, or 3.3 V - eliminates BOM variants for mixed-rail systems |
| On-chip supply noise rejection | –83 dBc PSNR allows direct integration with noisy DC/DC converters, reducing need for LDOs in space-constrained modules |
| Flexible output formats | LVPECL-compatible outputs with differential swing up to 1.9 VPP (FCLK < 1.5 GHz) - interoperable with SerDes CDR inputs |
Applications
| 100G/400G OTN Coherent Optics | 100G Ethernet Switches |
|---|---|
Use Scenario: Generating precise local oscillator (LO) and data-rate clocks for dual-polarization QPSK/QAM modulators and coherent DSP ASICs in pluggable transceivers. IC Role / Device Role / Timing Role: Quad-frequency VCXO providing synchronized LO synthesis and FEC clocking with sub-100 fs jitter to maintain EVM and BER <1e−12. Use Value: Enables single-device replacement of four discrete VCXOs, reducing PCB area by >65% and eliminating inter-device skew in multi-lane timing paths. | Use Scenario: Clocking 100G KR4/CR4 PHYs and switch fabric ASICs in top-of-rack data center switches with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Low-phase-noise clock source for SerDes CDRs and packet buffer memory controllers, operating at 156.25 MHz and harmonics. Use Value: Delivers 110 fs jitter at 156.25 MHz (LVDS), meeting IEEE 802.3bj Annex 83F mask and enabling margin-rich link training. |
| 56G/112G PAM4 FPGA Prototyping | High-End Broadcast Video (24G-SDI) |
Use Scenario: Providing reference clocks to FPGA transceiver banks during development of 56G/112G PAM4 test equipment and adaptive equalizer IP. IC Role / Device Role / Timing Role: Programmable VCXO supplying tunable, low-jitter clocks to GTY/GTM transceivers for eye diagram validation and jitter tolerance testing. Use Value: Factory-programmed four-frequency capability allows rapid reconfiguration between 28.125 GHz, 56.25 GHz, and PAM4 symbol rates without hardware change. | Use Scenario: Synchronizing frame timing and pixel clock generation in 24G-SDI camera backends and distribution amplifiers requiring SMPTE ST 2083 compliance. IC Role / Device Role / Timing Role: Stable, low-drift clock generator for video serializer/deserializer ICs, supporting 24.000 GHz pixel rate with ±20 ppm stability over industrial temperature. Use Value: Eliminates crystal aging drift and temperature hysteresis seen in traditional XOs, ensuring stable genlock across 24-hour broadcast cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar VCXO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si566BAA002604ACG | Triple-frequency VCXO (3 outputs); identical pinout, package, and electrical specs except FS[1:0] maps to 3 frequencies | Lower channel count; insufficient for quad-clock architectures like 400G FR4 or dual-ASIC timing domains | Select only if exactly three frequencies are needed and board layout must be reused |
| MAX2680AUB+T | Discrete LC-based VCO (not crystal-referenced); 100–400 MHz range; no integrated PLL; 2.5 ps jitter | Lacks frequency stability and long-term aging performance; unsuitable for telecom-grade timing | Use only in cost-sensitive, non-telecom applications where ±100 ppm stability is acceptable |
Compared with Si566BAA002604ACG, 567BAA002604ACG adds a fourth frequency channel without changing footprint or supply requirements, enabling consolidation of timing resources in multi-standard systems; versus MAX2680AUB+T, it trades wider tuning range for crystal-level stability and 25× lower jitter - essential for coherent optical and high-speed serial links.
Availability
567BAA002604ACG is available at Aetrix Electronics and suitable for 100G/400G optical modules, high-end Ethernet switches, FPGA-based test equipment, and broadcast video infrastructure requiring stable component supply and guaranteed long-term availability.
Supply support for 567BAA002604ACG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.
The Si567 product line is designed for high-performance timing applications demanding ultra-low jitter, multi-frequency flexibility, and rapid customization - targeting next-generation optical transport, AI/ML accelerators, and real-time video processing systems.
FAQ
What output format does the 567BAA002604ACG use?
The 567BAA002604ACG is configured as an LVPECL-output VCXO, as indicated by ordering code 'A' in position 5 of the part number. It delivers differential outputs (CLK+, CLK−) with typical swing of 1.1–1.9 VPP depending on frequency, compatible with standard LVPECL receivers and requiring 50 Ω termination to VDD − 2.0 V.
Does the 567BAA002604ACG require external programming after soldering?
No, the 567BAA002604ACG is fully factory-programmed before shipment. All parameters - including its four specific frequencies, output format (LVPECL), OE polarity (active-high on Pin 2), and tuning slope (60 ppm/V) - are stored in on-chip NVM and operational immediately upon power-up with no I²C or SPI interface required.
What is the absolute pull range (APR) of the 567BAA002604ACG?
The 567BAA002604ACG has a minimum APR of ±20 ppm at 3.3 V, calculated from its 60 ppm/V tuning slope, initial accuracy, temperature stability (±20 ppm), load pulling, VDD variation, and 20-year aging. This APR ensures reliable lock to reference clocks with up to ±20 ppm total instability over full life and temperature range.
Can the 567BAA002604ACG operate at 1.8 V supply?
Yes, the 567BAA002604ACG supports 1.8 V ±5% operation (1.71–1.89 V), delivering full specification performance including 100 fs jitter and 350 ps rise/fall time. Supply current is reduced to ~95 mA (CMOS) or ~100 mA (LVDS) at 1.8 V, enabling use in power-constrained edge AI and portable test equipment.
How is frequency selection implemented on the 567BAA002604ACG?
Frequency selection on the 567BAA002604ACG is performed using two dedicated logic inputs: FS1 (Pin 7) and FS0 (Pin 8). These pins accept CMOS-level signals with internal 50 kΩ pull-ups to VDD, selecting one of four factory-programmed frequencies (FS[1:0] = 00, 01, 10, or 11) with 10 ms settling time after change.
567BAA002604ACG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Ultra™ Si567
- Package/Case:
- 8-SMD, No Lead
- Packaging:
- Strip
- Product Status:
- Active
- Base Resonator:
- Crystal
- Type:
- VCXO
- Frequency - Output 1:
- 333.33MHz
- Frequency - Output 2:
- 10MHz
- Frequency - Output 3:
- 10MHz
- Frequency - Output 4:
- 10MHz
- Function:
- -
- Output:
- LVDS
- Voltage - Supply:
- 1.8V, 2.5V, 3.3V
- Frequency Stability:
- ±20ppm
- Operating Temperature:
- -40°C ~ 85°C
- Current - Supply (Max):
- 140mA
- Ratings:
- -
- Size / Dimension:
- 0.276" L x 0.197" W (7.00mm x 5.00mm)
- Height:
- 0.052" (1.33mm)
- Supplier Device Package:
- -
567BAA002604ACG FAQ
1.How can I place an order for 567BAA002604ACG through Aetrix?
Please submit a Request for Quotation (RFQ) for 567BAA002604ACG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 567BAA002604ACG reliable?
The price and inventory of 567BAA002604ACG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 567BAA002604ACG is usually 5 days.
3.What payment methods are accepted for 567BAA002604ACG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 567BAA002604ACG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 567BAA002604ACG?
567BAA002604ACG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 567BAA002604ACG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 567BAA002604ACG?
For technical support, including 567BAA002604ACG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 567BAA002604ACG requirements.
6.How does Aetrix verify that 567BAA002604ACG is sourced from the original manufacturer or authorized distributors?
All 567BAA002604ACG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 567BAA002604ACG meets industry standards.
7.What is the process for return or replacement of 567BAA002604ACG?
All 567BAA002604ACG units undergo pre-shipment inspection (PSI). If there is an issue with 567BAA002604ACG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 567BAA002604ACG part is unused and in its original packaging.
Return procedure for 567BAA002604ACG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
567BAA002604ACG Tags

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ASEMDHC-L-R
Abracon LLC

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513FCA000270AAG
Skyworks Solutions Inc.

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Skyworks Solutions Inc.
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DSC6021CI2A-009TT
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