Analog Devices Inc. 5962-8962902LA
- Part No.:
- 5962-8962902LA
- Manufacturer:
- Analog Devices Inc.
- Category:
- Specialized
- Package:
- 24-CDIP (0.300", 7.62mm)
- Datasheet:
-
5962-8962902LA.pdf
- Description:
- LINEAR, 8-BIT ANALOG I/O SYSTEM,
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
5962-8962902LA from Analog Devices is a MIL-STD-883 qualified, Class B monolithic 8-bit analog I/O system integrating dual DAC and single ADC functions in one GDIP3-T24 package. It delivers ±1/2 LSB relative accuracy for both DAC and ADC, supports unipolar (0 to +2.5 V) and bipolar (±1.25 V) ranges via VSS/RANGE control, and operates across –55°C to +125°C for defense-grade embedded signal conditioning.
For engineers reviewing the 5962-8962902LA datasheet, 5962-8962902LA pinout, 5962-8962902LA application, or 5962-8962902LA equivalent, this device serves as a radiation-tolerant, temperature-hardened analog interface for legacy military avionics, missile guidance telemetry, and secure comms subsystems requiring deterministic timing and dual-supply operation.
Technical Context
The 5962-8962902LA implements a synchronous parallel bus interface with WR/CS/RD/ST control signals and TTL-compatible logic levels. Its internal architecture separates AGNDDAC and AGNDADC grounds to minimize DAC-to-ADC crosstalk, while RANGE/VSS selection configures data format (binary or 2's complement) and full-scale output range simultaneously for both conversion paths.
It supports two ADC interface modes: Mode 1 uses ST-triggered conversion with BUSY/INT handshaking, while Mode 2 initiates conversion on RD low; conversion time is 2.0 µs with external 5 MHz clock or 1.6–2.6 µs with internal RC oscillator. DAC settling time and ADC aperture uncertainty are specified under MIL-PRF-38535 Class B screening.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC Relative Accuracy | ±1/2 LSB - guarantees monotonicity and ≤0.2% full-scale error over –55°C to +125°C |
| ADC Relative Accuracy | ±1/2 LSB - ensures no missing codes and <0.2% INL across full military temperature range |
| Supply Voltage Range | ±4.75 V to ±5.25 V - dual-rail operation enables true bipolar analog signal handling |
| Operating Temperature | –55°C to +125°C - qualified per MIL-STD-883 for airborne and space-qualified platforms |
| Conversion Time | 2.0 µs (ext. clock) / 1.6–2.6 µs (int. RC) - deterministic latency critical for real-time closed-loop control |
| Signal-to-Noise Ratio | 46 dB (DAC), 45 dB (ADC) - sufficient for 7–8 ENOB in telemetry and sensor front-end applications |
| Power Dissipation | 450 mW max - thermally managed via 120°C/W θJA for conduction-cooled chassis mounting |
Pinout & Package
5962-8962902LA is housed in a hermetic 24-pin GDIP3-T24 (dual-in-line, 0.600" wide) package with tin-lead lead finish, compliant with MIL-STD-1835 and screened to Class B per MIL-PRF-38535.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 22 | AGNDDAC / AGNDADC | Separate analog ground returns prevent DAC switching noise from corrupting ADC sampling |
| 2 | VOUT | Buffered DAC output supporting four programmable voltage ranges (0–1.25 V, 0–2.5 V, ±1.25 V, ±2.5 V) |
| 3, 27 | VSS / VIN | VSS sets negative supply (–5 V) and selects bipolar mode; VIN is high-impedance ADC input with 140 µA max input current |
| 4 | RANGE | Configures data format (binary vs. 2's complement) and full-scale range jointly with VSS |
| 5 | RESET | Asynchronous active-low reset clears DAC register to zero and deasserts INT, enabling deterministic startup |
| 6–14 | DB7–DB0 | 8-bit parallel data bus - MSB-first loading synchronizes with WR rising edge under CS enable |
| 12 | DGND | Digital ground reference isolated from analog grounds to suppress digital switching noise coupling |
| 15–17 | WR / CS / RD | Standard microprocessor bus controls - WR writes DAC, RD reads ADC result, CS enables device |
| 18 | ST | Falling-edge start-conversion trigger - decouples sampling timing from bus activity for jitter-free acquisition |
| 19–21 | BUSY / INT / CLK | BUSY indicates active conversion; INT flags completion; CLK accepts 5 MHz external clock or RC oscillator input |
| 24, 28 | VDD | +5 V supply pin - dual VDD connections improve power delivery stability and reduce IR drop |
Key Features
| Feature | Design Value |
|---|---|
| Split analog ground architecture | Independent AGNDDAC and AGNDADC pins reduce mutual interference below –60 dB |
| Programmable unipolar/bipolar operation | VSS/RANGE combination selects 0–2.5 V, ±1.25 V, or ±2.5 V ranges without external components |
| MIL-STD-883 Class B qualification | Includes burn-in at +125°C, steady-state life test (1000 hrs), and Group A–D screening per method 5005 |
| Dual ADC interface modes | Mode 1 (ST-triggered) and Mode 2 (RD-triggered) support flexible integration with legacy 8080/Z80-style buses |
| Guaranteed monotonic DAC | DNL ≤ ±3/4 LSB ensures no code skips - essential for closed-loop actuator control |
| Internal voltage reference | On-chip reference eliminates need for external precision reference, reducing BOM count and layout area |
Applications
| Avionics Sensor Interface | Missile Guidance Telemetry |
|---|---|
Use Scenario: Conditioning analog outputs from inertial measurement units (IMUs) and pressure transducers in fighter jet flight control systems. IC Role / Device Role / Timing Role: Simultaneous digitization of gyro/accelerometer signals and generation of servo drive waveforms with sub-microsecond timing alignment. Use Value: Enables deterministic sampling and DAC update within same 2.0 µs window, meeting DO-254 Level A timing constraints for primary flight control. |
Use Scenario: Real-time analog monitoring of seeker head voltages and telemetry transmission of processed guidance vectors in tactical missiles. IC Role / Device Role / Timing Role: ADC captures seeker bias drift; DAC adjusts RF front-end gain - both synchronized to onboard 5 MHz timing master. Use Value: Dual-supply ±5 V operation withstands launch vibration-induced rail droop; Class B screening ensures reliability at +125°C ambient. |
| Secure Communications Modem | Nuclear Command & Control System |
Use Scenario: Baseband signal conditioning in HF/VHF encrypted radios deployed in electronic warfare environments. IC Role / Device Role / Timing Role: Digitizing analog audio inputs and reconstructing modulated IF waveforms with precise amplitude control. Use Value: 46 dB SNR and ±1/2 LSB linearity preserve modulation fidelity; hermetic DIP package resists EMI and humidity ingress. |
Use Scenario: Analog I/O for radiation-hardened command verification circuits in hardened bunkers and mobile launch control centers. IC Role / Device Role / Timing Role: Converting status sensor voltages to digital values and generating analog lockout signals for safety interlocks. Use Value: –55°C to +125°C operation covers arctic to desert deployments; RESET pin ensures fail-safe initialization after brownout events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit analog I/O applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 5962-8962901LA | ±1 LSB DAC/ADC accuracy; unipolar-only default configuration; higher DNL (±1 LSB) | Suitable for non-critical sensor readout where cost > precision; lacks guaranteed monotonicity | Select only when ±1 LSB linearity suffices and bipolar operation is unused |
| AD7569TQ/883B | Same die as 5962-8962902LA; identical electrical specs; vendor-marked commercial-grade variant | Not screened to MIL-STD-883 Class B; lacks burn-in and steady-state life testing | Acceptable for ground-test or non-flight hardware where full qualification isn't mandated |
Compared with 5962-8962901LA, the 5962-8962902LA provides tighter linearity and guaranteed monotonicity for closed-loop control; versus AD7569TQ/883B, it adds full MIL-STD-883 Class B screening for mission-critical deployment.
Availability
5962-8962902LA is available at Aetrix Electronics and suitable for avionics sensor interface, missile guidance telemetry, and nuclear command & control systems requiring stable component supply across extended temperature and radiation environments.
Supply support for 5962-8962902LA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a U.S.-based semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for defense, aerospace, and industrial markets.
The 5962-8962902LA belongs to Analog Devices' military-grade linear microcircuit product line, designed specifically for ruggedized analog I/O in safety-critical embedded systems operating under extreme environmental stress.
FAQ
What is the DAC resolution and accuracy specification for 5962-8962902LA?
The 5962-8962902LA features an 8-bit DAC with ±1/2 LSB relative accuracy (INL) and guaranteed monotonicity (DNL ≤ ±3/4 LSB) over –55°C to +125°C. This corresponds to better than 0.2% full-scale linearity error and ensures no code transitions are skipped during ramp testing - a requirement for precision actuator control loops where 5962-8962902LA is commonly deployed.
How does the RANGE and VSS pin configuration affect analog I/O operation in 5962-8962902LA?
In the 5962-8962902LA, VSS and RANGE jointly select both input/output voltage range and data coding format: VSS = 0 V + RANGE = 0 selects 0–1.25 V unipolar binary; VSS = –5 V + RANGE = 1 selects ±2.5 V bipolar 2's complement. This dual-role configuration means changing VSS or RANGE redefines full-scale voltage, zero code output, and bit significance - all verified in the 5962-8962902LA truth table and code tables on Sheet 14 of the drawing.
Does 5962-8962902LA support internal clocking for ADC conversion?
Yes, the 5962-8962902LA supports internal clocking via an external RC network connected to the CLK pin. With appropriate resistor and capacitor values, it achieves 1.6–2.6 µs conversion time - faster than the 2.0 µs required with a 5 MHz external clock. The internal oscillator eliminates need for a separate clock source, simplifying design in space-constrained or low-EMI military enclosures where 5962-8962902LA is often integrated.
What grounding scheme does 5962-8962902LA use to minimize DAC-ADC crosstalk?
The 5962-8962902LA employs physically separate analog ground pins: AGNDDAC (Pin 1) for DAC output circuitry and AGNDADC (Pin 22) for ADC input circuitry. This split-ground architecture, combined with dedicated DGND (Pin 12) for digital logic, reduces shared-impedance coupling and maintains >60 dB channel isolation - a key design feature confirmed in the 5962-8962902LA pin descriptions on Sheet 12 and referenced in its MIL-PRF-38535 compliance documentation.
Is 5962-8962902LA qualified for spaceflight or radiation environments?
The 5962-8962902LA is not radiation-hardened or QML-V qualified; it meets MIL-STD-883 Class B requirements for temperature, vibration, and burn-in but lacks total ionizing dose (TID) or single-event effect (SEE) characterization. It is approved for airborne and ground-based defense systems per DSCC Bulletin 01-07-13, but not for orbital or nuclear survivability applications. For such use cases, alternative rad-hard DAC/ADC solutions must be selected instead of 5962-8962902LA.
5962-8962902LA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LC²MOS
- Package/Case:
- 24-CDIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Analog I/O
- Interface:
- Bus
- Voltage - Supply:
- 4.75V ~ 5.25V
- Supplier Device Package:
- 24-CDIP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
5962-8962902LA FAQ
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6.How does Aetrix verify that 5962-8962902LA is sourced from the original manufacturer or authorized distributors?
All 5962-8962902LA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 5962-8962902LA meets industry standards.
7.What is the process for return or replacement of 5962-8962902LA?
All 5962-8962902LA units undergo pre-shipment inspection (PSI). If there is an issue with 5962-8962902LA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 5962-8962902LA part is unused and in its original packaging.
Return procedure for 5962-8962902LA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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