My Inquiry
My Account
Analog Devices Inc. 5962-89654023A
- Part No.:
- 5962-89654023A
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-CLCC
- Datasheet:
-
5962-89654023A.pdf
- Description:
- 8 BIT A/D (AD9012)
- Quantity:
- Payment:
- Shipping:
Inventory:160
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
5962-89654023A from Analog Devices is a MIL-STD-883 compliant, Class B high-speed 8-bit monolithic silicon analog-to-digital converter with 75 MSPS conversion rate, ±5.2 V/±5 V dual supply operation, and differential reference input of 2.1 V dc. It features ENCODE-triggered parallel CMOS outputs (D1–D8), overflow detection, and operates across –55°C to +125°C for defense-grade radar front-ends and telemetry systems.
For engineers reviewing the 5962-89654023A datasheet, 5962-89654023A pinout, 5962-89654023A application, or 5962-89654023A equivalent, this page delivers verified electrical specs, terminal mapping for CDIP2-T28 and CQCC1-N28 packages, thermal limits, SNR (46 dB), DNL (0.5 LSB), and drop-in alternatives for ruggedized data acquisition designs.
Technical Context
This device implements a flash-converter architecture with internal reference ladder and hysteresis control, supporting single-shot or continuous encode timing via TTL-compatible ENCODE input. Its dual-supply analog section (VS− = −5.2 V, VS+ = +5 V) isolates sensitive analog inputs (−2.1 V to +0.5 V range) from digital I/O powered by separate DIGITAL VS+ and VS− rails.
Input bias current is limited to 200 µA max, input resistance is 25 kΩ min, and output drive capability meets LS00 load requirements with VOH ≥ 2.4 V and VOL ≤ 0.4 V. Timing-critical parameters include tPWL/tPWH ≤ 2.5 ns and output delay (tPD) between 4.0–11.0 ns referenced to ENCODE edge.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Conversion Rate | 75 MSPS - Enables real-time digitization of IF signals up to Nyquist frequency of 37.5 MHz in EW and SIGINT receivers. |
| Signal-to-Noise Ratio | 46 dB - Measured at 1.23 MHz input; defines dynamic range for medium-bandwidth RF sampling applications. |
| Differential Nonlinearity | 0.5 LSB (device type 02) - Guarantees monotonicity and <0.1% code missing over full temperature range. |
| Supply Voltages | VS+ = +5.0 V, VS− = −5.2 V - Dual-rail configuration supports bipolar analog input swing and reduces ground bounce coupling. |
| Operating Temperature | −55°C to +125°C - Qualified per MIL-PRF-38535 Class B for deployment in airborne, missile, and ground vehicle electronics. |
| Reference Voltage | Differential 2.1 V dc - Sets full-scale range; midpoint current fixed at 4 mA for stable ladder biasing. |
| Power Dissipation | 1.8 W (CQCC1-N28), 2.5 W (CDIP2-T28) - Dictates heatsink requirements in hermetic module integration. |
Pinout & Package
5962-89654023A is available in two hermetic outlines: CDIP2-T28 (dual-in-line, 28-pin) and CQCC1-N28 (square leadless chip carrier, 28-terminal). Both share identical terminal numbering and function mapping per Figure 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8, 13 | DIGITAL VS+ | Separate +5 V supply for CMOS output drivers; decoupling required to minimize digital noise coupling into analog section. |
| 2 | OVERFLOW INH | Active-low inhibit for overflow flag; pulled to −5.2 V to enable overflow detection on pin 27. |
| 3 | HYSTERESIS | Adjusts comparator hysteresis to suppress noise-induced code toggling near transition thresholds. |
| 4, 11 | +VREF / −VREF | Differential reference inputs; define 2.1 V full-scale span; require low-noise, matched routing. |
| 5, 10 | ANALOG INPUT | Differential input pair accepting −2.1 V to +0.5 V range; tied together for single-ended use with proper biasing. |
| 6, 9, 20, 23 | ANALOG GROUND / DIGITAL GROUND | Separate ground returns prevent digital switching noise from modulating analog conversion accuracy. |
| 7 | ENCODE | TTL-compatible clock input; rise/fall times <30 ns required to meet 75 MSPS timing; triggers parallel output update. |
| 14, 28 | DIGITAL VS− | −5.2 V rail for digital logic; isolated from analog VS− (pins 21–22) to maintain PSRR >2.5 mV/V. |
| 15–19, 24–26 | D1 (LSB) to D8 (MSB) | CMOS-compatible parallel data outputs; D1–D8 valid within 4–11 ns after ENCODE edge; LS00 load compliant. |
| 27 | OVERFLOW | Open-collector flag indicating input exceeded full-scale range; requires external pull-up to DIGITAL VS+. |
| 12 | REF mid | Midpoint of internal reference ladder; supplies 4 mA bias current; used for precision gain/offset calibration. |
| 21–22 | ANALOG VS− | −5.2 V analog supply; independent of digital VS− to preserve analog section PSRR and thermal stability. |
Key Features
| Feature | Design Value |
|---|---|
| 75 MSPS Conversion Rate | Enables direct sampling of L/S-band IF signals without undersampling artifacts in military comms receivers. |
| −55°C to +125°C Operation | Validated across full military temperature range per MIL-STD-883 Group A subgroups 1–4, eliminating derating calculations. |
| Differential Reference Input | 2.1 V dc span with 4 mA midpoint current ensures stable ladder biasing and minimizes drift-induced INL error. |
| Separate Analog/Digital Supplies | Dual VS+ and VS− rails for analog and digital sections reduce crosstalk; PSRR specified at 2.5 mV/V. |
| Overflow Detection with Inhibit | Pin 27 asserts overflow flag; pin 2 allows hardware disable during known-range signal acquisition to avoid false triggers. |
| Hermetic Package Options | CDIP2-T28 and CQCC1-N28 outlines meet MIL-STD-1835; qualified for long-term reliability in harsh environmental sealing. |
Applications
| Radar Pulse Digitization | Electronic Warfare Receivers |
|---|---|
|
Use Scenario: Digitizing 30–40 MHz IF pulses from pulse-Doppler radar front-ends under wide temperature excursions. IC Role / Device Role / Timing Role: High-speed parallel-output ADC capturing transient pulses with 75 MSPS sample rate and 46 dB SNR. Use Value: Maintains amplitude fidelity and timing resolution for pulse width/interval analysis in threat identification algorithms. |
Use Scenario: Real-time wideband signal capture in channelized receiver architectures for signal intelligence (SIGINT). IC Role / Device Role / Timing Role: Front-end ADC providing 8-bit resolution at 75 MSPS to feed FPGA-based FFT and demodulation pipelines. Use Value: Delivers consistent DNL (0.5 LSB) and INL (0.5 LSB) across −55°C to +125°C, ensuring calibration stability in mobile platforms. |
| Missile Telemetry Systems | Avionics Health Monitoring |
|
Use Scenario: Converting analog sensor outputs (vibration, pressure, temperature) in guided munitions during high-g launch and flight. IC Role / Device Role / Timing Role: Ruggedized ADC interfacing with isolated analog conditioning stages and MIL-STD-1553B data buses. Use Value: Hermetic CQCC1-N28 package and Class B qualification ensure survivability in shock/vibe environments exceeding 20 g RMS. |
Use Scenario: Sampling engine oil pressure, turbine RPM, and exhaust gas temperature in embedded FADEC controllers. IC Role / Device Role / Timing Role: Precision ADC operating from −55°C (cold soak) to +125°C (engine bay) with guaranteed INL ≤ 1.2 LSB. Use Value: Dual-ground architecture prevents digital noise from corrupting critical safety-critical analog measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 8-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9012SE/883B | Same die, CDIP2-T28 package only; DNL 0.75 LSB (vs. 0.5 LSB for 02-type); identical timing and thermal specs. | Preferred for through-hole prototyping and legacy board reuse where CQCC1-N28 footprint is unavailable. | Select when mechanical compatibility with existing DIP sockets is required and 0.25 LSB DNL margin is acceptable. |
| AD9012TQ/883B | Same die, CQCC1-N28 package only; matches 5962-89654023A's 0.5 LSB DNL and 75 MSPS performance; identical pinout. | Drop-in replacement for surface-mount high-density modules requiring hermetic reliability and minimal PCB area. | Choose for new designs targeting QML-38535-compliant SMT assembly with zero layout change from 5962-89654023A. |
Compared with AD9012SE/883B and AD9012TQ/883B, the 5962-89654023A uniquely supports both CDIP2-T28 and CQCC1-N28 packages under a single PIN, enabling flexible sourcing and dual-technology design reuse without requalification.
Availability
5962-89654023A is available at Aetrix Electronics and suitable for radar pulse digitization, electronic warfare receivers, missile telemetry systems, and avionics health monitoring requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for 5962-89654023A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a U.S.-based semiconductor company specializing in high-performance signal processing components for defense, aerospace, and industrial markets.
The AD9012 family was designed specifically for MIL-STD-883 Class B applications demanding high-speed, high-accuracy digitization in extreme environments-prioritizing thermal stability, radiation tolerance, and hermetic packaging integrity.
FAQ
What is the maximum analog input voltage range supported by the 5962-89654023A?
The 5962-89654023A accepts an analog input voltage range of −2.1 V dc to +0.5 V dc under all operating conditions. This range is defined relative to analog ground and applies across the full −55°C to +125°C ambient temperature range. Exceeding these limits risks damage or non-monotonic behavior, especially when combined with the specified differential reference voltage of 2.1 V dc.
Does the 5962-89654023A require external reference components?
No, the 5962-89654023A integrates a precision reference ladder with fixed 2.1 V differential span and 4 mA midpoint current. External components are not needed for basic operation; however, +VREF and −VREF pins must be driven with low-noise, well-matched sources if using an external reference. The internal ladder is enabled by default and calibrated to meet DNL ≤ 0.5 LSB.
Which package types are available for the 5962-89654023A?
The 5962-89654023A is qualified in two MIL-STD-1835 outlines: CDIP2-T28 (ceramic dual-in-line, 28-pin) and CQCC1-N28 (ceramic quad flatpack, 28-terminal leadless). Both share identical pin functions and electrical specifications. The "X" case outline denotes CDIP2-T28; "3" denotes CQCC1-N28 per the drawing's 1.2.2 section.
How does the overflow detection work on the 5962-89654023A?
The 5962-89654023A provides overflow detection via pin 27 (OVERFLOW), an open-collector output that pulls low when the analog input exceeds the full-scale range. Pin 2 (OVERFLOW INH) is an active-low enable: tying it to −5.2 V enables overflow reporting; pulling it high disables the flag. This allows selective monitoring during known-range signal acquisition.
What are the power supply requirements for reliable operation of the 5962-89654023A?
The 5962-89654023A requires three independent supply connections: analog VS− (−5.2 V), analog VS+ (+5.0 V), and digital VS−/VS+ (−5.2 V/+5.0 V). Supplies must remain stable within ±5 % during operation. Total power dissipation is 2.5 W for CDIP2-T28 and 1.8 W for CQCC1-N28 packages, with thermal resistance θJA of 60°C/W and 80°C/W respectively.
5962-89654023A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- AD9012
- Package/Case:
- 28-CLCC
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 100M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- -
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- -
- Reference Type:
- External
- Voltage - Supply, Analog:
- ±4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 4.75V ~ 5.25V
- Features:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Supplier Device Package:
- 28-CLCC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
5962-89654023A FAQ
1.How can I place an order for 5962-89654023A through Aetrix?
Please submit a Request for Quotation (RFQ) for 5962-89654023A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 5962-89654023A reliable?
The price and inventory of 5962-89654023A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 5962-89654023A is usually 5 days.
3.What payment methods are accepted for 5962-89654023A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 5962-89654023A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 5962-89654023A?
5962-89654023A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 5962-89654023A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 5962-89654023A?
For technical support, including 5962-89654023A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 5962-89654023A requirements.
6.How does Aetrix verify that 5962-89654023A is sourced from the original manufacturer or authorized distributors?
All 5962-89654023A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 5962-89654023A meets industry standards.
7.What is the process for return or replacement of 5962-89654023A?
All 5962-89654023A units undergo pre-shipment inspection (PSI). If there is an issue with 5962-89654023A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 5962-89654023A part is unused and in its original packaging.
Return procedure for 5962-89654023A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
5962-89654023A Tags
-
ADC081C021CIMKX/NOPB
Texas Instruments
-
MCP3021A5T-E/OT
Microchip Technology
-
TLA2024IRUGR
Texas Instruments
-
MCP3221A5T-E/OT
Microchip Technology
-
MCP3221A5T-I/OT
Microchip Technology
-
MCP3221A4T-E/OT
Microchip Technology
-
MCP3221A6T-E/OT
Microchip Technology
-
MCP3221A0T-E/OT
Microchip Technology
-
MCP3221A1T-E/OT
Microchip Technology
-
ADC121S021CIMFX/NOPB
Texas Instruments
-
MCP3001-I/MS
Microchip Technology
-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
