Analog Devices Inc. 5962-9317901MLA
- Part No.:
- 5962-9317901MLA
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- -
- Datasheet:
-
5962-9317901MLA.pdf
- Description:
- IC ADC 12BIT SAMPLING 24CERDIP
- Quantity:
- Payment:

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Inventory:1,841
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Product details
Overview
5962-9317901MLA from Analog Devices is a military-grade, hermetically sealed, 12-bit successive approximation ADC with integrated track-and-hold amplifier, laser-trimmed internal clock, and on-chip 3 V buried Zener reference. It supports ±3 V bipolar input range, delivers 72 dB SNR at 10 kHz, achieves 8 μs conversion time with external 2.5 MHz clock, and operates across −55°C to +125°C. It is used in precision data acquisition systems for avionics and defense radar front-ends.
For engineers reviewing the 5962-9317901MLA datasheet, 5962-9317901MLA pinout, 5962-9317901MLA application, or 5962-9317901MLA equivalent, this page provides verified technical context, validated pin functions, confirmed dynamic and dc specifications, real-world interface timing constraints, and qualified military-grade alternatives - all specific to the 5962-9317901MLA variant.
Technical Context
The 5962-9317901MLA implements a complete LC2MOS monolithic architecture integrating SAR conversion core, 2 μs track-and-hold, internal 3 V reference, and programmable digital interface logic. Its internal laser-trimmed oscillator guarantees 6.5–9 μs conversion time without external timing components.
It supports three output formats - parallel 12-bit word, two 8-bit bytes, or serial data via SDATA/SCLK/SSTRB - with 57 ns data access time and guaranteed timing over full military temperature range. The device uses twos-complement coding and requires ±5 V supplies with separate AGND/DGND planes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12 bits - guarantees no missing codes; minimum resolution for full-scale monotonicity. |
| Sampling Rate | 100 kHz - maximum sustained throughput with 2 μs acquisition + 8 μs conversion. |
| SNR @ 10 kHz | 72 dB min - defines usable dynamic range for baseband signal digitization in radar IF stages. |
| Integral Nonlinearity | ±1/4 LSB typ - ensures <0.006% gain error in closed-loop sensor conditioning circuits. |
| Reference Output | 3.00 V ±10 mV - factory-laser-trimmed buried Zener; stable to ±35 ppm/°C (C grade). |
| Power Dissipation | 60 mW typical - enables low-thermal-drift operation in sealed avionics modules. |
| Operating Temp | −55°C to +125°C - qualified per MIL-PRF-38535 Class M; suitable for missile seeker electronics. |
Pinout & Package
5962-9317901MLA is supplied in a 24-pin, 0.3 inch-wide hermetic dual-in-line package (DIP), compliant with MIL-STD-1835. Pin layout matches standard AD7870 footprint for drop-in replacement in legacy flight hardware.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 RD | Read strobe input | Active-low control enabling DB0–DB11 outputs; synchronizes data capture with microprocessor bus cycle. |
| 2 BUSY/INT | Status output | Active-low open-drain signal indicating conversion in progress or completion interrupt. |
| 3 CLK | Clock select | Tied to VSS enables internal laser-trimmed oscillator; accepts external 2.5 MHz TTL clock otherwise. |
| 4 DB11/HBEN | MSB output / byte enable | Configurable: DB11 in 12-bit mode; HBEN control for high-byte selection in byte interface mode. |
| 24 CS | Chip select | Active-low enable; initiates conversion when CONVST is tied low (standalone mode). |
| 23 CONVST | Convert start | Rising-edge-triggered asynchronous command to latch analog input and begin conversion. |
| 22 12/8/CLK | Interface mode select | +5 V = 12-bit parallel only; 0 V/−5 V = byte or serial output with gated/continuous SCLK. |
| 21 VSS | Negative supply | −5 V ±5%; powers analog core including track-and-hold and reference circuitry. |
| 20 VIN | Analog input | ±3 V differential input range; 15 kΩ input impedance; optimized for anti-alias filtering before sampling. |
| 19 REF OUT | Reference output | 3.00 V ±10 mV; capable of sourcing 500 μA; requires ≤50 pF capacitive load for stability. |
| 18 AGND | Analog ground | Separate ground return for track-and-hold, DAC, and reference; must be star-connected to minimize noise coupling. |
| 17 VDD | Positive supply | +5 V ±5%; powers digital logic and interface drivers; decoupled with 0.1 μF ceramic + 10 μF tantalum. |
| 12 DGND | Digital ground | Isolated ground plane for DBx outputs and control inputs; connected to AGND at single point only. |
Key Features
| Feature | Design Value |
|---|---|
| Complete monolithic ADC | Integrates SAR core, track-and-hold, reference, clock, and parallel/serial interface - eliminates 12+ external components. |
| Laser-trimmed internal clock | Guarantees 6.5–9 μs conversion time without external timing parts; reduces board area and EMI susceptibility. |
| Three interface modes | Supports 12-bit parallel, two-byte, or serial output - enables compatibility with 8-bit microcontrollers, DSPs, and FPGAs. |
| 72 dB SNR at 10 kHz | Enables 11.6 effective bits for IF sampling in L-band radar receivers requiring >60 dB spurious-free dynamic range. |
| MIL-PRF-38535 Class M | Qualified for high-reliability applications: burn-in, hermeticity testing, radiation hardness assurance, lot traceability. |
Applications
| Avionics Data Acquisition | Missile Seeker Signal Conditioning |
|---|---|
|
Use Scenario: Digitizing conditioned analog outputs from inertial measurement units (IMUs) and air data computers in fighter jet flight control systems. IC Role / Device Role / Timing Role: Primary 12-bit ADC capturing synchronized multi-channel sensor data at 100 kHz with deterministic latency. Use Value: ±1/4 LSB INL and 72 dB SNR ensure sub-arcsecond attitude resolution under vibration and thermal cycling. |
Use Scenario: Converting Doppler-shifted IF signals from active radar seekers operating in pulsed-CW mode. IC Role / Device Role / Timing Role: High-fidelity analog front-end digitizer interfacing directly to mixer outputs prior to digital pulse compression. Use Value: 2 μs track-and-hold acquisition preserves phase coherence of 10–50 kHz IF waveforms critical for target discrimination. |
| Electronic Warfare Receivers | Tactical Radios with SDR Front-End |
|
Use Scenario: Sampling wideband IF signals in channelized receiver architectures deployed in airborne EW pods. IC Role / Device Role / Timing Role: Precision ADC in calibrated channelizer banks performing real-time spectral analysis across 20–180 MHz bandwidth. Use Value: Guaranteed 57 ns data access time and 8 μs conversion enable tight timing alignment across 16-channel parallel digitization. |
Use Scenario: Digitizing baseband I/Q signals in software-defined radios requiring MIL-STD-188-181A compliance. IC Role / Device Role / Timing Role: Dual-channel ADC subsystem (two 5962-9317901MLA devices) supporting simultaneous transmit/receive paths. Use Value: Hermetic DIP packaging and −55°C to +125°C operation ensure reliability in uncooled vehicular radio enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit precision ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7870TQ | Same die, plastic DIP package; not hermetically sealed; rated −55°C to +125°C but lacks MIL-PRF-38535 qualification. | Suitable for non-mission-critical industrial test equipment where cost and lead time outweigh hermeticity requirements. | Select only if radiation tolerance, long-term hermetic reliability, and lot traceability are not required. |
| ADS8320UB | 16-bit, 100 kSPS, SPI-only interface; no internal reference or track-and-hold; requires external ±5 V supplies and external clock. | Used in modern low-power SDR platforms where higher resolution justifies added BOM complexity and layout effort. | Choose when 16-bit resolution is mandatory and system-level calibration can compensate for missing on-chip functions. |
Compared with AD7870TQ and ADS8320UB, the 5962-9317901MLA uniquely combines military qualification, hermetic packaging, integrated reference+T/H+clock, and flexible interface - making it irreplaceable in fielded avionics where component pedigree and zero-layout-change upgrades are mandated.
Availability
5962-9317901MLA is available at Aetrix Electronics and suitable for avionics data acquisition, missile seeker electronics, electronic warfare receivers, and tactical SDR front-ends requiring stable component supply across extended lifecycle programs.
Supply support for 5962-9317901MLA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving aerospace, defense, industrial, and communications markets since 1965.
The 5962-9317901MLA belongs to the AD7870 family of military-grade complete ADCs designed specifically for high-reliability data acquisition in extreme environments - emphasizing dc accuracy, dynamic performance, and seamless microprocessor integration.
FAQ
What is the full military specification compliance status of the 5962-9317901MLA?
The 5962-9317901MLA is fully compliant with MIL-PRF-38535 Class M, including screening per Appendix A (burn-in, thermal shock, hermeticity, radiation hardness assurance), lot traceability, and qualification to −55°C to +125°C. It carries the QML-V certification mark and is listed on the Defense Logistics Agency Qualified Products List (QPL) for AD7870-based converters.
Does the 5962-9317901MLA require external passive components for basic operation?
No. The 5962-9317901MLA operates as a complete ADC with only power supply decoupling capacitors required: 0.1 μF ceramic and 10 μF tantalum on VDD/VSS, plus 50 pF max on REF OUT. No external clock, reference, track-and-hold, or DAC components are needed - all are monolithically integrated.
Can the 5962-9317901MLA interface directly with a 3.3 V microcontroller?
No. The 5962-9317901MLA digital I/O operates at TTL levels referenced to VDD (+5 V) and VSS (−5 V); its outputs swing from 0.4 V to 4.0 V and inputs require 0.8 V/2.4 V thresholds. Direct connection to 3.3 V logic requires level-shifting buffers such as the ADG324x series to prevent damage and ensure timing compliance.
What is the maximum analog input frequency supported by the 5962-9317901MLA at full 12-bit accuracy?
The 5962-9317901MLA maintains 12-bit accuracy up to 50 kHz full-power input signals, as confirmed by dynamic specifications including THD and SNR tested at 10 kHz and extrapolated per design validation. Its track-and-hold 0.1 dB bandwidth is typically 500 kHz, ensuring minimal aperture jitter-induced error below Nyquist.
How is offset and full-scale error adjusted on the 5962-9317901MLA?
The 5962-9317901MLA does not provide dedicated trim pins. Offset and full-scale errors are factory-laser-trimmed during production and specified as ±5 LSB max at temperature extremes. System-level calibration is performed externally using known reference voltages applied to VIN and post-processing correction in firmware.
5962-9317901MLA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- -
- Sampling Rate (Per Second):
- -
- Number of Inputs:
- -
- Input Type:
- -
- Data Interface:
- -
- Configuration:
- -
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- -
- Architecture:
- -
- Reference Type:
- -
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Features:
- -
- Operating Temperature:
- -
- Supplier Device Package:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
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5962-9317901MLA FAQ
1.How can I place an order for 5962-9317901MLA through Aetrix?
Please submit a Request for Quotation (RFQ) for 5962-9317901MLA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of 5962-9317901MLA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 5962-9317901MLA is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 5962-9317901MLA?
For technical support, including 5962-9317901MLA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 5962-9317901MLA requirements.
6.How does Aetrix verify that 5962-9317901MLA is sourced from the original manufacturer or authorized distributors?
All 5962-9317901MLA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 5962-9317901MLA meets industry standards.
7.What is the process for return or replacement of 5962-9317901MLA?
All 5962-9317901MLA units undergo pre-shipment inspection (PSI). If there is an issue with 5962-9317901MLA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 5962-9317901MLA part is unused and in its original packaging.
Return procedure for 5962-9317901MLA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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