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Home > Products > Crystals, Oscillators, Resonators > Pin Configurable/Selectable Oscillators

Skyworks Solutions Inc. 596FE000260DGR

Name: 596FE000260DGR
Brand: Skyworks Solutions Inc.
SKU: 596FE000260DGR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 596FE000260DGR

Manufacturer:: Skyworks Solutions Inc.

Category:: Pin Configurable/Selectable Oscillators

Package:: 6-SMD, No Lead

Datasheet:: 596FE000260DGR.pdf

Description:: XTAL OSC VCXO 2.5V 6SMD

Quantity:: RFQ Add To RFQ list

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Product details

Overview

596FE000260DGR from Skyworks Solutions is a dual-frequency voltage-controlled crystal oscillator (VCXO) with factory-programmed output frequencies of 10 MHz and 260 MHz, 3.3 V supply, LVPECL output, ±20 ppm temperature stability, and 5×7 mm SMD package. It delivers low-jitter clock synthesis via DSPLL® for FPGA/ASIC timing and SDI video systems.

For engineers reviewing the 596FE000260DGR datasheet, 596FE000260DGR pinout, 596FE000260DGR application, or 596FE000260DGR equivalent, this page provides verified technical context, pin-level design meaning, dual-frequency switching behavior, jitter performance at 260 MHz, and RoHS-compliant supply chain support.

Technical Context

The 596FE000260DGR implements Skyworks' 3rd-generation DSPLL® architecture to synthesize two precise output frequencies-10 MHz and 260 MHz-from a single fixed-crystal reference. Its analog VC input (pin 1) enables fine-tuning with a selectable KV of 185 ppm/V (typ), supporting APR up to ±160 ppm at 3.3 V.

Frequency selection is controlled by the FS pin (pin 2), which toggles between the two factory-configured outputs; an internal 17 kΩ pull-up ensures default selection of the second frequency (260 MHz) when left floating. The device operates across –40 to +85 °C and supports LVPECL differential outputs with 1.1–1.9 VPP swing into 50 Ω to VDD – 2.0 V.

Key Specifications

Parameter	Value and Actual Design Meaning
Nominal Frequencies	10 MHz (FS = 0) and 260 MHz (FS = 1); enables dual-clock domain support without external PLL reconfiguration
Output Format	LVPECL: differential 1.1–1.9 VPP swing into 50 Ω load referenced to VDD – 2.0 V; requires termination for signal integrity
Supply Voltage	3.3 V (±10%): powers DSPLL core and output buffers; compatible with standard logic rails and low-noise LDOs
Tuning Slope (KV)	185 ppm/V (typ): defines control voltage sensitivity; enables ±160 ppm APR at 3.3 V for robust lock range in jitter cleanup applications
Phase Jitter (RMS)	0.5 ps (12 kHz–20 MHz): measured at 260 MHz LVPECL output; meets SONET OC-48 and 3G-SDI timing requirements
Package	5 × 7 mm, 6-pin SMD: industry-standard footprint with thermal resistance θJA = 84.6 °C/W; supports automated placement and reflow
Operating Range	–40 to +85 °C: validated for industrial and broadcast equipment environments; no derating required within spec

Pinout & Package

596FE000260DGR uses a 6-pin, 5×7 mm surface-mount ceramic package with exposed pad (non-electrical). Pin 1 is marked by a dot on top surface; orientation follows standard top-view layout.

Pin/Terminal	Circuit Role	Design Meaning
1 - VC	Analog control input	Accepts 0–VDD tuning voltage; 500 kΩ input impedance and 50 pF capacitance require low-impedance driver for stable KV response
2 - FS	Digital frequency select	Logic high selects 260 MHz output; internal 17 kΩ pull-up to VDD ensures default 260 MHz on power-up if unconnected
3 - GND	Electrical and case ground	Must be connected to low-impedance system ground plane; serves as return path for all analog/digital currents
4 - CLK+	Differential output (positive)	LVPECL-compatible; requires 50 Ω termination to VDD – 2.0 V; drives high-speed serial interfaces directly
5 - CLK–	Differential output (negative)	Complementary to CLK+; unused in CMOS mode but must remain unconnected (N/C) for LVPECL operation
6 - VDD	Power supply input	3.3 V nominal; decoupling with 100 nF ceramic + 10 µF tantalum near pin reduces supply noise coupling into DSPLL

Key Features

Feature	Design Value
Dual-frequency programmability	Two factory-set frequencies (10/260 MHz) enable seamless clock domain switching in multi-rate systems without firmware update
DSPLL® jitter suppression	0.5 ps RMS phase jitter at 260 MHz allows direct use in 3G-SDI serializers and FPGA transceivers without external clean-up PLL
Fixed-crystal reliability	Internal fundamental-mode crystal eliminates aging drift and frequency tolerance stack-up seen in traditional VCXOs
Supply noise rejection	DSPLL architecture attenuates VDD ripple >40 dB above 100 kHz, enabling use in noisy switcher-powered boards
RoHS-compliant packaging	Lead-free 5×7 mm ceramic package meets IPC/JEDEC reflow standards; compatible with Pb-free assembly processes

Applications

10 MHz / 260 MHz Dual-Clock FPGA Systems	3G-SDI Video Clocking
Use Scenario: FPGA-based video processing platform requiring separate 10 MHz reference for configuration and 260 MHz pixel clock for HDMI output. IC Role / Device Role / Timing Role: Single-component dual-frequency VCXO providing both clocks with sub-1 ps jitter correlation. Use Value: Eliminates need for two discrete oscillators and associated layout area; maintains tight inter-clock skew (<50 ps) critical for DDR video buffer timing.	Use Scenario: Broadcast-grade 3G-SDI transmitter board needing ultra-low-jitter 260 MHz clock for SMPTE ST 424 compliance. IC Role / Device Role / Timing Role: Primary clock source for serializer IC; FS pin toggled during format change (HD/SD). Use Value: 0.5 ps RMS jitter meets SMPTE ST 259/424 mask requirements; LVPECL output drives backplane traces directly.
SONET OC-48 Clock Recovery	FTTx PON Line Card Timing
Use Scenario: Optical line terminal (OLT) recovering 2488.32 MHz line rate from incoming OC-48 signal using a divide-by-9.57 PLL. IC Role / Device Role / Timing Role: Low-noise 260 MHz VCXO serving as clean reference for jitter-cleaning PLL loop filter. Use Value: 185 ppm/V KV and ±160 ppm APR allow full capture range over temperature and aging; DSPLL rejects upstream data-dependent jitter.	Use Scenario: GPON OLT line card requiring synchronized 10 MHz and 260 MHz clocks for burst-mode receiver calibration and downstream framing. IC Role / Device Role / Timing Role: Dual-output timing source enabling simultaneous calibration and transmission timing without cross-talk. Use Value: Single-device solution reduces BOM count and PCB space vs. dual XO + mux; –40 to +85 °C rating supports outdoor cabinet deployment.

10 MHz / 260 MHz Dual-Clock FPGA Systems

3G-SDI Video Clocking

Use Scenario: FPGA-based video processing platform requiring separate 10 MHz reference for configuration and 260 MHz pixel clock for HDMI output.

IC Role / Device Role / Timing Role: Single-component dual-frequency VCXO providing both clocks with sub-1 ps jitter correlation.

Use Value: Eliminates need for two discrete oscillators and associated layout area; maintains tight inter-clock skew (<50 ps) critical for DDR video buffer timing.

Use Scenario: Broadcast-grade 3G-SDI transmitter board needing ultra-low-jitter 260 MHz clock for SMPTE ST 424 compliance.

IC Role / Device Role / Timing Role: Primary clock source for serializer IC; FS pin toggled during format change (HD/SD).

Use Value: 0.5 ps RMS jitter meets SMPTE ST 259/424 mask requirements; LVPECL output drives backplane traces directly.

SONET OC-48 Clock Recovery

FTTx PON Line Card Timing

Use Scenario: Optical line terminal (OLT) recovering 2488.32 MHz line rate from incoming OC-48 signal using a divide-by-9.57 PLL.

IC Role / Device Role / Timing Role: Low-noise 260 MHz VCXO serving as clean reference for jitter-cleaning PLL loop filter.

Use Value: 185 ppm/V KV and ±160 ppm APR allow full capture range over temperature and aging; DSPLL rejects upstream data-dependent jitter.

Use Scenario: GPON OLT line card requiring synchronized 10 MHz and 260 MHz clocks for burst-mode receiver calibration and downstream framing.

IC Role / Device Role / Timing Role: Dual-output timing source enabling simultaneous calibration and transmission timing without cross-talk.

Use Value: Single-device solution reduces BOM count and PCB space vs. dual XO + mux; –40 to +85 °C rating supports outdoor cabinet deployment.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-frequency VCXO applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si596FE000100DGR	Same family, identical 5×7 mm package and 3.3 V/LVPECL config, but factory-programmed for 10 MHz / 100 MHz outputs	Lower second frequency limits suitability for 3G-SDI or OC-48; insufficient for 260 MHz serializer clocking	Select only when 100 MHz dual-rate suffices and 260 MHz is not required
Si596FE000260DGK	Identical frequency set (10/260 MHz) and electrical specs, but in 3.2×5 mm package instead of 5×7 mm	Smaller footprint saves board area but increases thermal resistance (θJA = 31.1 °C/W vs. 84.6 °C/W); may require thermal relief in high-power density designs	Choose for space-constrained applications where thermal headroom permits

Compared with 596FE000260DGR, Si596FE000100DGR offers lower-frequency flexibility at same cost and size, while Si596FE000260DGK trades thermal performance for compactness-neither is pin-compatible due to differing land patterns, requiring PCB revision for substitution.

Availability

596FE000260DGR is available at Aetrix Electronics and suitable for FPGA clocking, 3G-SDI video systems, and SONET OC-48 timing applications requiring stable component supply, long-lifecycle assurance, and RoHS-compliant sourcing.

Supply support for 596FE000260DGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si596 product line delivers programmable dual-frequency VCXOs for high-reliability timing in networking, broadcast video, and optical infrastructure-designed to replace legacy crystal-based oscillators with superior jitter, stability, and configurability.

FAQ

What are the exact factory-programmed frequencies for 596FE000260DGR?

The 596FE000260DGR is factory-configured for two precise output frequencies: 10.000000 MHz (selected when FS = 0) and 260.000000 MHz (selected when FS = 1). These values are laser-trimmed and permanently stored; no field reprogramming is supported. Both frequencies meet ±20 ppm initial accuracy and maintain stability across –40 to +85 °C.

Does 596FE000260DGR support CMOS output mode?

No, 596FE000260DGR does not support CMOS output. Its ordering code "E" specifies LVPECL output format, confirmed by the "E" in position 5 of the part number per Skyworks' configuration chart. CMOS is only available on variants with option codes C, G, or J-and limited to ≤160 MHz, making it incompatible with the 260 MHz output requirement of 596FE000260DGR.

What is the absolute pull range (APR) of 596FE000260DGR at 3.3 V supply?

The 596FE000260DGR has an absolute pull range (APR) of ±160 ppm at 3.3 V supply, derived from its 185 ppm/V tuning slope and nominal 0–3.3 V VC range (±160 ppm = 0.5 × 3.3 V × 185 ppm/V). This APR supports full lock acquisition over 15-year aging, temperature drift, and supply variation in SONET and FTTx applications.

How does the FS pin behave when left unconnected on 596FE000260DGR?

When the FS pin (pin 2) of 596FE000260DGR is left unconnected, its internal 17 kΩ pull-up resistor to VDD forces FS = 1, selecting the higher factory-programmed frequency-260 MHz. This default behavior ensures predictable startup without external biasing, simplifying system reset sequencing and reducing component count.

Is 596FE000260DGR compatible with standard 5×7 mm oscillator footprints?

Yes, 596FE000260DGR uses the industry-standard 5×7 mm, 6-pin SMD footprint defined in Skyworks' Package Outline Diagram (Figure 2) and PCB Land Pattern (Figure 3). Its pad dimensions (e.g., C1 = 4.20 mm, E = 2.54 mm) match IPC-7351 guidelines, ensuring compatibility with existing 5×7 mm oscillator layouts and automated assembly tooling.

596FE000260DGR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si596

Package/Case:: 6-SMD, No Lead

Packaging:: Tape & Reel (TR)

Product Status:: Active

Base Resonator:: Crystal

Type:: VCXO

Frequency - Output 1:: 148.35165MHz

Frequency - Output 2:: 148.5MHz

Frequency - Output 3:: -

Frequency - Output 4:: -

Function:: -

Output:: LVDS

Voltage - Supply:: 2.5V

Frequency Stability:: ±20ppm

Operating Temperature:: -40°C ~ 85°C

Current - Supply (Max):: 110mA

Ratings:: -

Size / Dimension:: 0.276" L x 0.197" W (7.00mm x 5.00mm)

Height:: 0.071" (1.80mm)

Supplier Device Package:: -

596FE000260DGR FAQ

1.How can I place an order for 596FE000260DGR through Aetrix?

Please submit a Request for Quotation (RFQ) for 596FE000260DGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 596FE000260DGR reliable?

The price and inventory of 596FE000260DGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 596FE000260DGR is usually 5 days.

3.What payment methods are accepted for 596FE000260DGR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 596FE000260DGR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 596FE000260DGR?

596FE000260DGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 596FE000260DGR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 596FE000260DGR?

For technical support, including 596FE000260DGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 596FE000260DGR requirements.

6.How does Aetrix verify that 596FE000260DGR is sourced from the original manufacturer or authorized distributors?

All 596FE000260DGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 596FE000260DGR meets industry standards.

7.What is the process for return or replacement of 596FE000260DGR?

All 596FE000260DGR units undergo pre-shipment inspection (PSI). If there is an issue with 596FE000260DGR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 596FE000260DGR part is unused and in its original packaging.

Return procedure for 596FE000260DGR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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