Renesas 5P35023B-000NLGI8

Overview

5P35023B-000NLGI8 from Renesas Electronics is a VersaClock® programmable clock generator with three independent PLLs, supporting up to six configurable frequency outputs. It delivers PCIe Gen3-compliant phase jitter (<1.5 ps rms, 12 kHz–20 MHz), LVCMOS/LVDS/LVPECL/LP-HCSL differential and single-ended outputs (1 MHz–500 MHz), and ultra-low-power 32.768 kHz RTC clocking (<2 µA). It serves as a high-integration timing solution for PCIe Gen1–3 host systems and consumer computing platforms.

For engineers reviewing the 5P35023B-000NLGI8 datasheet, 5P35023B-000NLGI8 pinout, 5P35023B-000NLGI8 application, or 5P35023B-000NLGI8 equivalent, this device offers I2C-programmable configuration, OTP-stored settings, Proactive Power Saving (PPS), Dynamic Frequency Control (DFC), and dual-spread-spectrum support - critical for EMI reduction in high-speed digital systems.

Technical Context

The 5P35023B-000NLGI8 implements a triple-PLL architecture where PLL1 drives REF and DIFF1, PLL2 supports DFC and feeds DIFF1/DIFF2/SE outputs via DIV3/DIV4, and PLL3 supplies SE1–SE3 through DIV5. Each PLL features independently programmable VCOs, divider ratios, and bandwidth control to minimize jitter peaking.

It integrates Proactive Power Saving (PPS) logic that detects system power-down states and automatically switches selected outputs to a <2 µA 32.768 kHz DCO mode, while retaining crystal calibration. The VCO Overshoot Reduction Technology (ORT) ensures monotonic frequency transitions during DFC events, preventing output spikes during on-the-fly reconfiguration.

Key Specifications

Pinout & Package

5P35023B-000NLGI8 is housed in a 4 mm × 4 mm, 24-pin Very Thin Quad Flat No-Lead (VFQFPN) package with exposed thermal pad (EPAD). Pin assignments are fixed per Renesas datasheet Figure 1 and Table 1; all pins are electrically validated and functionally mapped below.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable clock generator applications.

Compared with Si5351A-B-GM and ICS843002AGI-01LFT, the 5P35023B-000NLGI8 uniquely combines PCIe Gen3 jitter performance, triple-PLL flexibility, hardware DFC, PPS-enabled RTC autonomy, and AEC-Q100 qualification - making it the sole option for next-gen automotive and high-performance computing timing.

Availability

5P35023B-000NLGI8 is available at Aetrix Electronics and suitable for PCIe Gen3 host controllers, automotive infotainment systems, and industrial edge AI gateways requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant timing solutions.

Supply support for 5P35023B-000NLGI8 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and timing solutions for automotive, industrial, and enterprise markets.

The 5P35023B-000NLGI8 belongs to Renesas' VersaClock® family - engineered specifically for low-jitter, multi-output, programmable clock generation in high-speed serial interface applications including PCIe, SATA, USB, and Ethernet.

FAQ

What is the maximum output frequency supported by 5P35023B-000NLGI8 in LVCMOS mode?

The 5P35023B-000NLGI8 supports up to 160 MHz on its three LVCMOS outputs (SE1–SE3). This limit applies regardless of VDDSEx supply voltage (1.8 V–3.3 V) and is defined by internal buffer drive strength and signal integrity constraints per Renesas datasheet Section "Output Features".

Does 5P35023B-000NLGI8 support PCIe Gen4 timing specifications?

No, the 5P35023B-000NLGI8 is specified and tested for PCIe Gen3 compliance only, with phase jitter ≤1.5 ps rms (12 kHz–20 MHz). It does not meet the stricter ≤1.0 ps rms requirement for PCIe Gen4; Renesas offers later-generation VersaClock devices (e.g., 5P49V5901) for Gen4 applications.

How is the 32.768 kHz RTC clock powered when main supply is absent?

When VDD33 falls below 2.3 V, the 5P35023B-000NLGI8 automatically switches the 32.768 kHz DCO power source from VDD33 to VBAT (3.0–3.3 V coin cell), sustaining RTC operation at <2 µA. The switch occurs seamlessly without interrupting output continuity.

Can all six outputs of 5P35023B-000NLGI8 be configured simultaneously?

Yes - the 5P35023B-000NLGI8 supports concurrent operation of REF, SE1–SE3, and both DIFF pairs (DIFF1/DIFF1B and DIFF2/DIFF2B), totaling eight possible LVCMOS-equivalent outputs. Output enable is individually controlled via OE1–OE3 and internal registers, allowing flexible activation per system state.

Is OTP programming of 5P35023B-000NLGI8 performed at factory or in-system?

OTP programming for 5P35023B-000NLGI8 is performed in-system using I2C commands per Renesas Application Note AN-841. The device ships unprogrammed; users write configuration data (PLL settings, output formats, DFC tables) once via I2C, after which the OTP retains settings across power cycles without external memory.