Texas Instruments 6PAIC3104TRHBRQ1
- Part No.:
- 6PAIC3104TRHBRQ1
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
6PAIC3104TRHBRQ1.pdf
- Description:
- AUTOMOTIVE LOW-POWER STEREO AUDI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
6PAIC3104TRHBRQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive stereo audio codec with integrated 102-dBA DAC, 92-dBA ADC, six analog inputs (including differential microphone/line pairs), six output drivers (four high-power headphone + two differential line), and programmable AGC, EQ, and PLL - deployed in infotainment head units and digital instrument clusters for eCall and telematics.
For engineers reviewing the 6PAIC3104TRHBRQ1 datasheet, 6PAIC3104TRHBRQ1 pinout, 6PAIC3104TRHBRQ1 application, or 6PAIC3104TRHBRQ1 equivalent, this page delivers verified technical context, validated pin functions, confirmed automotive-grade power and SNR specs, and real-world implementation constraints for cluster audio subsystems.
Technical Context
The 6PAIC3104TRHBRQ1 implements delta-sigma modulation in both DAC (8–96 kHz) and ADC (8–96 kHz) paths, with independent programmable gain amplifiers (up to 59.5 dB) on all analog inputs and automatic gain control featuring tunable attack (8 ms–1.4 s) and decay (0.05–22.4 s). Its digital audio processor supports I2S, left/right-justified, DSP, and TDM serial formats via a configurable audio data bus.
Power architecture separates analog (AVDD/DRVDD: 2.7–3.6 V), digital core (DVDD: 1.525–1.95 V), and I/O (IOVDD: 1.1–3.6 V) domains, enabling ultralow-power analog passthrough mode where most circuitry powers down while maintaining signal path integrity - critical for eCall wake-on-voice scenarios.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC SNR | 102 dBA A-weighted - enables high-fidelity playback in noisy cabin environments without audible noise floor interference |
| ADC SNR | 92 dBA A-weighted - ensures clean voice capture from microphones during eCall activation under road noise |
| Sampling Rate Range | 8–96 kHz - supports legacy telephony (8 kHz), CD-quality (44.1 kHz), and high-res audio (96 kHz) in same hardware |
| Power Consumption | 14 mW stereo 48 kHz playback (3.3 V analog supply) - extends battery runtime in always-on cluster systems |
| Operating Temp Range | –40°C to +105°C ambient - meets AEC-Q100 Grade 2 for under-hood and dashboard mounting |
| ESD Rating | HBM ±2000 V, CDM ±1000 V - satisfies automotive ESD robustness requirements per AEC-Q100-002/-011 |
| Microphone Bias | Programmable 2.0 V / 2.5 V / DRVDD - allows direct interface with electret condenser microphones across vehicle variants |
Pinout & Package
VQFN-32 (5.0 mm × 5.0 mm) package with exposed thermal pad connected to DRVSS; 32-pin layout optimized for compact automotive PCB routing and thermal dissipation in infotainment modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MCLK (Pin 1) | Master clock input | Accepts 512 kHz–50 MHz crystal or oscillator reference for PLL-based audio rate synthesis |
| BCLK (Pin 2) | Bit clock I/O | Synchronizes audio data transfer on I2S/DSP/TDM bus; supports master or slave timing modes |
| WCLK (Pin 3) | Word clock I/O | Defines left/right channel framing; bidirectional for flexible host interface configuration |
| DIN (Pin 4) | Audio data input | Receives PCM or DSP-mode digital audio from MCU or DSP in stereo or TDM configurations |
| DOUT (Pin 5) | Audio data output | Transmits processed ADC data or DAC feedback; supports loopback diagnostics |
| HPLOUT / HPROUT (Pins 19, 23) | High-power headphone driver outputs (+) | Drive 16 Ω headphones directly in capless mode or AC-coupled to 4-channel SE loads |
| HPLCOM / HPRCOM (Pins 20, 22) | High-power headphone driver complements (–) | Enable fully differential headphone output or single-ended operation with internal common-mode bias |
| LEFT_LOP / RIGHT_LOP (Pins 27, 29) | Differential line output (+) | Deliver low-noise, high-SNR analog signals to external amplifier inputs (e.g., TPA3111D1-Q1) |
| LEFT_LOM / RIGHT_LOM (Pins 28, 30) | Differential line output (–) | Complete balanced line output pair; rejects common-mode noise in long cable runs |
| MIC1LP/MIC1RP (Pins 10, 12) | Differential microphone input (+) | Accepts balanced mic signals with >92 dB SNR; supports programmable PGA up to 59.5 dB gain |
| MIC1LM/MIC1RM (Pins 11, 13) | Differential microphone input (–) | Completes differential input pair; enables noise cancellation in dual-mic eCall beamforming |
| MICBIAS (Pin 15) | Microphone bias voltage output | Configurable 2.0 V / 2.5 V / DRVDD setting powers electret mics without external LDO |
| I2C SCL/SDA (Pins 8, 9) | Control bus interface | Enables register-level configuration of gain, EQ, AGC, clocking, and power states at system startup |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow-power analog passthrough mode | Reduces active current to 28 µA while maintaining headset detection and analog signal path - essential for eCall wake-on-voice latency <100 ms |
| Programmable AGC with extended timing range | Attack (8 ms–1.408 s) and decay (0.05–22.4 s) tuning enables adaptive voice capture in varying cabin noise profiles |
| Flexible audio serial interface | I2S, left/right-justified, DSP, and TDM support allows interoperability with TI C2000, NXP S32K, and Renesas RH850 MCUs without glue logic |
| Integrated digital audio effects engine | Real-time 3D enhancement, bass/treble boost, 5-band parametric EQ, and de-emphasis filters reduce need for external DSP |
| Extensive modular power control | Independent enable/disable of ADC, DAC, PLL, outputs, and bias blocks enables fine-grained power optimization per use case |
Applications
| Cluster Audio Interface | Infotainment Head Unit |
|---|---|
Use Scenario: Digital instrument cluster with voice-guided navigation and hands-free call prompts. IC Role / Device Role / Timing Role: Audio codec bridges MCU audio engine to analog speaker/headphone outputs and microphone inputs. Use Value: 102-dBA DAC SNR ensures clear voice prompts despite engine vibration; 92-dBA ADC captures driver commands even at highway speeds. | Use Scenario: Central infotainment unit supporting Bluetooth streaming, AM/FM radio, and rear-seat entertainment. IC Role / Device Role / Timing Role: Stereo audio hub managing multiple input sources (mic, BT, tuner) and output destinations (headphones, line-out to amp). Use Value: Six-input/four-output flexibility eliminates need for external multiplexers; 14 mW playback power reduces thermal load in sealed head unit enclosures. |
| eCall System Audio Path | Telematics Control Unit (TCU) |
Use Scenario: Automatic emergency call activation triggered by airbag deployment or crash sensor. IC Role / Device Role / Timing Role: Low-latency analog passthrough mode activates microphone and line outputs within 50 ms of trigger event. Use Value: Ultralow-power standby (28 µA) enables always-on readiness; programmable AGC adapts instantly to sudden cabin noise spikes during impact. | Use Scenario: Vehicle-to-cloud connectivity module handling voice commands, remote diagnostics, and OTA updates. IC Role / Device Role / Timing Role: Audio front-end for voice assistant integration, capturing commands and playing system alerts. Use Value: I2C-configurable EQ and noise filtering suppress HVAC and road noise; differential inputs reject EMI from cellular/LTE antennas mounted nearby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV320AIC3106-Q1 | 10-input / 7-output configuration; adds second stereo ADC path and extra line output | Supports dual-mic array + auxiliary line-in (e.g., rear-seat mic + USB audio) not available on 6PAIC3104TRHBRQ1 | Select when multi-source recording or redundant audio paths required; larger PCB footprint and higher power draw |
| PCM3168A-Q1 | 8-channel ADC/DAC; no integrated headphone drivers; requires external amplifier for speaker/headphone output | Targeted at high-channel-count systems (e.g., premium surround sound) rather than compact cluster/head unit designs | Choose for scalable multi-zone audio with external Class-D amps; lacks on-chip AGC, EQ, and mic bias of 6PAIC3104TRHBRQ1 |
Compared with TLV320AIC3106-Q1 and PCM3168A-Q1, the 6PAIC3104TRHBRQ1 delivers optimal integration density and power efficiency for cost-sensitive, space-constrained automotive clusters - balancing six-input flexibility, headphone drive capability, and AEC-Q100 compliance without over-engineering.
Availability
6PAIC3104TRHBRQ1 is available at Aetrix Electronics and suitable for automotive infotainment, digital instrument clusters, and telematics control units requiring stable component supply, AEC-Q100 qualification, and long-term production continuity.
Supply support for 6PAIC3104TRHBRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of expertise in high-reliability signal chain solutions.
The TLV320AIC3104-Q1 belongs to TI's automotive audio codec product line, engineered specifically for infotainment and cluster systems demanding low power, high SNR, and AEC-Q100 compliance in harsh automotive environments.
FAQ
What is the operating temperature range certified for the 6PAIC3104TRHBRQ1?
The 6PAIC3104TRHBRQ1 is qualified to AEC-Q100 Grade 2 with an ambient operating temperature range of –40°C to +105°C. This rating is verified per TI's production test flow and applies to the full functional specification - including DAC/ADC performance, AGC operation, and I2C register access - across the entire range without derating.
Does the 6PAIC3104TRHBRQ1 support differential microphone inputs?
Yes, the 6PAIC3104TRHBRQ1 supports two fully differential microphone input pairs: MIC1LP/MIC1LM and MIC1RP/MIC1RM (Pins 10/11 and 12/13). Each pair accepts balanced signals with 92-dBA SNR and programmable PGA gain up to 59.5 dB, enabling noise-canceling beamforming for eCall voice capture.
Can the 6PAIC3104TRHBRQ1 drive 16-Ω headphones directly without external capacitors?
Yes, the 6PAIC3104TRHBRQ1 supports capless (fully differential) headphone output configuration using HPLOUT/HPLCOM and HPROUT/HPRCOM pins. In this mode, it delivers up to 30 mW into 16-Ω loads with 94-dB SNR and <0.028% THD+N at 20 mW - eliminating DC-blocking capacitors and saving board space.
What audio serial interface modes does the 6PAIC3104TRHBRQ1 support?
The 6PAIC3104TRHBRQ1 supports I2S, left-justified, right-justified, and TDM audio serial data formats on its configurable audio bus. Mode selection is register-controlled via I2C, allowing dynamic reconfiguration between stereo and multi-channel use cases without hardware changes.
Is the 6PAIC3104TRHBRQ1 pin-compatible with other devices in the TLV320AIC31xx-Q1 family?
No, the 6PAIC3104TRHBRQ1 is not pin-compatible with TLV320AIC3106-Q1 or TLV320AIC3110-Q1. While all share the VQFN-32 package, pin assignments differ significantly - especially for input/output channels and bias functions - requiring unique PCB layouts for each variant.
6PAIC3104TRHBRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- DSP, I2C, I2S, Serial, TDM
- Resolution (Bits):
- 16 b, 20 b, 24 b, 32 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- 92 / 102 (Differential), 92 / 97 (Single-Ended)
- Dynamic Range, ADCs / DACs (db) Typ:
- 93 / 97
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 1.525V ~ 1.95V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (5x5)
6PAIC3104TRHBRQ1 FAQ
1.How can I place an order for 6PAIC3104TRHBRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for 6PAIC3104TRHBRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 6PAIC3104TRHBRQ1 reliable?
The price and inventory of 6PAIC3104TRHBRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 6PAIC3104TRHBRQ1 is usually 5 days.
3.What payment methods are accepted for 6PAIC3104TRHBRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 6PAIC3104TRHBRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 6PAIC3104TRHBRQ1?
6PAIC3104TRHBRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 6PAIC3104TRHBRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 6PAIC3104TRHBRQ1?
For technical support, including 6PAIC3104TRHBRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 6PAIC3104TRHBRQ1 requirements.
6.How does Aetrix verify that 6PAIC3104TRHBRQ1 is sourced from the original manufacturer or authorized distributors?
All 6PAIC3104TRHBRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 6PAIC3104TRHBRQ1 meets industry standards.
7.What is the process for return or replacement of 6PAIC3104TRHBRQ1?
All 6PAIC3104TRHBRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with 6PAIC3104TRHBRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 6PAIC3104TRHBRQ1 part is unused and in its original packaging.
Return procedure for 6PAIC3104TRHBRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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