Analog Devices Inc./Maxim Integrated 73M1822-IMR/F

Overview

The 73M1822-IMR/F from Teridian Semiconductor is a single-package silicon Data Access Arrangement (DAA) IC for PSTN-connected soft modems and voice applications. It integrates codec, line interface, isolation barrier control, and MAFE serial interface functions; supports V.92 (56 Kbps), 7.2–16 kHz configurable sampling, 3.3 V operation, and meets FCC/ETSI ES 203 021-2/JATE compliance in an 8×8 mm 42-pin QFN package.

For engineers reviewing the 73M1822-IMR/F datasheet, 73M1822-IMR/F pinout, 73M1822-IMR/F application, or 73M1822-IMR/F equivalent, this page delivers verified electrical specs, isolation performance, DAA termination behavior, MAFE interface timing, and real-world use cases in fax peripherals, point-of-sale terminals, and industrial telemetry systems.

Technical Context

The 73M1822-IMR/F implements a fully integrated analog front end with on-chip polarity reversal detection, ring detection, tip/ring voltage/current monitoring, and programmable DC mask regulation (up to 8 mA minimum line current). Its MAFE serial interface operates in Master, Slave, or Daisy Chain mode with frame-synchronized data transfer at sample rates from 7.2 kHz to 16 kHz.

It embeds a 16-bit codec, billing tone notch filter, call progress monitor, GPIO-configurable I/O, and supports barrier-powered operation via pulse transformer (4–5 kV isolation). The device uses internal PLL clock synthesis with crystal reference (9–27 MHz) and delivers THD of –80 dB at 0 dBm full-scale transmit/receive levels.

Key Specifications

Pinout & Package

Package: 8×8 mm, 42-pin QFN with exposed thermal pad (RoHS-compliant, lead-free).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DAA and modem analog front end applications.

Compared with the 73M1822-IMR/F, the Si3050-C-FM offers lower system-level integration but simpler layout, while the SLIC3710 demands more external components and firmware effort but delivers greater flexibility in high-reliability telephony infrastructure.

Availability

The 73M1822-IMR/F is available at Aetrix Electronics and suitable for V.92 modems, point-of-sale terminals, and industrial telemetry systems requiring stable component supply, long lifecycle support, and global regulatory compliance.

Supply support for 73M1822-IMR/F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Teridian Semiconductor was a fabless analog/mixed-signal IC company specializing in highly integrated communications interface solutions before its acquisition by Maxim Integrated in 2011.

The 73M1822-IMR/F belongs to Teridian's MicroDAA™ family-designed specifically to replace multi-chip DAA+codec+transformer designs with a single, globally compliant, low-power silicon solution for PSTN-connected soft modems.

FAQ

What is the isolation rating of the 73M1822-IMR/F and how is it implemented?

The 73M1822-IMR/F achieves 4–5 kV isolation using an external pulse transformer connected to its TIP/RING pins-not internal galvanic isolation. This barrier also enables barrier-powered operation for line-side circuitry. The device itself does not integrate transformer windings; compliance relies on proper transformer selection per Table 28 and Figure 32 in the datasheet. The 73M1822-IMR/F manages barrier synchronization and power transfer control digitally via its MAFE interface.

Does the 73M1822-IMR/F support Caller ID, and which types are implemented?

Yes, the 73M1822-IMR/F supports both Caller ID Type I and Type II per Bellcore TR-NWT-000030 and ETSI EN 300 659-1. It performs on-chip off-hook detection for Type II, decodes FSK-modulated data bursts, and provides GPIO-assisted signaling to the host processor. The 73M1822-IMR/F includes dedicated registers for CID message buffering and status flags, enabling robust implementation without external demodulation circuitry.

What clock sources does the 73M1822-IMR/F accept, and what is the valid frequency range?

The 73M1822-IMR/F accepts a fundamental-mode crystal connected between XTAL_IN and XTAL_OUT, with supported frequencies from 9 MHz to 27 MHz. It does not support external CMOS clock input. Internal PLL circuitry generates all required clocks-including MAFE interface timing and codec sampling clocks-from this reference. Valid configurations for 7.2 kHz to 16 kHz sampling are documented in Tables 32–36 of the datasheet, with register settings dependent on crystal frequency.

How does the 73M1822-IMR/F handle line impedance matching for different PTT standards?

The 73M1822-IMR/F implements configurable AC and DC termination via internal DACs and switched resistor networks controlled by registers per Table 40 and Section 11.7. It supports region-specific settings for FCC, ETSI ES 203 021-2, JATE, and NET4-including programmable DCIV curves and ACZ coefficients. These settings adjust loop current, impedance magnitude/phase, and hybrid balance without external component changes, enabling one hardware design to meet multiple regulatory domains.

Can the 73M1822-IMR/F operate in Daisy Chain configuration, and what are the constraints?

Yes, the 73M1822-IMR/F supports Daisy Chain mode via its MAFE interface-allowing one master device (e.g., DSP host or 73M1902) to control multiple 73M1822-IMR/F slaves using shared SCLK/FS lines and daisy-chained SDATA. Constraints include strict timing alignment (Figure 23–24), fixed frame length per device, and requirement for slave address configuration via GPIO or register write. Daisy chaining is limited to ≤3 devices in practice due to cumulative timing skew and signal integrity degradation.