Analog Devices Inc./Maxim Integrated 73S1215F-68IM/F/P
- Part No.:
- 73S1215F-68IM/F/P
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
73S1215F-68IM/F/P.pdf
- Description:
- IC MCU 8BIT 64KB FLASH 68QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The 73S1215F-68IM/F/P from Teridian Semiconductor is an 80515-based System-on-Chip for smart card reader systems, integrating ISO 7816/EMV 4.1, USB 2.0 Full-Speed (12 Mbps), and hardware-scanned 5×6 PINpad interfaces. It delivers up to 20 MIPS at 24 MHz CPU clock, with 64 KB Flash, 2 KB XRAM, and on-chip RTC powered by optional 32.768 kHz crystal - enabling CCID-compliant handheld or ExpressCard®-form-factor readers.
For engineers reviewing the 73S1215F-68IM/F/P datasheet, 73S1215F-68IM/F/P pinout, 73S1215F-68IM/F/P application, or 73S1215F-68IM/F/P equivalent, key selection criteria include EMV 4.1 compliance, dual-interface (USB + ISO 7816) coexistence, built-in LDO for smart card VCC (1.8/3.0/5.0 V), 6 kV ESD protection on interface pins, and in-system programmable Flash with security fuses.
Technical Context
The 73S1215F-68IM/F/P implements a single-chip solution where the 80515 core executes AES/DES/3-DES and RSA-based PIN encryption, supported by dedicated FIFOs (128 B Bulk IN/OUT for USB; 2-byte TX/RX for ISO 7816 UART). Its internal PLL derives all system clocks from a 6–12 MHz crystal, while optional 32.768 kHz oscillator feeds a hardware RTC counter with trimmable accuracy.
Smart card interface logic includes full activation/deactivation sequencers, auxiliary C4–C8 control lines, and integrated LDO regulation - eliminating external voltage translation. USB functionality is PC/SC-compliant with four endpoints (Control, Interrupt IN, Bulk IN, Bulk OUT), each with dedicated FIFO depth and automatic descriptor handling via firmware libraries.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | 80515-compatible, 1-cycle/instruction execution, 24 MHz max clock → 20 MIPS real-time throughput for cryptographic operations |
| Memory | 64 KB Flash (in-system programmable, lockable via on-silicon fuses), 2 KB XRAM, 256 B IRAM, plus dedicated ISO7816 & USB FIFOs |
| USB Interface | USB 2.0 Full-Speed (12 Mbps), PC/SC compliant, 4 endpoints with FIFOs: Control (16 B), Interrupt IN (32 B), Bulk IN/OUT (128 B each) |
| Smart Card Interface | Fully EMV 4.1–compliant ISO 7816 UART supporting T=0/T=1 protocols, integrated LDO for 1.8/3.0/5.0 V card supply, 6 kV ESD protection |
| PINpad Support | Hardware-scanned 5×6 matrix with debouncing, scrambling, and column/row drive - no external controller required |
| Operating Voltage | 2.7–3.6 V (3.0–3.6 V when USB active); smart card VCC independently regulated up to 5.5 V |
| Temperature Range | -40°C to +85°C industrial grade operation, validated across full voltage and frequency range |
Pinout & Package
68-pin QFN package (7 mm × 7 mm, 0.4 mm pitch), thermally enhanced with exposed thermal pad. Pinout optimized for simultaneous USB, ISO 7816, and keypad routing - including dedicated VBUS sense, D+/D−, VCCCARD, RST, CLK, I/O banks, and analog input (AN0).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Core power supply | 2.7–3.6 V main supply; must be decoupled locally for noise-sensitive USB and analog functions |
| VCCCARD | Smart card power output | Internally regulated 1.8/3.0/5.0 V LDO output; programmable per EMV spec, supports hot-plug detection |
| D+ / D- | USB differential data pair | Full-Speed USB 2.0 physical layer; requires 27 Ω series resistors and proper PCB impedance control (90 Ω diff) |
| KR0–KR4 | Keypad row drivers | Open-drain outputs with internal pull-down; drive 5-row side of 5×6 matrix; support scanning and scrambling |
| KC0–KC5 | Keypad column inputs | Input-only with internal pull-up; detect key closures during row scanning; include hardware debounce |
| AN0 | Analog voltage input | Single-ended 1.0–1.5 V detection range only; used for battery level monitoring - not general-purpose ADC |
| VBUS | USB host power presence | Direct sensing of USB VBUS (4.4–5.25 V); enables automatic USB enumeration and power mode switching |
Key Features
| Feature | Design Value |
|---|---|
| EMV 4.1–compliant smart card interface | Integrated activation/deactivation sequencers, C4–C8 auxiliary signals, and T=0/T=1 protocol engine eliminate need for external SAM or interface IC |
| CCID-compliant USB stack | Pre-certified USB firmware layers (WHQL/PC/SC) reduce time-to-certification for banking and government ID applications |
| Hardware PINpad controller | 5×6 matrix scanning, key debouncing, and data scrambling performed on-die - prevents side-channel leakage of PIN entry |
| On-chip RTC with 32.768 kHz option | Independent 32-bit counter + 24-bit accumulator + trim register enables accurate timestamping without external RTC IC |
| Security-programmable Flash | Lockable via on-silicon fuses to prevent read-out of firmware, keys, or proprietary algorithms - meets secure bootloader requirements |
Applications
| Banking PINpad Terminals | ExpressCard® Smart Card Readers |
|---|---|
Use Scenario: Portable, battery-powered handheld devices used for EMV-compliant card transactions at point-of-sale or field service locations. IC Role / Device Role / Timing Role: Central SoC managing PIN entry, card communication, USB host handshake, and encrypted session key generation. Use Value: Single-chip integration eliminates discrete USB transceiver, smart card interface IC, and microcontroller - reducing BOM cost and PCB area by >40%. | Use Scenario: Laptop-insertable ExpressCard® modules providing plug-and-play smart card authentication for enterprise login or digital signature. IC Role / Device Role / Timing Role: USB device controller with embedded CCID class driver, ISO 7816 UART, and secure key storage for credential validation. Use Value: Pre-validated USB/EMV firmware accelerates Windows driver certification and ensures interoperability with Microsoft Smart Card Base Provider. |
| E-Government ID Readers | Secure Remote Access Dongles |
Use Scenario: Desktop readers for national e-ID cards requiring mutual authentication, biometric pairing, and offline certificate validation. IC Role / Device Role / Timing Role: Trusted execution environment hosting PKI stack, PIN verification, and secure channel establishment with card and host. Use Value: On-chip Flash security fuses protect private keys and prevent firmware tampering - satisfying Common Criteria EAL4+ evaluation prerequisites. | Use Scenario: USB-connected hardware tokens used for two-factor authentication in financial or cloud infrastructure environments. IC Role / Device Role / Timing Role: Secure element companion SoC handling card I/O, PIN processing, and encrypted challenge-response over USB. Use Value: Integrated 6 kV ESD protection on ISO 7816 pins ensures robustness against electrostatic discharge in high-touch consumer deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar smart card reader SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon SLE78CLXXF-xxQK | ARM Cortex-M0+ core, 128 KB Flash, supports ISO 7816 + USB + SDIO; lacks integrated PINpad controller and RTC | Targets higher-security government ID programs requiring ARM TrustZone; requires external keypad controller and RTC | Select when migrating to ARM ecosystem or needing SDIO for contactless extension - not drop-in replacement |
| NXP SLN10RSxx-xxx | ARM Cortex-M33 core, 512 KB Flash, includes secure boot and crypto accelerators; USB + ISO 7816 but no native keypad interface | Designed for high-assurance remote signing and PKI token applications; supports BLE but no PINpad hardware acceleration | Choose for future-proofing with PSA Certified Level 3 security - adds complexity and cost vs. 73S1215F-68IM/F/P's integrated simplicity |
Compared with Infineon SLE78CLXXF-xxQK and NXP SLN10RSxx-xxx, the 73S1215F-68IM/F/P offers lowest BOM cost and fastest time-to-market for USB-connected PINpad readers due to its fully integrated keypad, EMV-certified firmware, and single-crystal clock architecture - avoiding external timing components and interface glue logic.
Availability
The 73S1215F-68IM/F/P is available at Aetrix Electronics and suitable for banking PINpad terminals, ExpressCard® smart card readers, and e-government ID readers requiring stable component supply, long-lifecycle support, and traceable sourcing.
Supply support for 73S1215F-68IM/F/P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Teridian Semiconductor was a fabless analog/mixed-signal IC company specializing in metering, powerline communications, and secure transaction SoCs before its acquisition by Maxim Integrated in 2010.
The 73S12xxF product line was engineered specifically for cost-sensitive, high-volume smart card reader applications - combining USB, ISO 7816, PINpad, and security features into a single die to replace multi-chip solutions.
FAQ
What is the maximum operating frequency of the 73S1215F-68IM/F/P CPU core?
The 73S1215F-68IM/F/P CPU core operates at up to 24 MHz, delivering 20 MIPS performance due to its 80515 architecture executing most instructions in a single clock cycle. This speed enables real-time execution of AES, DES/3-DES, and RSA cryptographic routines required for EMV-compliant PIN encryption - verified across the full -40°C to +85°C temperature range.
Does the 73S1215F-68IM/F/P support both T=0 and T=1 smart card protocols?
Yes, the 73S1215F-68IM/F/P includes a dedicated ISO 7816 UART that natively supports both T=0 and T=1 protocols, with separate 2-byte transmit and receive FIFOs. The interface is fully EMV 4.1–compliant and includes hardware sequencers for card activation/deactivation - confirmed in Section 1.7.15 of the official datasheet.
Is the 73S1215F-68IM/F/P pinout compatible with other members of the 73S12xxF family?
No - the 73S1215F-68IM/F/P uses a 68-pin QFN package, while other variants like the 73S1215F-44IM/F/P use a 44-pin QFN. Pin assignments differ significantly between packages; the 68-pin version provides additional user I/Os, LED drivers, and analog input not present in the 44-pin variant - making them non-interchangeable without PCB redesign.
What USB classes and descriptors does the 73S1215F-68IM/F/P implement out of the box?
The 73S1215F-68IM/F/P implements the CCID (Chip/Smart Card Interface Device) class per USB Device Class Definition for Smart Card Devices v1.1. It includes pre-certified Windows WHQL drivers and supports standard CCID descriptors - enabling plug-and-play operation on Windows, macOS, and Linux without custom driver development.
Can the 73S1215F-68IM/F/P operate without an external 32.768 kHz crystal?
Yes - the 32.768 kHz crystal is optional. When omitted, the RTC function is disabled, but all other features (USB, ISO 7816, PINpad, UART, I²C) remain fully operational. The primary system clock still derives from the mandatory 6–12 MHz crystal via the internal PLL, as specified in Section 1.7.1 of the datasheet.
73S1215F-68IM/F/P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 68-VFQFN Exposed Pad
- Series:
- 73S12xx
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- 80515
- Core Size:
- 8-Bit
- Speed:
- 24MHz
- Connectivity:
- I2C, SmartCard, UART/USART, USB
- Peripherals:
- LED, POR, WDT
- Number of I/O:
- 9
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
73S1215F-68IM/F/P FAQ
1.How can I place an order for 73S1215F-68IM/F/P through Aetrix?
Please submit a Request for Quotation (RFQ) for 73S1215F-68IM/F/P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 73S1215F-68IM/F/P reliable?
The price and inventory of 73S1215F-68IM/F/P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 73S1215F-68IM/F/P is usually 5 days.
3.What payment methods are accepted for 73S1215F-68IM/F/P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 73S1215F-68IM/F/P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 73S1215F-68IM/F/P?
73S1215F-68IM/F/P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 73S1215F-68IM/F/P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 73S1215F-68IM/F/P?
For technical support, including 73S1215F-68IM/F/P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 73S1215F-68IM/F/P requirements.
6.How does Aetrix verify that 73S1215F-68IM/F/P is sourced from the original manufacturer or authorized distributors?
All 73S1215F-68IM/F/P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 73S1215F-68IM/F/P meets industry standards.
7.What is the process for return or replacement of 73S1215F-68IM/F/P?
All 73S1215F-68IM/F/P units undergo pre-shipment inspection (PSI). If there is an issue with 73S1215F-68IM/F/P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 73S1215F-68IM/F/P part is unused and in its original packaging.
Return procedure for 73S1215F-68IM/F/P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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