Texas Instruments 74AC11074NSR
- Part No.:
- 74AC11074NSR
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 14-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
74AC11074NSR.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 14SOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,110
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
74AC11074NSR from Texas Instruments is a dual positive-edge-triggered D-type flip-flop with independent preset and clear inputs, operating across 3 V to 5.5 V supply, delivering 125 MHz max clock frequency at 5 V, 7.5 ns typical propagation delay (CLK→Q), and ±24 mA output drive. It functions as a synchronous storage element in digital control logic, state machines, and data synchronization circuits.
For engineers reviewing the 74AC11074NSR datasheet, 74AC11074NSR pinout, 74AC11074NSR application, or 74AC11074NSR equivalent, key selection criteria include its dual DFF architecture with asynchronous PRE/CLR, guaranteed operation from –40°C to 85°C, EPIC™ 1-µm CMOS process, 500-mA latch-up immunity, and compatibility with standard 14-pin SOIC (NSR) packaging.
Technical Context
This device implements two fully independent D-type flip-flops sharing no internal resources. Each channel features asynchronous active-low preset (PRE) and clear (CLR), synchronous positive-edge clocking (CLK), and complementary outputs (Q and Q̅). Data transfer occurs only on low-to-high CLK transitions when both PRE and CLR are high.
It uses Texas Instruments' EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm process, enabling high noise immunity via center-pin VCC/GND configuration and achieving 500-mA latch-up immunity at 125°C. Timing is voltage-level–triggered-not dependent on clock rise time-and supports setup/hold times as low as 3.5 ns (setup) and 0 ns (hold) at 5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | Advanced CMOS (AC), TTL-compatible input thresholds |
| Supply Voltage Range | 3 V to 5.5 V - supports mixed-voltage system interfacing |
| Max Clock Frequency | 125 MHz at 5 V - enables high-speed state sequencing |
| Propagation Delay (CLK→Q) | 7.5 ns typical at 5 V - defines minimum cycle time in synchronous logic |
| Output Drive Strength | ±24 mA at 5 V - drives multiple TTL or CMOS loads without buffering |
| Operating Temperature | –40°C to +85°C - qualified for industrial ambient environments |
| Input Capacitance | 3.5 pF - minimizes loading on preceding stage and signal integrity impact |
Pinout & Package
74AC11074NSR is supplied in a 14-pin plastic small-outline (SOIC) package (NSR suffix), with center-aligned power pins (Pin 7 = GND, Pin 14 = VCC) to reduce high-speed switching noise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1PRE | Asynchronous active-low preset for first flip-flop - forces Q₁ = H, Q̅₁ = L |
| 2 | 1Q | True output of first flip-flop - latched D₁ value on CLK↑ |
| 3 | 1Q̅ | Inverted output of first flip-flop - complements 1Q |
| 4 | GND | Power ground reference - center-pin placement reduces ground bounce |
| 5 | 2Q | True output of second flip-flop - latched D₂ value on CLK↑ |
| 6 | 2Q̅ | Inverted output of second flip-flop - complements 2Q |
| 7 | 2PRE | Asynchronous active-low preset for second flip-flop - forces Q₂ = H, Q̅₂ = L |
| 8 | 1CLK | Clock input for first flip-flop - positive-edge sensitive |
| 9 | 1D | Data input for first flip-flop - sampled on 1CLK↑ if 1PRE/1CLR inactive |
| 10 | 1CLR | Asynchronous active-low clear for first flip-flop - forces Q₁ = L, Q̅₁ = H |
| 11 | VCC | Positive supply - center-pin placement improves decoupling effectiveness |
| 12 | 2CLR | Asynchronous active-low clear for second flip-flop - forces Q₂ = L, Q̅₂ = H |
| 13 | 2D | Data input for second flip-flop - sampled on 2CLK↑ if 2PRE/2CLR inactive |
| 14 | 2CLK | Clock input for second flip-flop - positive-edge sensitive, independent of 1CLK |
Key Features
| Feature | Design Value |
|---|---|
| Center-pin VCC/GND layout | Reduces simultaneous switching noise and improves power integrity in dense PCB layouts |
| EPIC™ 1-µm CMOS process | Delivers high speed with low static current and robust latch-up immunity (500 mA @ 125°C) |
| Asynchronous PRE/CLR per channel | Enables independent initialization or forced reset without clock dependency or timing constraints |
| TTL-compatible input thresholds | Accepts standard 5-V TTL logic levels while operating down to 3 V supply |
| Complementary Q/Q̅ outputs | Eliminates need for external inverters in toggle, enable, or differential signaling paths |
Applications
| Industrial PLC I/O Modules | Digital Test Equipment Control Logic |
|---|---|
|
Use Scenario: Capturing and holding sensor status signals in real-time I/O expansion modules. IC Role / Device Role / Timing Role: Synchronous edge-triggered register storing field input states on controller-synchronized clock edges. Use Value: Ensures deterministic sampling with 3.5 ns setup time margin at 5 V, preventing metastability in noisy factory environments. |
Use Scenario: Generating precise timing waveforms and state transitions in automated test pattern generators. IC Role / Device Role / Timing Role: Dual-channel DFF used for pipeline staging, pulse width control, and sequence generation. Use Value: 125 MHz max clock rate and sub-8 ns propagation delay support tight timing budgets in high-speed ATE systems. |
| Communications Frame Synchronizers | Legacy Bus Interface Glue Logic |
|
Use Scenario: Aligning incoming serial frame boundaries with local system clocks in T1/E1 line interfaces. IC Role / Device Role / Timing Role: Edge-triggered storage element capturing framing bits and asserting sync pulses on clock edges. Use Value: Asynchronous PRE/CLR allows immediate resynchronization without waiting for next clock edge - critical for error recovery. |
Use Scenario: Adapting legacy parallel bus timing between mismatched microcontrollers and peripherals. IC Role / Device Role / Timing Role: Level-shifting and clock-domain bridging register for address/data latching. Use Value: ±24 mA drive strength directly interfaces with 74LS TTL loads; 3–5.5 V operation bridges 3.3 V and 5 V subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AC74DR | Single-package dual DFF with identical AC logic family, same 14-pin SOIC (DR), but lacks separate 2CLK/2D pins - shares one clock and data path per section | Not suitable for independent clocking of each flip-flop; limited to shared-control configurations | Select 74AC11074NSR when channels require fully independent clock and data inputs |
| 74LVC74AD,118 | Lower-voltage optimized (1.65–3.6 V), 3.3 V–only operation; 5 V tolerant inputs; 14-pin SOIC (PW), not NSR | Cannot operate at 5 V supply; unsuitable for mixed 5 V logic systems or legacy TTL interfacing | Choose 74AC11074NSR for 5 V compatibility, higher drive, and industrial temperature range |
Compared with SN74AC74DR and 74LVC74AD,118, the 74AC11074NSR uniquely provides fully independent clock and data inputs per flip-flop, full 3–5.5 V operation, and proven 5 V TTL interoperability - making it the only option among the three for asymmetric dual-channel synchronous logic where clock domains must be isolated.
Availability
74AC11074NSR is available at Aetrix Electronics and suitable for industrial automation, communications infrastructure, and legacy system upgrades requiring stable component supply, long-lifecycle support, and drop-in replacement capability for obsolete 74AC logic.
Supply support for 74AC11074NSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and logic solutions with broad industrial, automotive, and communications reach.
The 74AC logic family was engineered for high-speed, low-power, TTL-compatible digital interfacing in industrial control and instrumentation systems - emphasizing noise immunity, wide supply range, and robust latch-up performance.
FAQ
What is the maximum clock frequency supported by the 74AC11074NSR?
The 74AC11074NSR supports up to 125 MHz maximum clock frequency when operated at VCC = 5 V and TA = 25°C. At 3.3 V supply, the rated maximum drops to 100 MHz. These values are specified under recommended operating conditions and assume proper load and signal integrity - exceeding them may result in timing violations or metastability.
Does the 74AC11074NSR support 3.3 V operation?
Yes, the 74AC11074NSR is fully specified for 3 V to 5.5 V operation, including reliable function at 3.3 V ±0.3 V. Input thresholds scale with VCC, and all timing parameters (e.g., 100 MHz fclock, 5 ns tsu) are guaranteed across this range - making it suitable for mixed-voltage designs interfacing with both 3.3 V and 5 V logic families.
What does the "NSR" suffix indicate in 74AC11074NSR?
The "NSR" suffix denotes a 14-pin plastic small-outline integrated circuit (SOIC) package with a standard 300-mil body width and 1.27-mm lead pitch. It is functionally and pin-compatible with other industry-standard 74AC11074 variants in SOIC (e.g., NS, D), and shares the center-pin VCC/GND configuration critical for noise reduction in high-speed digital systems.
Can the 74AC11074NSR drive TTL loads directly?
Yes, the 74AC11074NSR delivers ±24 mA output drive at 5 V, which meets or exceeds the input current requirements of standard TTL (74LS, 74S) loads. Its TTL-compatible input thresholds also allow direct connection to TTL outputs without level-shifting - confirming its role as a true TTL/CMOS interface device in legacy system upgrades.
Is the 74AC11074NSR pin-compatible with the 74HC11074?
No - the 74AC11074NSR and 74HC11074 share identical pinout and logic function, but differ in electrical characteristics: AC devices offer faster speed (125 MHz vs. ~30 MHz for HC), lower input thresholds, and higher output drive. While physically interchangeable, substituting one for the other requires verifying timing margins, voltage compatibility, and fanout in the target design.
74AC11074NSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AC
- Package/Case:
- 14-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Set(Preset) and Reset
- Type:
- D-Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 150 MHz
- Max Propagation Delay @ V, Max CL:
- 7.5ns @ 5V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 3V ~ 5.5V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 3.5 pF
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
74AC11074NSR FAQ
1.How can I place an order for 74AC11074NSR through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AC11074NSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AC11074NSR reliable?
The price and inventory of 74AC11074NSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AC11074NSR is usually 5 days.
3.What payment methods are accepted for 74AC11074NSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AC11074NSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AC11074NSR?
74AC11074NSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AC11074NSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AC11074NSR?
For technical support, including 74AC11074NSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AC11074NSR requirements.
6.How does Aetrix verify that 74AC11074NSR is sourced from the original manufacturer or authorized distributors?
All 74AC11074NSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AC11074NSR meets industry standards.
7.What is the process for return or replacement of 74AC11074NSR?
All 74AC11074NSR units undergo pre-shipment inspection (PSI). If there is an issue with 74AC11074NSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AC11074NSR part is unused and in its original packaging.
Return procedure for 74AC11074NSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AC11074NSR Tags
-
SN74HC74DR
Texas Instruments

-
SN74HC74PWR
Texas Instruments

-
74LVC1G74GT,115
Nexperia USA Inc.

-
SN74LVC2G74DCUR
Texas Instruments
-
CD4013BM96
Texas Instruments

-
SN74HCT273PWR
Texas Instruments

-
SN74LVC1G74DCUR
Texas Instruments

-
SN74HC574DWR
Texas Instruments
-
74LVC1G74DC,125
Nexperia USA Inc.

-
SN74HC273DWR
Texas Instruments

-
SN74HCT574DWR
Texas Instruments

-
SN74LVC1G74DCTR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

