onsemi 74ACT02PC
- Part No.:
- 74ACT02PC
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
74ACT02PC.pdf
- Description:
- IC GATE NOR 4CH 2-INP 14MDIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,880
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Product details
Overview
74ACT02PC from Fairchild Semiconductor is a quad 2-input NOR gate logic IC in a 14-lead PDIP package, operating at 4.5V–5.5V supply, delivering ±24mA output drive, with TTL-compatible inputs and 6.0ns typical propagation delay at 5V. It serves as a fundamental combinational logic element in digital control circuits, bus arbitration, and enable/disable gating in industrial microcontroller peripheral interfaces.
For engineers reviewing the 74ACT02PC datasheet, pinout, applications, or equivalent options, this page provides verified functional specifications, validated PDIP pin mapping, real-world use cases in level-sensitive logic systems, and two confirmed alternative parts with documented electrical and interface differences.
Technical Context
The 74ACT02PC implements four independent 2-input NOR gates using advanced CMOS technology with TTL-compatible input thresholds (VIH = 2.0V min, VIL = 0.8V max at VCC = 4.5V–5.5V), enabling direct interfacing with legacy TTL logic families. Its output stage supports rail-to-rail swing and ±24mA DC drive capability under guaranteed conditions.
Propagation delays are characterized at CL = 50pF: tPLH/tPHL = 6.0/6.5ns (typ) and 9.0/10.0ns (max) over –40°C to +85°C at VCC = 5.0V. Input capacitance is 4.5pF, and power dissipation capacitance is 30.0pF - key parameters for high-speed fanout and dynamic power estimation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input NOR - four independent gates, each performing Boolean OR-then-NOT on two inputs |
| Supply Voltage Range | 4.5V to 5.5V - ensures compatibility with standard 5V TTL/CMOS systems and stable noise margins |
| Output Drive | ±24mA - supports driving multiple 74-series loads or small LEDs without external buffers |
| Propagation Delay | 6.0ns (tPLH typ) / 6.5ns (tPHL typ) at 5V, CL = 50pF - enables reliable operation up to ~80MHz toggle rate |
| Input Compatibility | TTL-compatible - VIH ≥ 2.0V, VIL ≤ 0.8V - allows seamless integration with 74LS, 74F, and other TTL outputs |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade embedded control and automation environments |
| Package Type | 14-lead PDIP (JEDEC MS-001, 0.300" wide) - through-hole mounting compatible with prototyping, legacy PCBs, and manual assembly |
Pinout & Package
74ACT02PC is housed in a 14-lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001 compliant, 0.300" wide body with 2.54mm lead pitch. Pin 1 is marked by a notch or dot; pins are numbered counter-clockwise from top-left when viewed from top with notch left.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 8, 9, 11, 12 | Input (A1/B1, A2/B2, A3/B3, A4/B4) | Eight dedicated logic inputs - paired per gate (e.g., Pin 1 = A1, Pin 2 = B1, Pin 3 = O1) |
| 3, 6, 10, 13 | Output (O1–O4) | Four buffered NOR outputs - each capable of sourcing/sinking 24mA with rail-aligned VOH/VOL |
| 7 | GND | Ground reference for all internal circuitry and output return path |
| 14 | VCC | Positive supply terminal - must be decoupled locally (e.g., 0.1µF ceramic) to suppress switching noise |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible inputs | Enables direct connection to 74LS/74F outputs without level-shifting, reducing BOM count and layout complexity |
| ±24mA output drive | Drives up to 10 LSTTL loads or small indicator LEDs directly, eliminating need for discrete buffer stages |
| Low quiescent ICC | Max 40µA at VCC = 5.5V - minimizes standby power in battery-backed or energy-sensitive control modules |
| Industrial temperature range | –40°C to +85°C operation - supports deployment in motor drives, PLC I/O modules, and outdoor instrumentation |
| JEDEC-standard PDIP package | Ensures mechanical interchangeability with legacy 74-series logic and compatibility with wave-soldering and hand-soldering processes |
Applications
| Industrial Control Logic | Microcontroller Peripheral Enable |
|---|---|
|
Use Scenario: Discrete safety interlock logic in programmable logic controller (PLC) backplane modules where redundant NOR-based voting prevents unsafe actuation. IC Role / Device Role / Timing Role: Combinational logic gate implementing active-low enable for relay drivers, with propagation delay <10ns ensuring deterministic response within 100µs control cycles. Use Value: Eliminates FPGA or microcontroller overhead for hardwired fail-safe logic, improving system-level SIL-2 compliance and reducing firmware validation scope. |
Use Scenario: Enabling/disabling SPI peripherals (e.g., ADCs, DACs) on an industrial microcontroller board based on address decode and chip-select arbitration. IC Role / Device Role / Timing Role: Level-sensitive gating element that combines address bits and master select signals to generate synchronized peripheral enables with sub-10ns setup/hold margin. Use Value: Reduces GPIO resource usage on the MCU by offloading simple decode logic, freeing pins for analog sensing or communication interfaces. |
| Legacy System Bus Interface | Power Sequencing Control |
|
Use Scenario: Glue logic in retro-computing or test equipment upgrades integrating modern peripherals into 1980s-era 8-bit bus architectures (e.g., Z80, 6502). IC Role / Device Role / Timing Role: Address decoding and bus contention resolution gate - NOR-ing control lines to assert WAIT or BUSACK with TTL-compatible timing alignment. Use Value: Preserves signal integrity and timing compatibility with vintage bus timing budgets while enabling drop-in peripheral expansion. |
Use Scenario: Generating sequenced enable signals for multi-rail power supplies (e.g., 12V → 5V → 3.3V) in embedded gateways requiring strict startup order. IC Role / Device Role / Timing Role: Synchronous logic element combining reset, voltage-good flags, and timer outputs to produce staggered enable pulses with defined delay margins. Use Value: Replaces RC-based sequencing networks with deterministic, temperature-stable logic, improving reliability across thermal cycling and long-term drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad NOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT02N | Identical logic function, TTL-compatible inputs, same 4.5–5.5V VCC range; differs only in packaging (Texas Instruments' PDIP variant, same pinout) | No functional deviation - fully interchangeable in through-hole designs; TI's version has identical AC/DC specs and thermal profile | Select SN74ACT02N if dual-sourcing from TI is required for supply chain resilience, with no design or layout changes needed. |
| 74VHC02N | Higher VCC range (2.0–5.5V), CMOS-only inputs (VIH = 70% VCC), lower ICC (max 2µA), but reduced drive (±8mA) and slower delay (11ns typ at 5V) | Suitable for low-power, mixed-voltage systems but not direct replacement where TTL input compatibility or 24mA drive is mandatory | Choose 74VHC02N only when extending battery life or supporting 3.3V logic domains - verify input threshold compatibility and load drive capability first. |
Compared with SN74ACT02N and 74VHC02N, the 74ACT02PC offers guaranteed TTL input compatibility and robust ±24mA drive ideal for industrial 5V systems, whereas SN74ACT02N is a functionally identical second source, and 74VHC02N trades drive strength and interface compatibility for wider voltage range and ultra-low static power.
Availability
74ACT02PC is available at Aetrix Electronics and suitable for industrial control logic, microcontroller peripheral enable, legacy system bus interface, and power sequencing control requiring stable component supply and long-lifecycle support.
Supply support for 74ACT02PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Fairchild Semiconductor was a U.S.-based semiconductor company specializing in analog and discrete power products, acquired by ON Semiconductor in 2016; its legacy logic portfolio remains widely deployed and supported.
The 74ACT02PC belongs to Fairchild's ACT (Advanced CMOS TTL-compatible) logic family, designed for seamless migration from bipolar TTL into lower-power, higher-speed CMOS systems without redesigning interface logic.
FAQ
What is the supply voltage range for the 74ACT02PC?
The 74ACT02PC operates over a supply voltage range of 4.5V to 5.5V. This narrow range ensures TTL-compatible input thresholds and stable output drive performance. Operation outside this range may violate guaranteed VIH/VIL levels or exceed absolute maximum ratings, risking unreliable logic behavior or device damage. Always regulate VCC within these limits in production designs.
Does the 74ACT02PC support TTL-level inputs?
Yes, the 74ACT02PC features TTL-compatible inputs: VIH is guaranteed ≥2.0V and VIL ≤0.8V at VCC = 4.5V–5.5V. This allows direct connection to 74LS, 74F, and other TTL outputs without level shifters. The 74AC02 variant does not offer this compatibility - only the ACT version does, as confirmed in the "Features" and DC characteristics sections of the datasheet.
What is the maximum output current rating for the 74ACT02PC?
The 74ACT02PC is rated for ±24mA DC output current per pin under specified conditions (e.g., VOL ≤0.44V at IOL = 24mA, VOH ≥3.76V at IOH = –24mA). This drive strength supports direct interfacing with multiple LSTTL loads or small LEDs. Exceeding ±24mA risks violating VOL/VOH specs or accelerating long-term parametric drift.
Is the 74ACT02PC pin-compatible with other 74-series NOR gates in PDIP packages?
Yes, the 74ACT02PC uses the industry-standard 14-pin DIP pinout for quad 2-input NOR gates: inputs and outputs follow the JEDEC-standard arrangement (e.g., Pins 1/2→3, 4/5→6, etc.), matching 74LS02, 74HC02, and SN74ACT02N. This enables direct substitution in existing layouts - provided VCC, loading, and timing requirements align with the ACT family's specifications.
What is the typical propagation delay of the 74ACT02PC at 5V?
At VCC = 5.0V, CL = 50pF, and TA = +25°C, the 74ACT02PC exhibits typical propagation delays of tPLH = 6.0ns and tPHL = 6.5ns. The maximum delays are 9.0ns and 10.0ns respectively across –40°C to +85°C. These values are measured under controlled load conditions and define the upper bound for timing-critical paths in synchronous logic designs.
74ACT02PC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74ACT
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- NOR Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- 0.8V
- Input Logic Level - High:
- 2V
- Max Propagation Delay @ V, Max CL:
- 9.5ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 14-MDIP
74ACT02PC FAQ
1.How can I place an order for 74ACT02PC through Aetrix?
Please submit a Request for Quotation (RFQ) for 74ACT02PC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74ACT02PC reliable?
The price and inventory of 74ACT02PC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74ACT02PC is usually 5 days.
3.What payment methods are accepted for 74ACT02PC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74ACT02PC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74ACT02PC?
74ACT02PC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74ACT02PC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74ACT02PC?
For technical support, including 74ACT02PC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74ACT02PC requirements.
6.How does Aetrix verify that 74ACT02PC is sourced from the original manufacturer or authorized distributors?
All 74ACT02PC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74ACT02PC meets industry standards.
7.What is the process for return or replacement of 74ACT02PC?
All 74ACT02PC units undergo pre-shipment inspection (PSI). If there is an issue with 74ACT02PC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74ACT02PC part is unused and in its original packaging.
Return procedure for 74ACT02PC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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