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Home > Products > Integrated Circuits (ICs) > Logic > Flip Flops

Texas Instruments 74ACT11112D

Name: 74ACT11112D
Brand: Texas Instruments
SKU: 74ACT11112D
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74ACT11112D

Manufacturer:: Texas Instruments

Category:: Flip Flops

Package:: -

Datasheet:: 74ACT11112D.pdf

Description:: IC FF JK TYPE DUAL 1BIT 16SOIC

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Product details

Overview

74ACT11112D from Texas Instruments is a dual J-K negative-edge-triggered flip-flop with independent clear and preset inputs, operating at 4.5–5.5 V supply, supporting 125 MHz clock frequency, with 3.5 ns setup time and TTL-voltage-compatible inputs - used in synchronous logic control, state machine sequencing, and clock-domain synchronization circuits.

For engineers reviewing the 74ACT11112D datasheet, 74ACT11112D pinout, 74ACT11112D application, or 74ACT11112D equivalent, key selection considerations include negative-edge triggering behavior, dual independent J-K functionality with asynchronous set/reset, flow-through PCB layout optimization, and EPIC CMOS process-based noise immunity at industrial temperature range (–40°C to 85°C).

Technical Context

This device implements two fully independent J-K flip-flops sharing no internal signal paths, each triggered exclusively on the negative edge of CLK while supporting asynchronous PRE and CLR assertion. Each flip-flop features TTL-compatible input thresholds (V_IL = 0.8 V, V_VIH = 2.0 V) and delivers rail-to-rail CMOS output swing (V_OH ≥ 4.94 V at V_CC = 5.5 V, I_OH = –24 mA).

Its EPIC 1-μm CMOS process enables 500-mA latch-up immunity at 125°C and low dynamic power dissipation (C_pd = 39 pF per flip-flop). The center-pin V_CC/GND configuration and fully buffered inputs minimize switching noise coupling and improve signal integrity in high-speed digital systems.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Family	ACT (Advanced CMOS TTL-compatible), ensuring interoperability with legacy 74LS/74F systems without level-shifting.
Supply Voltage Range	4.5 V to 5.5 V - supports stable operation across standard 5 V ±10% rails with no undervoltage lockout required.
Max Clock Frequency	125 MHz - enables use in high-speed counters, shift registers, and pipeline stage control up to 8 ns cycle time.
Setup/Hold Times	t_su = 3.5 ns, t_h = 1.5 ns - defines minimum data stability window before/after CLK↓ for reliable state capture.
Output Drive Strength	I_OL = 24 mA / I_OH = –24 mA - sufficient to drive 10 LSTTL loads or terminate short PCB traces without external buffers.
Operating Temperature	–40°C to +85°C - qualified for industrial-grade embedded control, instrumentation, and telecom infrastructure applications.

Pinout & Package

74ACT11112D is packaged in a 16-pin SOIC (Small-Outline Integrated Circuit) with 300-mil body width and standard D-package pinout. The package features center-aligned V_CC (Pin 16) and GND (Pin 8) to reduce ground bounce and supply noise during simultaneous switching.

Pin/Terminal	Circuit Role	Design Meaning
1PRE, 2PRE	Asynchronous preset input (active-low)	Forces Q = H / Q̅ = L independently of clock; overrides J/K state when asserted.
1CLR, 2CLR	Asynchronous clear input (active-low)	Forces Q = L / Q̅ = H independently of clock; provides hard reset capability.
1CLK, 2CLK	Clock input (negative-edge sensitive)	Triggers state update only on falling edge; immune to glitches on rising edge.
1J, 1K, 2J, 2K	Data control inputs	Determine next-state logic: J=K=1 → toggle; J=1,K=0 → set; J=0,K=1 → reset; J=K=0 → hold.
1Q, 1Q̅, 2Q, 2Q̅	Complementary outputs	Provide true/inverted registered outputs with matched propagation delays (t_PLH/t_PHL ≤ 7.7 ns).
V_CC (Pin 16), GND (Pin 8)	Power supply terminals	Center-pin placement minimizes loop inductance and improves high-frequency decoupling effectiveness.

Key Features

Feature	Design Value
TTL-Voltage Compatible Inputs	Accepts standard 74LS/74F logic levels directly - eliminates need for level translators in mixed-family designs.
Flow-Through Architecture	Input and output pins positioned on opposite sides of package - simplifies PCB routing and reduces trace crossovers.
EPIC CMOS Process	Delivers latch-up immunity >500 mA at 125°C and low C_pd = 39 pF - enhances reliability in noisy or thermally stressed environments.
Fully Buffered Inputs	High noise margin (>0.4 V) and isolation from supply/ground disturbances - prevents false triggering from coupled transients.
Negative-Edge Triggering	State updates occur only on CLK falling edge - enables precise timing alignment with inverted clock domains or DDR-style sampling.

Applications

Digital State Machine Control	High-Speed Counter Design
Use Scenario: Implementing finite-state controllers for industrial PLC sequencers where deterministic transition timing and asynchronous reset are critical. IC Role / Device Role / Timing Role: 74ACT11112D serves as the core register element storing current state bits, with PRE/CLR enabling immediate mode reinitialization. Use Value: Negative-edge triggering synchronizes state updates to system clock's falling phase, avoiding race conditions in multi-stage pipelines.	Use Scenario: Building 4-bit binary counters in test equipment requiring jitter-free carry propagation and glitch-resistant reset. IC Role / Device Role / Timing Role: 74ACT11112D operates as toggle-mode J-K flip-flop (J=K=1), cascaded with minimal skew between stages. Use Value: 125 MHz max clock rate and 3.5 ns setup time support counter operation up to 8 ns period - suitable for 125 MSPS sampling clocks.
Synchronous Data Capture	Legacy System Logic Interface
Use Scenario: Capturing parallel sensor data in automotive engine control units where signals must be aligned to a master timing reference. IC Role / Device Role / Timing Role: 74ACT11112D latches asynchronous input data on the controlled negative edge of a synchronized clock derived from ECU timing module. Use Value: Independent PRE/CLR allows safe initialization before data acquisition begins, preventing metastability in first-cycle sampling.	Use Scenario: Interfacing modern microcontrollers with legacy 74LS-based peripheral logic in avionics maintenance test sets. IC Role / Device Role / Timing Role: 74ACT11112D acts as a level- and timing-compatible bridge, accepting LS outputs and driving CMOS loads with full fanout. Use Value: TTL-compatible inputs and 24 mA drive strength ensure direct connection to 74LS outputs without pull-ups or buffers - reducing BOM count.

Digital State Machine Control

High-Speed Counter Design

Use Scenario: Implementing finite-state controllers for industrial PLC sequencers where deterministic transition timing and asynchronous reset are critical.

IC Role / Device Role / Timing Role: 74ACT11112D serves as the core register element storing current state bits, with PRE/CLR enabling immediate mode reinitialization.

Use Value: Negative-edge triggering synchronizes state updates to system clock's falling phase, avoiding race conditions in multi-stage pipelines.

Use Scenario: Building 4-bit binary counters in test equipment requiring jitter-free carry propagation and glitch-resistant reset.

IC Role / Device Role / Timing Role: 74ACT11112D operates as toggle-mode J-K flip-flop (J=K=1), cascaded with minimal skew between stages.

Use Value: 125 MHz max clock rate and 3.5 ns setup time support counter operation up to 8 ns period - suitable for 125 MSPS sampling clocks.

Synchronous Data Capture

Legacy System Logic Interface

Use Scenario: Capturing parallel sensor data in automotive engine control units where signals must be aligned to a master timing reference.

IC Role / Device Role / Timing Role: 74ACT11112D latches asynchronous input data on the controlled negative edge of a synchronized clock derived from ECU timing module.

Use Value: Independent PRE/CLR allows safe initialization before data acquisition begins, preventing metastability in first-cycle sampling.

Use Scenario: Interfacing modern microcontrollers with legacy 74LS-based peripheral logic in avionics maintenance test sets.

IC Role / Device Role / Timing Role: 74ACT11112D acts as a level- and timing-compatible bridge, accepting LS outputs and driving CMOS loads with full fanout.

Use Value: TTL-compatible inputs and 24 mA drive strength ensure direct connection to 74LS outputs without pull-ups or buffers - reducing BOM count.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual J-K flip-flop applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74ACT112N	Same ACT family, identical function and pinout, but in PDIP-16 package instead of SOIC-16.	Preferred for through-hole prototyping or legacy board repair where SOIC footprint is unavailable.	Select SN74ACT112N when manual soldering, socketing, or compatibility with existing DIP layouts is required.
74AC112M	AC-series (not ACT); lower drive (±24 mA same, but no TTL input compatibility - V_IH = 3.5 V min).	Requires level-shifting when interfacing with 74LS/74F; unsuitable for direct drop-in replacement in mixed-logic systems.	Choose 74AC112M only in pure AC-family designs where input voltage thresholds match upstream drivers.

Compared with SN74ACT112N and 74AC112M, the 74ACT11112D uniquely combines SOIC packaging, TTL-compatible inputs, and industrial temperature rating - making it optimal for space-constrained, noise-sensitive, and mixed-logic production systems requiring long-term supply stability.

Availability

74ACT11112D is available at Aetrix Electronics and suitable for industrial control systems, test instrumentation, legacy system upgrades, and aerospace ground-support equipment requiring stable component supply across extended lifecycle planning horizons.

Supply support for 74ACT11112D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader founded in 1930, delivering analog, embedded processing, logic, and interface solutions for industrial, automotive, and communications markets.

The 74ACT11112D belongs to TI's Advanced CMOS (ACT) logic product line, engineered for high-speed, low-noise, TTL-compatible digital interfacing in industrial and instrumentation applications.

FAQ

What is the recommended operating voltage range for the 74ACT11112D?

The 74ACT11112D is specified for reliable operation from 4.5 V to 5.5 V. Operation outside this range may cause undefined logic states or increased ICC current. At V_CC = 4.5 V, VOH remains ≥3.94 V under –24 mA load, ensuring robust noise margins in real-world 5 V rail variations.

Does the 74ACT11112D support true dual independent operation?

Yes - the 74ACT11112D contains two electrically isolated J-K flip-flops with separate J, K, CLK, PRE, CLR, Q, and Q̅ terminals. No shared internal nodes exist between sections, enabling independent clocking, presetting, and clearing without crosstalk or timing dependency.

Can the 74ACT11112D be used as a toggle flip-flop?

Yes - the 74ACT11112D functions as a toggle flip-flop when both J and K inputs are held high. On each negative clock edge, the output toggles between Q and Q̅ states. This behavior is explicitly confirmed in the FUNCTION TABLE and supported by t_PLH/t_PHL timing specs up to 125 MHz.

What is the meaning of "flow-through architecture" in the 74ACT11112D datasheet?

Flow-through architecture refers to the physical pin arrangement: inputs (1J, 1K, 1CLK, 1PRE, 1CLR) occupy Pins 1–3 and 13–15, while outputs (1Q, 1Q̅, 2Q, 2Q̅) occupy Pins 2, 3, 6, and 7 - enabling straight-line PCB routing from left to right without layer jumps or vias, reducing parasitic inductance and signal skew.

Is the 74ACT11112D still in active production?

No - according to TI's official packaging information, the 74ACT11112D is marked OBSOLETE. However, Aetrix Electronics maintains verified legacy inventory with full traceability, conforming to original TI specifications and supporting continued production for installed-base systems requiring exact form-fit-function replacement.

74ACT11112D Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: *

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Packaging:: Bulk

Product Status:: Active

Function:: -

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Clock Frequency:: -

Max Propagation Delay @ V, Max CL:: -

Trigger Type:: -

Current - Output High, Low:: -

Voltage - Supply:: -

Current - Quiescent (Iq):: -

Input Capacitance:: -

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74ACT11112D FAQ

1.How can I place an order for 74ACT11112D through Aetrix?

Please submit a Request for Quotation (RFQ) for 74ACT11112D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74ACT11112D reliable?

The price and inventory of 74ACT11112D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74ACT11112D is usually 5 days.

3.What payment methods are accepted for 74ACT11112D?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74ACT11112D transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74ACT11112D?

74ACT11112D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74ACT11112D order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74ACT11112D?

For technical support, including 74ACT11112D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74ACT11112D requirements.

6.How does Aetrix verify that 74ACT11112D is sourced from the original manufacturer or authorized distributors?

All 74ACT11112D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74ACT11112D meets industry standards.

7.What is the process for return or replacement of 74ACT11112D?

All 74ACT11112D units undergo pre-shipment inspection (PSI). If there is an issue with 74ACT11112D, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74ACT11112D part is unused and in its original packaging.

Return procedure for 74ACT11112D:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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