Nexperia USA Inc. 74AHC1G09GV,125
- Part No.:
- 74AHC1G09GV,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- SC-74A, SOT-753
- Datasheet:
-
74AHC1G09GV,125.pdf
- Description:
- IC GATE AND 1CH 2-INP SC74A
- Quantity:
- Payment:

- Shipping:

Inventory:24,386
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Product details
Overview
74AHC1G09GV,125 from Nexperia is a single 2-input AND gate with open-drain output, designed for level translation and wired-OR logic in mixed-voltage systems. It operates from 2.0 V to 5.5 V, features overvoltage-tolerant inputs up to 5.5 V, delivers propagation delay as low as 3.2 ns (VCC = 5.0 V, CL = 15 pF), and is rated for operation from −40 °C to +125 °C - commonly used in I²C bus pull-up interfaces and voltage-level bridging between 3.3 V and 5 V domains.
For engineers reviewing the 74AHC1G09GV,125 datasheet, 74AHC1G09GV,125 pinout, 74AHC1G09GV,125 application, or 74AHC1G09GV,125 equivalent, key selection criteria include open-drain output compatibility with external pull-ups, input overvoltage tolerance enabling safe interfacing across supply domains, guaranteed timing performance at extended temperature, and SC-74A (SOT753) package suitability for space-constrained PCB layouts.
Technical Context
This device implements standard AND logic with an open-drain output stage, requiring an external pull-up resistor to define the high logic level. Its inputs tolerate voltages up to 5.5 V regardless of VCC, enabling use as a bidirectional level translator without direction control signals.
The logic function produces a low output only when both inputs are high; otherwise, the output enters high-impedance state. Static and dynamic characteristics are fully specified across −40 °C to +125 °C, with VOL ≤ 0.36 V at IO = 8.0 mA (VCC = 4.5 V) and tpd ≤ 7.0 ns (VCC = 5.0 V, CL = 15 pF).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | 2-input AND with open-drain output - enables wired-OR bus architectures and I²C-compatible signal combining |
| Supply Voltage Range | 2.0 V to 5.5 V - supports direct integration into 3.3 V and 5 V systems without level shifters |
| Input Overvoltage Tolerance | Up to 5.5 V independent of VCC - allows safe connection to higher-voltage buses (e.g., 5 V I²C) while powered from 3.3 V |
| Propagation Delay | 3.2 ns typical (VCC = 5.0 V, CL = 15 pF) - ensures timing compliance in high-speed digital control paths |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor controllers |
| Output Drive Capability | 25 mA sink current - sufficient to drive standard 1 kΩ pull-up resistors on 3.3 V or 5 V buses |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - robust handling during board assembly and field service |
Pinout & Package
74AHC1G09GV,125 uses the SC-74A (SOT753) surface-mount package: plastic, 5-terminal, leadless outline with body dimensions 3.1 mm × 1.7 mm × 1.3 mm and thermal-enhanced pad design.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (B) | Data input B | CMOS-compatible input accepting 0–5.5 V; no internal pull-up/down |
| 2 (A) | Data input A | CMOS-compatible input accepting 0–5.5 V; synchronous with B for AND evaluation |
| 3 (GND) | Ground reference | 0 V return path for supply and signal integrity; must be low-impedance |
| 4 (Y) | Open-drain output Y | Active-low output requiring external pull-up; sinks current only - no active high drive |
| 5 (VCC) | Positive supply | Primary power rail (2.0–5.5 V); decoupling capacitor required within 5 mm |
Key Features
| Feature | Design Value |
|---|---|
| Wide supply range | 2.0 V to 5.5 V operation enables drop-in replacement across legacy and modern logic families |
| Overvoltage-tolerant inputs | Inputs withstand 5.5 V even when VCC = 2.0 V - eliminates need for external clamping diodes in mixed-rail designs |
| High noise immunity | VIL ≤ 0.9 V and VIH ≥ 2.1 V at VCC = 3.0 V - provides >1.2 V noise margin in 3.3 V systems |
| Low static power | ICC ≤ 20 μA max at VCC = 5.5 V and full temperature range - suitable for always-on monitoring circuits |
| Industrial temperature grade | Specified from −40 °C to +125 °C - meets requirements for motor drives, PLC I/O modules, and power supply supervisors |
Applications
| I²C Bus Level Translation | Wired-AND Signal Combining |
|---|---|
|
Use Scenario: Interfacing a 3.3 V microcontroller I²C port to a 5 V sensor node where SDA/SCL lines require bidirectional level shifting. IC Role / Device Role / Timing Role: Acts as passive, directionless level translator using open-drain topology - replaces dedicated level-shifter ICs in cost-sensitive designs. Use Value: Eliminates need for dual-supply translators; leverages existing 5 V pull-ups while operating from 3.3 V supply - reduces BOM count and layout area. |
Use Scenario: Combining fault signals from three independent power rails into a single "system fail" alert line connected to a supervisor IC. IC Role / Device Role / Timing Role: Performs wired-AND logic via open-drain outputs tied to common pull-up - any low input forces global alert assertion. Use Value: Provides deterministic, glitch-free fault aggregation without clock domain crossing or additional logic gates - improves system reliability. |
| Reset Signal Conditioning | GPIO Expansion Interface |
|
Use Scenario: Debouncing and synchronizing multiple mechanical reset switches before feeding into a microcontroller's reset pin. IC Role / Device Role / Timing Role: Gates independent switch inputs through AND logic to enforce multi-switch activation requirement before asserting reset. Use Value: Prevents accidental resets by requiring coordinated actuation; open-drain output allows direct connection to MCU reset pin with shared pull-up. |
Use Scenario: Expanding GPIO count on a resource-constrained MCU by adding programmable logic for peripheral enable control. IC Role / Device Role / Timing Role: Implements combinational logic to generate chip-select signals for SPI peripherals based on address bits. Use Value: Offloads simple decoding tasks from firmware; sub-7 ns propagation ensures timing-critical CS assertions meet SPI setup/hold requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input open-drain AND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC1G09GW,125 | Lower VCC range (1.65–5.5 V); slightly faster tpd (2.5 ns typ @ 3.3 V) | Not rated for +125 °C operation - limited to −40 °C to +85 °C | Select when operating exclusively at 3.3 V and ambient temperature stays below 85 °C; avoid for under-hood or industrial enclosures. |
| SN74LVC1G09DBVR | Same logic function; TI package (SOT-23-5) has larger footprint (2.92 × 1.62 mm) and higher thermal resistance | ESD rating lower (HBM = 2000 V same, but CDM = 500 V vs. 1000 V) | Prefer when TI ecosystem alignment or legacy SOT-23 tooling is required; verify thermal derating in high-power-density layouts. |
Compared with 74AHC1G09GV,125, the LVC variant trades extended temperature capability for marginal speed gain, while the TI part sacrifices thermal robustness and ESD resilience for vendor-specific supply chain continuity - making the Nexperia device optimal for thermally demanding, high-reliability applications.
Availability
74AHC1G09GV,125 is available at Aetrix Electronics and suitable for I²C bus translation, fault-signal aggregation, and reset conditioning requiring stable component supply across automotive, industrial control, and embedded computing programs.
Supply support for 74AHC1G09GV,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading Dutch semiconductor manufacturer specializing in high-performance logic, analog, and discrete components, with roots in NXP's standard logic division.
The 74AHC logic family targets low-power, high-noise-immunity applications in industrial and consumer electronics, emphasizing robustness across wide voltage and temperature ranges without sacrificing speed.
FAQ
Can 74AHC1G09GV,125 drive a 10 kΩ pull-up resistor on a 5 V bus?
Yes. With VOL ≤ 0.55 V at IO = 4.0 mA (VCC = 3.0 V) and 25 mA absolute maximum sink current, it easily supports 10 kΩ pull-ups on 5 V buses - resulting in < 0.5 mA load current and < 0.05 V residual drop at full sink, well within specification.
Is an external pull-up resistor mandatory for 74AHC1G09GV,125 operation?
Yes. The open-drain output cannot source current; a pull-up resistor is required to establish the HIGH logic level. Typical values range from 1 kΩ (for speed-critical I²C) to 10 kΩ (for low-power wake-up lines), selected based on rise time and power budget.
Does 74AHC1G09GV,125 support hot insertion into a live 5 V bus?
No. While inputs tolerate 5.5 V statically, hot insertion risks transient overstress during power-rail sequencing. The device must be powered before applying input signals exceeding VCC, per Absolute Maximum Ratings (VI ≤ VCC + 0.5 V during transition).
What is the maximum capacitive load 74AHC1G09GV,125 can drive while maintaining 7 ns propagation delay?
At VCC = 5.0 V, tpd ≤ 7.0 ns is guaranteed for CL = 15 pF. Driving 50 pF increases tpd to ≤ 8.5 ns. For strict 7 ns compliance, keep total load (including trace and probe capacitance) ≤ 15 pF - typically achievable with short traces and no stubs.
74AHC1G09GV,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AHC
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- AND Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- Open Drain
- Voltage - Supply:
- 2V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 8mA
- Input Logic Level - Low:
- 0.5V ~ 1.65V
- Input Logic Level - High:
- 1.5V ~ 3.85V
- Max Propagation Delay @ V, Max CL:
- 7.5ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-74A
74AHC1G09GV,125 FAQ
1.How can I place an order for 74AHC1G09GV,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHC1G09GV,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHC1G09GV,125 reliable?
The price and inventory of 74AHC1G09GV,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHC1G09GV,125 is usually 5 days.
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5.How can I obtain technical support or documentation for 74AHC1G09GV,125?
For technical support, including 74AHC1G09GV,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHC1G09GV,125 requirements.
6.How does Aetrix verify that 74AHC1G09GV,125 is sourced from the original manufacturer or authorized distributors?
All 74AHC1G09GV,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHC1G09GV,125 meets industry standards.
7.What is the process for return or replacement of 74AHC1G09GV,125?
All 74AHC1G09GV,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHC1G09GV,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHC1G09GV,125 part is unused and in its original packaging.
Return procedure for 74AHC1G09GV,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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