NXP Semiconductors 74AHC1G126GM,132
- Part No.:
- 74AHC1G126GM,132
- Manufacturer:
- NXP Semiconductors
- Package:
- 6-XFDFN
- Datasheet:
-
74AHC1G126GM,132.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:4,580
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AHC1G126GM,132 from Nexperia is a single CMOS bus buffer/line driver with 3-state output and overvoltage-tolerant inputs (up to 5.5 V), enabling voltage-level translation in mixed-supply systems. It operates from 2.0 V to 5.5 V, supports -40 °C to +125 °C ambient range, and delivers propagation delay as low as 3.4 ns (VCC = 5.0 V, CL = 15 pF). Used in industrial I/O expansion and low-power microcontroller peripheral interfacing.
For engineers reviewing the 74AHC1G126GM,132 datasheet, 74AHC1G126GM,132 pinout, 74AHC1G126GM,132 application, or 74AHC1G126GM,132 equivalent, key selection criteria include 3-state control timing (enable/disable < 9.5 ns), input overvoltage tolerance for level-shifting, symmetrical output drive (±8 mA), wide supply range compatibility, and XSON6 package suitability for space-constrained PCB layouts.
Technical Context
This device implements a non-inverting buffer with active-low 3-state enable logic: when OE is LOW, Y follows A; when OE is HIGH, Y enters high-impedance state. Its CMOS input structure accepts TTL-compatible thresholds only in the AHCT variant - this part (74AHC1G126) uses pure CMOS input levels (VIH ≥ 3.85 V at VCC = 5.5 V).
Designed for signal integrity in dense digital interfaces, it features balanced tPLH/tPHL propagation delays (< 0.5 ns skew), symmetrical output impedance, and low dynamic power dissipation (CPD = 9 pF). Input clamping diodes and ESD protection (HBM > 2000 V, CDM > 1000 V) support robust operation in noisy industrial environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.0 V to 5.5 V - enables direct interface with 3.3 V and 5 V logic domains without level shifters. |
| Input Overvoltage Tolerance | Up to 5.5 V - allows safe connection of 5 V signals to 3.3 V or 2.5 V powered systems. |
| Propagation Delay (A→Y) | 3.4 ns typical (VCC = 5.0 V, CL = 15 pF) - supports >100 MHz data rates in short trace applications. |
| Output Drive Strength | ±8 mA (VOH/VOL @ VCC = 4.5 V) - sufficient to drive 15 pF loads with < 0.55 V VOL and > 3.7 V VOH across temperature. |
| Operating Temperature | -40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor controllers. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - exceeds JEDEC JS-001/JS-002 Class 2/C3 for board-level handling robustness. |
| Power Dissipation Capacitance | 9 pF - enables accurate dynamic power estimation (PD = CPD × VCC² × fi) in battery-sensitive designs. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886), 1.0 mm × 1.45 mm × 0.5 mm body, no leads, 6 terminals, side-wettable flanks not present (distinct from GZ variant), rated for reflow per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Data input | Non-inverting input signal path; CMOS-compatible threshold; tolerant to 5.5 V regardless of VCC. |
| OE | Output enable (active LOW) | Asynchronous 3-state control; drives Y to high-Z when HIGH; no internal pull-up/pull-down. |
| GND | Ground reference | Primary return path for all I/O and supply currents; must be low-inductance connection. |
| n.c. | No connect | Terminal 5 is unconnected internally; must remain floating or grounded per layout best practice - not used for thermal relief. |
| VCC | Positive supply | Single supply rail powering both input and output stages; bypassing with 100 nF ceramic near pin required. |
| Y | 3-state buffered output | Inverting logic not applied - Y = A when OE = LOW; high-Z when OE = HIGH; capable of sourcing/sinking ±8 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Symmetrical output impedance | Enables matched rise/fall times (tPLH ≈ tPHL), reducing signal distortion on bidirectional buses. |
| Balanced propagation delays | Max skew < 0.5 ns between rising/falling edges ensures clean timing margins in synchronous interfaces. |
| Wide supply voltage range | 2.0–5.5 V operation eliminates need for external regulators when interfacing legacy 5 V and modern 3.3 V subsystems. |
| Overvoltage-tolerant inputs | Accepts 5.5 V inputs while powered from 2.0 V - enables true level translation without external components. |
| Latch-up immunity | Exceeds 100 mA per JESD78 Class II Level A - prevents destructive latch-up during transient overvoltage events. |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Isolating and buffering sensor inputs (e.g., switch closures, analog-to-digital converter outputs) before routing to MCU GPIOs in DIN-rail mounted controllers. IC Role / Device Role / Timing Role: Signal conditioning buffer with 3-state capability for shared bus arbitration and noise suppression. Use Value: Overvoltage tolerance protects against induced transients on long field wiring; 125 °C rating ensures reliability in enclosed enclosures. | Use Scenario: Driving LED status indicators and relay drivers from low-voltage microcontrollers in door modules and lighting control units. IC Role / Device Role / Timing Role: Level-translating line driver enabling 3.3 V MCU outputs to safely control 5 V indicator circuits. Use Value: Eliminates discrete level shifter components; ±8 mA drive directly sinks common-anode LED strings without external transistors. |
| Medical Diagnostic Equipment Interface | Consumer IoT Sensor Hub |
Use Scenario: Buffering serial communication lines (e.g., UART TX/RX) between isolated subsystems in portable ultrasound or patient monitors. IC Role / Device Role / Timing Role: Bidirectional bus isolator with fast enable/disable (< 9.5 ns) to minimize bus turnaround latency. Use Value: Low CPD (9 pF) and sub-10 ns switching reduce electromagnetic emissions critical for EMC compliance in Class II medical devices. | Use Scenario: Interfacing multiple I²C or SPI sensors (e.g., environmental, motion) to an ARM Cortex-M0+ host in compact smart home hubs. IC Role / Device Role / Timing Role: Low-power bus repeater extending trace length while maintaining signal integrity at 400 kHz I²C speeds. Use Value: 2.0 V minimum VCC supports energy harvesting power rails; XSON6 footprint saves >60% board area vs. TSSOP5 alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AHCT1G126GM,132 | TTL-input thresholds (VIH = 2.0 V min), identical output specs and package. | Required where driving from legacy 5 V TTL logic; incompatible with pure CMOS 2.5 V sources. | Select only if interfacing 5 V TTL outputs; otherwise 74AHC1G126GM offers broader voltage compatibility. |
| SN74LVC1G126DBVR | Lower VCC range (1.65–5.5 V), higher drive (±32 mA), different pinout (SOT-23-5), no overvoltage tolerance. | Suitable for ultra-low-voltage SoC I/O expansion but requires external clamping for 5 V signal ingress. | Choose when 1.8 V operation or stronger drive is mandatory; avoid where 5 V signal translation is needed. |
Compared with 74AHCT1G126GM,132, this AHC variant provides superior mixed-voltage flexibility; versus SN74LVC1G126DBVR, it trades higher drive strength for essential overvoltage safety in heterogeneous signal environments.
Availability
74AHC1G126GM,132 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, medical diagnostic equipment interface, and consumer IoT sensor hub applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AHC1G126GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in industrial, automotive, and computing markets.
The 74AHC series targets low-power, high-speed CMOS logic applications demanding wide supply range, robust ESD performance, and guaranteed operation up to +125 °C - specifically engineered for signal integrity in space- and power-constrained embedded systems.
FAQ
What is the maximum clock/data rate supported by 74AHC1G126GM,132?
The device does not specify a maximum clock frequency, but its propagation delay (3.4 ns typical at 5 V, 15 pF) and enable/disable times (< 9.5 ns) support reliable operation with data edges up to ~100 MHz in point-to-point configurations. System-level timing depends on trace capacitance, termination, and load - actual usable rate must be validated per layout using worst-case tpd and skew values from Table 8.
Can 74AHC1G126GM,132 be used as a level shifter between 1.8 V and 5 V domains?
No - while inputs tolerate up to 5.5 V regardless of VCC, the output high voltage (VOH) is bounded by VCC. When powered from 1.8 V, VOH cannot exceed ~1.6 V (per static characteristics), making it unsuitable for driving 5 V logic. It functions as a *downward* translator (5 V in → 3.3/2.5 V out) only when VCC matches the target domain.
Is the n.c. pin (pin 5) in the XSON6 package required to be left floating?
Yes - pin 5 is internally unconnected and must remain electrically floating. Do not tie to GND or VCC. While grounding may appear benign in simulation, it risks unintended current paths during ESD events or violates Nexperia's recommended layout per SOT886 mechanical drawing; floating ensures compliance with qualification testing conditions.
Does 74AHC1G126GM,132 support hot-swap or live-insertion?
No - the device lacks built-in hot-swap protection circuitry such as slew-rate limiting or back-drive prevention. Applying VCC while signals are present may cause bus contention or violate absolute maximum ratings (e.g., VI > VCC + 0.5 V). For hot-swap applications, add external series resistors and ensure power sequencing per system-level requirements.
74AHC1G126GM,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AHC
- Package/Case:
- 6-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON (1.45x1)
74AHC1G126GM,132 FAQ
1.How can I place an order for 74AHC1G126GM,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHC1G126GM,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHC1G126GM,132 reliable?
The price and inventory of 74AHC1G126GM,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHC1G126GM,132 is usually 5 days.
3.What payment methods are accepted for 74AHC1G126GM,132?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHC1G126GM,132 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AHC1G126GM,132?
74AHC1G126GM,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AHC1G126GM,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AHC1G126GM,132?
For technical support, including 74AHC1G126GM,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHC1G126GM,132 requirements.
6.How does Aetrix verify that 74AHC1G126GM,132 is sourced from the original manufacturer or authorized distributors?
All 74AHC1G126GM,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHC1G126GM,132 meets industry standards.
7.What is the process for return or replacement of 74AHC1G126GM,132?
All 74AHC1G126GM,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHC1G126GM,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHC1G126GM,132 part is unused and in its original packaging.
Return procedure for 74AHC1G126GM,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AHC1G126GM,132 Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

