Nexperia USA Inc. 74AHC32BQ,115
- Part No.:
- 74AHC32BQ,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 14-VFQFN Exposed Pad
- Datasheet:
-
74AHC32BQ,115.pdf
- Description:
- IC GATE OR 4CH 2-INP 14DHVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AHC32BQ,115 from Nexperia is a quad 2-input OR gate in DHVQFN14 package, operating from 2.0 V to 5.5 V supply, with overvoltage-tolerant inputs up to 5.5 V, Schmitt-trigger inputs for noise immunity, and propagation delay as low as 2.8 ns (VCC = 4.5–5.5 V, CL = 15 pF). It serves as a level-translating logic combiner in mixed-voltage digital interfaces such as industrial I/O expansion and microcontroller peripheral gating.
For engineers reviewing the 74AHC32BQ,115 datasheet, 74AHC32BQ,115 pinout, 74AHC32BQ,115 application, or 74AHC32BQ,115 equivalent, this device supports voltage translation between 3.3 V and 5 V domains, delivers balanced tPLH/tPHL timing, meets -40 °C to +125 °C industrial temperature requirements, and provides ESD robustness (HBM > 2000 V, CDM > 1000 V).
Technical Context
This CMOS logic IC implements four independent 2-input OR gates with identical input/output electrical characteristics across all channels. Each gate features Schmitt-trigger inputs for hysteresis-based noise rejection and overvoltage-tolerant input structures enabling safe operation when interfacing with higher-voltage signals - critical in mixed-supply systems where 5 V peripherals connect to 3.3 V controllers.
The device operates within two distinct input logic families: 74AHC32 accepts CMOS-level inputs (VIH ≥ 3.85 V at VCC = 5.5 V), while its AHCT variant uses TTL-compatible thresholds (VIH ≥ 2.0 V). Its DHVQFN14 package (SOT762-1) provides thermal enhancement via an exposed die pad, supporting stable performance under sustained switching loads in space-constrained PCB layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input OR gate - performs Boolean OR on four independent input pairs, outputting HIGH if either input is HIGH. |
| Supply Voltage Range | 2.0 V to 5.5 V - enables interoperability across 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Propagation Delay | 2.8 ns typical (VCC = 4.5–5.5 V, CL = 15 pF) - ensures minimal timing skew in high-speed control paths like address decoding or interrupt arbitration. |
| Input Voltage Tolerance | Up to 5.5 V regardless of VCC - allows safe connection to 5 V buses while powered from 3.3 V, eliminating external clamping diodes. |
| Operating Temperature | -40 °C to +125 °C - qualified for under-hood automotive modules, industrial PLCs, and motor drive control logic. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - reduces field failure risk during handling and board assembly in uncontrolled environments. |
| Power Dissipation | 500 mW max (Tamb ≤ 125 °C, SOT762-1) - supports continuous operation in thermally dense layouts with derating above 98 °C. |
Pinout & Package
DHVQFN14 package (SOT762-1): 2.5 mm × 3.0 mm × 0.85 mm body, no leads, 14 terminals, exposed thermal pad (non-soldered by default; may be floated or connected to GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 2Y | Output of second OR gate - drives downstream logic or buffer stages with rail-to-rail CMOS swing. |
| 2 | 3A | Input A of third OR gate - accepts active-HIGH logic signal; Schmitt-trigger input rejects sub-ns noise transients. |
| 3 | 2B | Input B of second OR gate - paired with 2A (pin 4) to form complete OR function; electrically identical to all other inputs. |
| 4 | 3B | Input B of third OR gate - enables dual-input combinatorial logic; tolerant to 5.5 V even at 2.0 V VCC. |
| 5 | 2A | Input A of second OR gate - used with 2B (pin 3); supports mixed-voltage interface without external components. |
| 6 | 4Y | Output of fourth OR gate - synchronized timing with other outputs (tpd matching ≤ 0.5 ns across channels). |
| 7 | 1Y | Output of first OR gate - primary output for system enable or status aggregation functions. |
| 8 | 4A | Input A of fourth OR gate - connects to microcontroller GPIO or sensor interrupt line; VIH = 3.85 V @ VCC = 5.5 V. |
| 9 | 1B | Input B of first OR gate - complements 1A (pin 12); supports wired-OR configurations when pulled via resistors. |
| 10 | 4B | Input B of fourth OR gate - matches 4A (pin 8) in threshold and drive strength; supports redundant input routing. |
| 11 | GND | Ground reference (pin 7) - must be low-impedance; thermal pad (not pin 11) enhances heat dissipation in QFN layout. |
| 12 | 1A | Input A of first OR gate - standard CMOS input; leakage < 0.1 μA at VI = 5.5 V enables battery-backed monitoring. |
| 13 | 3Y | Output of third OR gate - routed to FPGA configuration logic or watchdog reset path with predictable timing. |
| 14 | VCC | Supply voltage input - decoupling capacitor (100 nF) required within 3 mm; current draw < 40 μA static @ VCC = 5.5 V. |
Key Features
| Feature | Design Value |
|---|---|
| Overvoltage-tolerant inputs | Withstand 5.5 V regardless of VCC (2.0–5.5 V), enabling direct connection to legacy 5 V buses without level shifters. |
| Schmitt-trigger inputs | Hysteresis of ~0.3 V (typ.) eliminates chatter on slow-rising signals from mechanical switches or long traces. |
| Balanced propagation delays | tPLH and tPHL match within 0.2 ns (VCC = 5 V), preventing pulse-width distortion in clocked enable paths. |
| Industrial temperature range | Specified from -40 °C to +125 °C - validated for use in motor control enclosures and outdoor telecom equipment. |
| Low dynamic power | CPD = 10 pF - limits switching power to < 250 μW per gate at 1 MHz, reducing thermal load in dense logic arrays. |
Applications
| Industrial PLC I/O Expansion | Microcontroller Peripheral Gating |
|---|---|
Use Scenario: Aggregating multiple sensor fault signals into a single hardware interrupt line for a programmable logic controller. IC Role / Device Role / Timing Role: Quad OR gate performing wired-OR summation of four independent 24 V sensor outputs translated to 3.3 V logic levels. Use Value: Eliminates need for discrete diodes or additional logic ICs; overvoltage tolerance prevents damage from 24 V transients coupled onto signal lines. |
Use Scenario: Enabling/disabling SPI peripheral blocks on an ARM Cortex-M4 MCU based on runtime mode selection. IC Role / Device Role / Timing Role: Logic combiner generating chip-select asserts from two independent control bits (e.g., MODE[1:0]). Use Value: Propagation delay ≤ 7.0 ns ensures setup/hold timing margins are preserved at 25 MHz SPI clock rates. |
| Automotive Body Control Module | Medical Diagnostic Equipment Interface |
Use Scenario: Merging door-open, trunk-open, and hood-open switch signals into a unified "body compartment open" status flag. IC Role / Device Role / Timing Role: Fault-tolerant OR logic element with Schmitt-trigger inputs rejecting EMI from nearby solenoid drivers. Use Value: -40 °C to +125 °C rating supports placement near engine bay electronics; HBM > 2000 V withstands assembly ESD events. |
Use Scenario: Combining ready signals from multiple diagnostic sensors (ECG, SpO₂, NIBP) before triggering data acquisition sequence. IC Role / Device Role / Timing Role: Synchronized logic gate ensuring all subsystems report readiness before initiating time-critical sampling. Use Value: Matched tPLH/tPHL guarantees deterministic timing alignment across four parallel sensor channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AHCT32BQ,115 | TTL-compatible input thresholds (VIH = 2.0 V min), slightly higher ICC (max 40 μA vs. 20 μA for AHC) | Preferred when interfacing with legacy 5 V TTL outputs; less suitable for ultra-low-power battery systems | Select for compatibility with older 5 V logic families; avoid if VCC < 4.5 V or power budget < 10 μA per gate |
| SN74LVC32APWR | Lower VCC range (1.65–5.5 V), higher drive strength (24 mA), but no overvoltage tolerance beyond VCC | Required when driving heavier capacitive loads (> 50 pF) or interfacing with 1.8 V systems; lacks 5.5 V input safety | Choose for 1.8 V/3.3 V mixed-signal designs; reject if connecting to unregulated 5 V sources or noisy industrial lines |
Compared with 74AHCT32BQ,115, the AHC variant offers lower static current and wider VCC flexibility but requires higher VIH; versus SN74LVC32APWR, it trades off drive capability for input ruggedness and thermal efficiency in compact packages.
Availability
74AHC32BQ,115 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, medical diagnostic equipment interfaces, and microcontroller peripheral gating requiring stable component supply across extended temperature ranges.
Supply support for 74AHC32BQ,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in industrial and consumer electronics.
The 74AHC series targets high-speed, low-power CMOS logic applications demanding wide supply range, noise immunity, and mixed-voltage interoperability - especially in space-constrained, thermally demanding embedded systems.
FAQ
Can 74AHC32BQ,115 safely interface a 5 V sensor output with a 3.3 V microcontroller?
Yes. Its inputs tolerate up to 5.5 V regardless of VCC, allowing direct connection of 5 V sensor outputs to the IC while powered from 3.3 V. No external level-shifting components are needed, and Schmitt-trigger action suppresses noise from long sensor cables. Input leakage remains below 0.1 μA at 5.5 V, minimizing loading on the source.
What is the recommended PCB layout practice for the exposed thermal pad on the DHVQFN14 package?
The exposed pad (terminal 1 index area) has no electrical requirement to be soldered. If soldered, it must remain electrically floating or be connected to GND - never left as a floating metal island. Use 4–6 thermal vias (0.3 mm diameter) beneath the pad tied to an internal GND plane to enhance thermal conduction without creating solder voids or tombstoning during reflow.
How does propagation delay vary across temperature and supply voltage for timing-critical designs?
At VCC = 4.5–5.5 V and CL = 15 pF, tpd ranges from 2.8 ns (typ.) to 7.0 ns (max) over -40 °C to +125 °C. At VCC = 3.0 V, delay increases to 3.9–10.0 ns. Designers should use the 125 °C max value for worst-case setup/hold analysis, especially in motor control or power supply sequencing applications where ambient exceeds 85 °C.
Is 74AHC32BQ,115 suitable for automotive under-hood applications?
It is rated for -40 °C to +125 °C and meets industrial reliability standards, but it is not AEC-Q100 qualified. While functionally capable in under-hood environments (e.g., engine control auxiliary logic), it lacks automotive-specific qualification testing for vibration, humidity, and lifetime stress. For production automotive ECUs, use only AEC-Q100 qualified equivalents unless approved under customer-specific deviation processes.
74AHC32BQ,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AHC
- Package/Case:
- 14-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 5.5V
- Current - Quiescent (Max):
- 2 µA
- Current - Output High, Low:
- 8mA, 8mA
- Input Logic Level - Low:
- 0.5V ~ 1.65V
- Input Logic Level - High:
- 1.5V ~ 3.85V
- Max Propagation Delay @ V, Max CL:
- 7.5ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DHVQFN (2.5x3)
74AHC32BQ,115 FAQ
1.How can I place an order for 74AHC32BQ,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHC32BQ,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHC32BQ,115 reliable?
The price and inventory of 74AHC32BQ,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHC32BQ,115 is usually 5 days.
3.What payment methods are accepted for 74AHC32BQ,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHC32BQ,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AHC32BQ,115?
74AHC32BQ,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AHC32BQ,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AHC32BQ,115?
For technical support, including 74AHC32BQ,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHC32BQ,115 requirements.
6.How does Aetrix verify that 74AHC32BQ,115 is sourced from the original manufacturer or authorized distributors?
All 74AHC32BQ,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHC32BQ,115 meets industry standards.
7.What is the process for return or replacement of 74AHC32BQ,115?
All 74AHC32BQ,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHC32BQ,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHC32BQ,115 part is unused and in its original packaging.
Return procedure for 74AHC32BQ,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AHC32BQ,115 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…

