Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Nexperia USA Inc. 74AHC374D,118

Part No.:
74AHC374D,118
Manufacturer:
Nexperia USA Inc.
Category:
Flip Flops
Package:
20-SOIC (0.295", 7.50mm Width)
Datasheet:
Aetrix74AHC374D,118.pdf
Description:
IC FF D-TYPE SNGL 8BIT 20SO
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,132

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

74AHC374D,118 from Nexperia is an octal positive-edge-triggered D-type flip-flop with 3-state outputs, designed for data latching and bus interface in digital systems. It operates across 2.0 V to 5.5 V supply, features overvoltage-tolerant inputs up to 5.5 V, and supports industrial temperature range (−40 °C to +125 °C) in SO20 package. Used in microcontroller peripheral interfacing and memory address/data buffering.

For engineers reviewing the 74AHC374D,118 datasheet, 74AHC374D,118 pinout, 74AHC374D,118 application, or 74AHC374D,118 equivalent, key selection criteria include edge-trigger timing (tsu = 3.0 ns @ VCC = 5 V), 3-state enable behavior (OE active LOW), propagation delay (tpd = 4.4 ns typ @ CL = 15 pF), and CMOS-level input compatibility.

Technical Context

This device implements eight independent D-type flip-flops synchronized to the rising edge of CP, each with individual D-input and Q-output, plus a shared OE control that places all outputs in high-impedance state without affecting internal register states. Inputs are overvoltage tolerant and Schmitt-triggered for noise immunity.

It supports mixed-voltage system interfacing via rail-to-rail input tolerance and exhibits balanced tPLH/tPHL propagation delays. The 3-state output architecture enables bidirectional bus sharing, while static current remains below 80 μA at VCC = 5.5 V across full temperature range.

Key Specifications

Parameter Value and Actual Design Meaning
Logic Family 74AHC - advanced high-speed CMOS with TTL-compatible drive strength and low power
Supply Voltage Range 2.0 V to 5.5 V - enables operation across 3.3 V and 5 V systems without level shifters
Propagation Delay (tpd) 4.4 ns (typ) @ VCC = 5 V, CL = 15 pF - ensures sub-5 ns timing margin for 100+ MHz bus clocking
Set-up Time (tsu) 3.0 ns @ VCC = 5 V - defines minimum data stability window before CP rising edge
Output Enable Delay (ten) 3.9 ns (typ) @ VCC = 5 V, CL = 15 pF - determines fastest bus turnaround time when toggling OE
Input Voltage Tolerance −0.5 V to +7.0 V - allows safe interfacing with higher-voltage signals without external clamping
ESD Rating (HBM) >2000 V - meets JEDEC JS-001 Class 2, supporting robust handling in automated assembly

Pinout & Package

74AHC374D,118 is housed in SO20 (SOT163-1) plastic small outline package: 20-pin, 7.5 mm body width, 1.27 mm pitch, gull-wing leads.

Pin/Terminal Circuit Role Design Meaning
1 (OE) 3-state output enable input Active LOW; disables all Q outputs to high-impedance without altering stored flip-flop states
2–9, 12, 15–16, 19 (Q0–Q7) 3-state flip-flop outputs Octal registered outputs; driven HIGH/LOW when OE = LOW, tri-stated when OE = HIGH
3–4, 7–8, 13–14, 17–18 (D0–D7) Data inputs Individual asynchronous data inputs sampled on LOW-to-HIGH CP transition
10 (GND) Ground reference 0 V return path for logic and power; must be low-impedance for noise immunity
11 (CP) Clock input Positive-edge-triggered; initiates synchronous capture of Dn inputs meeting tsu/thold
20 (VCC) Supply voltage Primary power rail; decoupling capacitor required near pin for stable switching performance

Key Features

Feature Design Value
Rail-to-rail input tolerance Inputs withstand −0.5 V to +7.0 V regardless of VCC, enabling safe mixed-voltage signal routing
Wide operating voltage Functional from 2.0 V to 5.5 V - supports both 3.3 V embedded logic and legacy 5 V bus domains
High noise immunity Schmitt-triggered inputs provide hysteresis, rejecting transient noise up to 0.5 V on slow-rising signals
Low static power ICC ≤ 80 μA max @ VCC = 5.5 V, −40 °C to +125 °C - suitable for always-on industrial control modules
Industrial temperature range Specified from −40 °C to +125 °C - qualified for under-hood automotive ECUs and factory automation PLCs

Applications

Microcontroller I/O Expansion Memory Address Latching

Use Scenario: Expanding GPIO count of ARM Cortex-M0+ MCU by latching parallel data from SPI-shifted bytes.

IC Role / Device Role / Timing Role: Octal D-flip-flop acts as synchronous parallel output latch; CP driven by SPI frame sync pulse, OE controlled by chip-select decoding.

Use Value: Enables deterministic 8-bit parallel output update aligned to system clock domain, eliminating metastability in multi-clock zone interfaces.

Use Scenario: Capturing 8-bit segment of 16-bit address bus during multiplexed memory access in 8051-based systems.

IC Role / Device Role / Timing Role: Stores lower address byte on ALE pulse edge; Q outputs drive address latch enable for external RAM/ROM chips.

Use Value: Provides clean, glitch-free address hold during bus contention windows, ensuring reliable memory read/write cycles at 12 MHz system clock.

Industrial Bus Isolation Digital Test Equipment Signal Conditioning

Use Scenario: Isolating Modbus RTU master controller from noisy fieldbus segments using optocoupler-driven 3-state buffers.

IC Role / Device Role / Timing Role: Acts as direction-controlled data register; OE tied to RS-485 transceiver DE/RE lines to gate bidirectional data flow.

Use Value: Prevents bus contention during transceiver state transitions, eliminating data corruption during half-duplex turnaround (ten/tdis < 10 ns).

Use Scenario: Synchronizing asynchronous test pattern generator outputs to a 100 MHz system clock in ATE fixture design.

IC Role / Device Role / Timing Role: Registers incoming stimulus vectors on system clock edge; Q outputs feed FPGA-based comparator logic with precise setup/hold compliance.

Use Value: Eliminates timing violations in high-speed comparison paths, enabling deterministic pass/fail evaluation at 100 MHz test rates.

Equivalent & Alternatives

The following parts are listed as comparable options for similar octal D-type flip-flop applications.

Alternative Part Technical Difference Application Difference Selection Advice
74AHCT374D,118 TTL-compatible inputs (VIH = 2.0 V min); identical pinout, timing, and package Required where driving from 5 V TTL logic; not suitable for 3.3 V-only CMOS systems due to VIH threshold Select when interfacing legacy 5 V TTL buses; avoid in mixed 3.3 V/5 V designs unless level translation is confirmed unnecessary
SN74LVC374APWR Lower VCC range (1.65–3.6 V); 3.3 V optimized; 1.5 ns faster tpd but no 5 V tolerance Designed for modern low-voltage FPGAs and SoCs; lacks overvoltage protection for legacy signal injection Prefer for battery-powered IoT nodes with 3.3 V rails; reject if system includes 5 V peripherals or uncontrolled signal sources

Compared with 74AHC374D,118, the 74AHCT374D,118 offers TTL input compatibility at the cost of reduced low-voltage flexibility, while SN74LVC374APWR delivers superior speed and power efficiency in 3.3 V domains but sacrifices 5 V signal robustness and industrial temperature margin.

Availability

74AHC374D,118 is available at Aetrix Electronics and suitable for industrial control systems, test equipment design, microcontroller peripheral expansion, and memory interface circuits requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AHC374D,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AHC series targets general-purpose digital logic applications demanding wide supply range, low power, and robust ESD performance - specifically engineered for noise-prone industrial environments and mixed-voltage board-level integration.

FAQ

Can 74AHC374D,118 operate reliably at 2.0 V supply?

Yes. The device is fully specified down to 2.0 V supply across −40 °C to +125 °C, with guaranteed tpd ≤ 12.7 ns (CL = 15 pF) and tsu ≥ 4.5 ns. Input thresholds scale with VCC, maintaining correct logic interpretation even at minimum voltage.

What happens to stored data when OE is asserted HIGH?

No change occurs to internal flip-flop states. OE only controls output drivers: asserting OE HIGH forces Q0–Q7 into high-impedance mode while preserving all latched D-input values. Data remains intact and immediately available upon OE deassertion.

Is the SO20 package RoHS-compliant and lead-free?

Yes. 74AHC374D,118 in SOT163-1 (SO20) package meets RoHS Directive 2011/65/EU and is lead-free per JEDEC J-STD-609. Terminal finish is matte tin, compatible with standard SnPb and lead-free reflow profiles.

How does input overvoltage tolerance affect PCB layout?

Overvoltage tolerance (−0.5 V to +7.0 V) eliminates need for external clamping diodes when interfacing with 5 V signals in 3.3 V systems. However, layout must still minimize trace inductance on CP and OE lines to prevent ringing-induced false triggering at high edge rates.

74AHC374D,118 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AHC
Package/Case:
20-SOIC (0.295", 7.50mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Active
Function:
Standard
Type:
D-Type
Output Type:
Tri-State, Non-Inverted
Number of Elements:
1
Number of Bits per Element:
8
Clock Frequency:
120 MHz
Max Propagation Delay @ V, Max CL:
10.1ns @ 5V, 50pF
Trigger Type:
Positive Edge
Current - Output High, Low:
8mA, 8mA
Voltage - Supply:
2V ~ 5.5V
Current - Quiescent (Iq):
4 µA
Input Capacitance:
3 pF
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
20-SO

74AHC374D,118 FAQ

1.How can I place an order for 74AHC374D,118 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AHC374D,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AHC374D,118 reliable?

The price and inventory of 74AHC374D,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHC374D,118 is usually 5 days.

3.What payment methods are accepted for 74AHC374D,118?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHC374D,118 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AHC374D,118?

74AHC374D,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AHC374D,118 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AHC374D,118?

For technical support, including 74AHC374D,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHC374D,118 requirements.

6.How does Aetrix verify that 74AHC374D,118 is sourced from the original manufacturer or authorized distributors?

All 74AHC374D,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHC374D,118 meets industry standards.

7.What is the process for return or replacement of 74AHC374D,118?

All 74AHC374D,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHC374D,118, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AHC374D,118 part is unused and in its original packaging.

Return procedure for 74AHC374D,118:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

74AHC374D,118 Tags

  • 74AHC374D,118
  • 74AHC374D,118 PDF
  • 74AHC374D,118 Datasheet
  • 74AHC374D,118 Specifications
  • 74AHC374D,118 Images
  • Nexperia USA Inc.
  • Nexperia USA Inc. 74AHC374D,118
  • Buy 74AHC374D,118
  • 74AHC374D,118 Price
  • 74AHC374D,118 Distributor
  • 74AHC374D,118 Supplier
  • 74AHC374D,118 Wholesale
Related Products
SN74HC74DR
SN74HC74DR

Texas Instruments

SN74HC74PWR
SN74HC74PWR

Texas Instruments

74LVC1G74GT,115
74LVC1G74GT,115

Nexperia USA Inc.

SN74LVC2G74DCUR
SN74LVC2G74DCUR

Texas Instruments

CD4013BM96
CD4013BM96

Texas Instruments

SN74HCT273PWR
SN74HCT273PWR

Texas Instruments

SN74LVC1G74DCUR
SN74LVC1G74DCUR

Texas Instruments

SN74HC574DWR
SN74HC574DWR

Texas Instruments

74LVC1G74DC,125
74LVC1G74DC,125

Nexperia USA Inc.

SN74HC273DWR
SN74HC273DWR

Texas Instruments

SN74HCT574DWR
SN74HCT574DWR

Texas Instruments

SN74LVC1G74DCTR
SN74LVC1G74DCTR

Texas Instruments

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER