Nexperia USA Inc. 74AHC595BQ,115
- Part No.:
- 74AHC595BQ,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Shift Registers
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
74AHC595BQ,115.pdf
- Description:
- IC 8BIT SRL SHFT REGIST 16-HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74AHC595BQ,115 from Nexperia is an 8-bit serial-in/parallel-out shift register with storage latch and 3-state outputs, operating from 2.0 V to 5.5 V supply. It features separate shift clock (SHCP) and storage clock (STCP), asynchronous master reset (MR), and output enable (OE) for bus isolation. Used in LED matrix drivers and microcontroller GPIO expansion where serial-to-parallel conversion and output latching are required.
For engineers reviewing the 74AHC595BQ,115 datasheet, 74AHC595BQ,115 pinout, 74AHC595BQ,115 application, or 74AHC595BQ,115 equivalent, key selection criteria include propagation delay (≤10.5 ns at 5 V), overvoltage-tolerant inputs (to 5.5 V), -40 °C to +125 °C operation, DHVQFN16 package thermal performance, and TTL-compatible alternatives for mixed-voltage system interfacing.
Technical Context
The device implements two independent synchronous registers: an 8-stage shift register accepting serial data on DS and shifting on SHCP rising edges, and a parallel-output storage register loaded on STCP rising edges. Output states are held stable during shifting, enabling glitch-free updates.
Outputs are actively driven high/low when OE is LOW; a HIGH on OE places all eight Q0–Q7 outputs in high-impedance state without affecting internal register contents. MR asynchronously clears only the shift register, leaving storage register unaffected until next STCP pulse.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 2.0 V to 5.5 V - supports direct interface with 3.3 V and 5 V logic domains without level shifters |
| Propagation delay (tpd) | ≤10.5 ns at VCC = 4.5–5.5 V, CL = 50 pF - enables reliable operation up to 90 MHz in timing-critical cascaded chains |
| Output drive strength | ±8 mA at VCC = 4.5 V - sufficient to directly drive LEDs or standard CMOS/TTL loads without external buffers |
| Input voltage tolerance | Up to 5.5 V regardless of VCC - allows safe use as voltage-level translator in mixed-supply systems |
| Operating temperature | -40 °C to +125 °C - qualified for automotive under-hood and industrial control environments |
| ESD rating | HBM >2000 V, CDM >1000 V - robust handling in automated assembly and field-replaceable modules |
Pinout & Package
DHVQFN16 (SOT763-1) package: 2.5 mm × 3.5 mm × 0.85 mm body, 16-terminal leadless quad flat no-lead construction with exposed thermal pad; optimized for high-density PCB layouts and improved thermal dissipation vs. SO16/TSSOP.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Ground reference for all internal logic and output stages; must be connected to system ground plane |
| 2 | Q7 | MSB parallel output - holds bit shifted into final stage of storage register after STCP edge |
| 3 | MR | Asynchronous master reset (active LOW) - clears shift register only; does not affect storage register or outputs |
| 4 | Q6 | Parallel output - provides stable latch-held value independent of ongoing serial shifting |
| 5 | SHCP | Shift register clock input - rising edge shifts DS data into stage 0 and propagates existing bits toward Q7S |
| 6 | Q5 | Parallel output - enables simultaneous readout of all 8 bits without disturbing shift register operation |
| 7 | STCP | Storage register clock input - rising edge transfers current shift register contents to output latches |
| 8 | Q4 | Parallel output - supports static display hold while new data is being serially loaded |
| 9 | OE | Output enable (active LOW) - controls 3-state output drivers; HIGH disables all Q0–Q7 outputs to prevent bus contention |
| 10 | Q3 | Parallel output - decouples data loading from output update, eliminating output glitches during shift cycles |
| 11 | DS | Serial data input - accepts new bit on each SHCP rising edge; compatible with SPI MOSI or generic GPIO |
| 12 | Q2 | Parallel output - provides deterministic output state during STCP-to-output propagation delay window |
| 13 | Q0 | LSB parallel output - aligned with standard byte-order conventions for MCU software interface |
| 14 | GND | Secondary ground terminal - improves power integrity and reduces ground bounce in high-speed switching |
| 15 | Q7S | Serial output - provides cascaded connection to next 74AHC595BQ,115 DS input for multi-byte shift chains |
| 16 | VCC | Positive supply rail - powers both logic core and output drivers; bypass capacitor required near pin |
Key Features
| Feature | Design Value |
|---|---|
| Overvoltage-tolerant inputs | Accepts up to 5.5 V regardless of VCC level - eliminates need for external clamping diodes in mixed-voltage interconnects |
| Separate shift/storage clocks | Enables concurrent serial loading and parallel output update - critical for flicker-free LED displays and real-time I/O expansion |
| 3-state outputs with OE control | Allows direct connection to shared data buses without external multiplexers or isolation logic |
| Schmitt-trigger inputs | Provides noise immunity on SHCP, STCP, MR, and DS lines - prevents false triggering from slow-rising or noisy control signals |
| Wide temperature range | Specified from -40 °C to +125 °C - meets AEC-Q100 Grade 1 requirements for automotive body electronics |
Applications
| LED Matrix Display Driver | Microcontroller GPIO Expander |
|---|---|
Use Scenario: Driving 8×8 monochrome LED grid using SPI-controlled serial data stream. IC Role / Device Role / Timing Role: Serial-to-parallel converter with output latching; isolates display refresh from CPU data transfer via OE control. Use Value: Eliminates need for 8-bit parallel port; enables precise blanking between frames using MR and OE synchronization. |
Use Scenario: Adding 8 digital output pins to an STM32 MCU with limited GPIO resources. IC Role / Device Role / Timing Role: Latched output expander; accepts SPI commands and holds state independently of host processor activity. Use Value: Reduces firmware overhead by offloading output state retention; supports hot-plug-safe output disable via OE. |
| Cascaded Industrial I/O Module | Remote Control Signal Latch |
Use Scenario: Building 32-bit output bank using four daisy-chained 74AHC595BQ,115 devices. IC Role / Device Role / Timing Role: Cascadable shift register with Q7S-to-DS interconnection; synchronized by common SHCP/STCP lines. Use Value: Achieves deterministic 32-bit update latency (<42 ns worst-case); maintains signal integrity across long PCB traces via controlled impedance routing. |
Use Scenario: Holding IR remote command codes in battery-powered sensor nodes. IC Role / Device Role / Timing Role: Low-power holding register; retains decoded command bits until MCU wakes to process them. Use Value: Draws only 4 μA typical ICC at 5.5 V - extends coin-cell life by minimizing active MCU wake time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial-to-parallel shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AHCT595BQ,115 | TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max) vs. AHC's CMOS thresholds (VIH = 3.85 V at 5.5 V) | Better suited for legacy 5 V microcontrollers with weak pull-ups or open-collector drivers | Select when interfacing with older 8051 or PIC families lacking strong CMOS drive capability |
| SN74HC595PWR | SOIC/TSSOP package only; lower max fmax (25 MHz vs. 90 MHz); no overvoltage tolerance | Limited to board-level designs without thermal constraints or mixed-voltage signaling needs | Prefer for cost-sensitive consumer products where DHVQFN reflow complexity is undesirable |
Compared with 74AHCT595BQ,115, the 74AHC595BQ,115 offers superior noise immunity and wider voltage compatibility but requires stronger input drive; versus SN74HC595PWR, it delivers higher speed, better thermal performance, and robustness in harsh electrical environments.
Availability
74AHC595BQ,115 is available at Aetrix Electronics and suitable for LED display drivers, microcontroller GPIO expansion, industrial I/O modules, and remote control holding registers requiring stable component supply across automotive and industrial temperature ranges.
Supply support for 74AHC595BQ,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions with focus on efficiency, reliability, and miniaturization.
The 74AHC595BQ,115 belongs to Nexperia's advanced logic family designed for low-power, high-speed serial interface bridging in space-constrained and thermally demanding applications.
FAQ
What is the maximum clock frequency supported by the 74AHC595BQ,115?
The 74AHC595BQ,115 supports up to 90 MHz for both SHCP and STCP inputs at VCC = 4.5–5.5 V and TA = -40 °C to +125 °C. This is verified by tW (minimum pulse width) of 5.0 ns and fmax test data in Table 7 of the official Nexperia datasheet Rev. 9.
Can the 74AHC595BQ,115 be used with a 3.3 V microcontroller driving 5 V LEDs?
Yes - its overvoltage-tolerant inputs accept up to 5.5 V regardless of VCC, allowing direct connection of 3.3 V GPIO to SHCP/STCP/OE/MR/DS. Its outputs drive up to 8 mA at 5 V, enabling direct 5 V LED anode control when VCC = 5 V and LEDs are cathode-grounded.
How does the MR (master reset) pin interact with the storage register?
MR asynchronously resets only the 8-stage shift register to zero; it has no effect on the storage register contents or Q0–Q7 output states. The storage register retains its last loaded value until updated by a rising edge on STCP, ensuring output stability during shift register clearing.
Is the exposed thermal pad on the DHVQFN16 package electrically connected?
No - the exposed pad (terminal 1 index area) is a mechanical thermal slug with no electrical connection. Nexperia specifies it may remain floating or be connected to GND per PCB layout requirements, but it carries no signal or power function per SOT763-1 mechanical drawing and datasheet footnote.
74AHC595BQ,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AHC
- Package/Case:
- 16-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Shift Register
- Output Type:
- Tri-State
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Function:
- Serial to Parallel, Serial
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-DHVQFN (2.5x3.5)
74AHC595BQ,115 FAQ
1.How can I place an order for 74AHC595BQ,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHC595BQ,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHC595BQ,115 reliable?
The price and inventory of 74AHC595BQ,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHC595BQ,115 is usually 5 days.
3.What payment methods are accepted for 74AHC595BQ,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHC595BQ,115 transactions.
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4.How is shipping managed for 74AHC595BQ,115?
74AHC595BQ,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AHC595BQ,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AHC595BQ,115?
For technical support, including 74AHC595BQ,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHC595BQ,115 requirements.
6.How does Aetrix verify that 74AHC595BQ,115 is sourced from the original manufacturer or authorized distributors?
All 74AHC595BQ,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHC595BQ,115 meets industry standards.
7.What is the process for return or replacement of 74AHC595BQ,115?
All 74AHC595BQ,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHC595BQ,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHC595BQ,115 part is unused and in its original packaging.
Return procedure for 74AHC595BQ,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AHC595BQ,115 Tags
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SN74HC164DR
Texas Instruments
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SN74HC595DR
Texas Instruments

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74HC595PW,118
Nexperia USA Inc.
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SN74HC165PWR
Texas Instruments

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HEF4094BT,653
Nexperia USA Inc.

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74HC595D,118
Nexperia USA Inc.
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SN74HC595PWR
Texas Instruments

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74HC165D,653
Nexperia USA Inc.
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SN74LV165APWR
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74HC595BQ,115
Nexperia USA Inc.

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74HC165BQ,115
Nexperia USA Inc.
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CD4094BPWR
Texas Instruments
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