Nexperia USA Inc. 74AHCT125BQ-Q100,1
- Part No.:
- 74AHCT125BQ-Q100,1
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 14-VFQFN Exposed Pad
- Datasheet:
-
74AHCT125BQ-Q100,1.pdf
- Description:
- IC BUF NON-INVERT 5.5V 14DHVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,876
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AHCT125BQ-Q100 from Nexperia is an automotive-qualified quad 3-state buffer/line driver with TTL-compatible inputs, operating from 4.5 V to 5.5 V supply, featuring overvoltage-tolerant inputs up to 5.5 V, ±8 mA output drive, and propagation delay as low as 3.0 ns (VCC = 5 V, CL = 15 pF), used for bidirectional bus interfacing in engine control units and ADAS domain controllers.
For engineers reviewing the 74AHCT125BQ-Q100 datasheet, 74AHCT125BQ-Q100 pinout, 74AHCT125BQ-Q100 application, or 74AHCT125BQ-Q100 equivalent, key selection considerations include its AEC-Q100 Grade 1 qualification (-40 °C to +125 °C), DHVQFN14 package with side-wettable flanks, 3-state enable timing (enable/disable < 9.5 ns), and input-level compatibility with legacy 5 V TTL logic in mixed-voltage automotive subsystems.
Technical Context
This device implements four independent non-inverting buffers, each with active-low 3-state output enable (nOE), enabling precise bus contention control in multiplexed data paths. Its TTL-input thresholds (VIH = 2.0 V min, VIL = 0.8 V max at VCC = 4.5–5.5 V) ensure reliable interfacing with legacy microcontrollers and sensor interfaces.
All inputs feature Schmitt-trigger action for noise immunity, and the DHVQFN14 package supports automated optical inspection (AOI) via side-wettable flanks. The device meets AEC-Q100 Grade 1 requirements with latch-up immunity >100 mA and HBM ESD >2000 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 4.5 V to 5.5 V - Ensures stable operation across automotive battery transients (e.g., load dump, cold crank). |
| Input Logic Type | TTL-compatible - Direct interface with 5 V microcontrollers, CAN transceivers, and legacy sensors without level-shifting. |
| Propagation Delay (tpd) | 3.0 ns (typ) at VCC = 5 V, CL = 15 pF - Enables high-speed bus buffering in real-time powertrain communication links. |
| Output Drive Strength | ±8 mA at VOH/VOL - Sufficient to drive 50 pF loads across PCB traces while maintaining signal integrity. |
| Operating Temperature | -40 °C to +125 °C - Qualified for under-hood applications including engine control modules and transmission ECUs. |
| ESD Protection | HBM >2000 V, CDM >1000 V - Robust handling during automotive assembly and field service. |
| AEC-Q100 Grade | Grade 1 - Certified for full automotive temperature range per Automotive Electronics Council requirements. |
Pinout & Package
DHVQFN14 (SOT762-1) package: 2.5 mm × 3.0 mm × 0.85 mm body, no leads, 14 terminals, side-wettable flanks for AOI, thermal-enhanced construction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | nOE (active-low output enable) | Independent control of each buffer's 3-state output; LOW enables output, HIGH forces high-impedance state. |
| 2, 5, 9, 12 | nA (data input) | Non-inverting input for corresponding buffer channel; Schmitt-triggered for noise rejection. |
| 3, 6, 8, 11 | nY (data output) | Buffered, 3-state output; drives bus or downstream logic only when respective nOE is LOW. |
| 7 | GND | Reference ground for all I/O and internal circuitry; decoupling capacitor must be placed adjacent to pin 7. |
| 14 | VCC | Primary power supply; requires local 100 nF ceramic decoupling between pins 14 and 7. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use from -40 °C to +125 °C ambient, including thermal cycling and humidity testing. |
| Overvoltage-tolerant inputs (to 5.5 V) | Allows safe connection to 5 V buses even when VCC is powered down or at lower voltage, preventing back-powering. |
| Side-wettable flanks (DHVQFN14) | Enables automated optical inspection of solder joints on bottom-side terminations, improving manufacturing yield in automotive SMT lines. |
| Balanced propagation delays | tpLH and tpHL match within 0.3 ns (typ), minimizing skew between parallel data lines in time-critical bus applications. |
| CMOS low power dissipation | ICC ≤ 40 μA max at VCC = 5.5 V - Reduces quiescent current in always-on vehicle networks (e.g., LIN, CAN standby). |
Applications
| Engine Control Unit (ECU) Bus Interface | ADAS Camera Sensor Hub |
|---|---|
|
Use Scenario: Isolating and buffering SPI or parallel pixel data lines between image sensor and SoC in a surround-view camera module. IC Role / Device Role / Timing Role: Quad 3-state buffer provides direction-controlled signal routing and prevents bus contention during sensor configuration and frame capture phases. Use Value: Enables clean hot-swap of sensor modules without disrupting master SoC operation, leveraging fast enable/disable (< 9.5 ns) and TTL-compatible inputs matching sensor output levels. |
Use Scenario: Level-translating and driving diagnostic signals from 3.3 V MCU to 5 V actuator test points in radar calibration fixtures. IC Role / Device Role / Timing Role: Acts as a robust, automotive-grade logic translator with overvoltage-tolerant inputs, allowing safe connection to unpowered 5 V test nodes. Use Value: Eliminates need for discrete level-shifters; input tolerance to 5.5 V prevents damage during probe contact before system power-up. |
| Body Control Module (BCM) I/O Expansion | Electric Power Steering (EPS) Motor Driver Interface |
|
Use Scenario: Expanding GPIO count of a low-pin-count MCU to drive multiple LED indicators and relay drivers in door control modules. IC Role / Device Role / Timing Role: Provides buffered, 3-state outputs that can be individually disabled to isolate failed outputs without affecting other channels. Use Value: Supports fail-safe diagnostics: any output short can be isolated by asserting its nOE, preserving functionality of remaining three buffers. |
Use Scenario: Buffering PWM and direction signals from EPS MCU to gate drivers in motor inverter stages. IC Role / Device Role / Timing Role: Delivers low-skew, high-drive-strength signals with sub-10 ns enable timing to synchronize dual half-bridge gate drivers. Use Value: Tight propagation delay matching (≤0.3 ns skew) ensures simultaneous MOSFET switching, reducing shoot-through risk in high-efficiency motor control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AHCT125PW-Q100 | TSSOP14 package (4.4 mm width); no side-wettable flanks; same electrical specs. | Suitable for manual rework or legacy PCBs with TSSOP footprints; lacks AOI support for high-volume automotive SMT. | Select when board layout constraints require wider pitch or hand-soldering capability. |
| SN74AHCT125QPWRQ1 | Texas Instruments part; identical function, AEC-Q100 Grade 1, but uses different thermal pad design and JEDEC MO-153 footprint. | Requires PCB redesign due to different thermal pad geometry and terminal spacing; not drop-in compatible with SOT762-1. | Choose only if TI supply chain alignment or specific TI ecosystem integration is required. |
Compared with 74AHCT125PW-Q100, the BQ variant offers superior manufacturability in high-reliability automotive lines via AOI-enabled side-wettable flanks; versus SN74AHCT125QPWRQ1, it delivers identical performance with Nexperia's optimized thermal resistance (125 K/W junction-to-case) and smaller 2.5 × 3 mm footprint.
Availability
74AHCT125BQ-Q100 is available at Aetrix Electronics and suitable for engine control units, ADAS sensor hubs, and electric power steering systems requiring stable component supply across extended automotive temperature ranges and long production lifecycles.
Supply support for 74AHCT125BQ-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading semiconductor manufacturer headquartered in Nijmegen, Netherlands, specializing in high-performance, high-reliability logic, analog, and discrete components for automotive, industrial, and consumer markets.
The 74AHCT series targets automotive signal integrity applications, delivering TTL-compatible logic with AEC-Q100 qualification, robust ESD protection, and thermally enhanced packaging for under-hood and safety-critical subsystems.
FAQ
What is the maximum clock frequency this device can reliably buffer?
The 74AHCT125BQ-Q100 is not a clock-specific device but a general-purpose buffer. Its propagation delay (3.0 ns typ at 5 V) supports data rates up to ~160 MHz for single-bit signals under ideal loading (CL = 15 pF). For sustained high-frequency bus operation, ensure trace impedance control and proper termination to avoid ringing-induced timing violations.
Can this device interface between 3.3 V and 5 V logic domains?
No - the 74AHCT125BQ-Q100 requires VCC = 4.5–5.5 V and has TTL input thresholds, so it cannot accept 3.3 V logic-high signals reliably (VIH min = 2.0 V, but margin is insufficient for robust 3.3 V CMOS interfacing). Use 74AHC125BQ-Q100 instead for true 3.3 V–5 V translation with CMOS input thresholds.
Is the exposed thermal pad (pin 1) required to be soldered to ground?
No - the exposed pad (terminal 1 index area) has no electrical function. Per datasheet note, it may remain unsoldered, or if soldered, must be left floating or connected to GND. It serves only mechanical and thermal purposes; grounding is optional and does not affect electrical performance.
Does this part support hot insertion into a live 5 V bus?
Yes - its overvoltage-tolerant inputs (rated to 5.5 V regardless of VCC state) and high-impedance OFF-state (IOZ ≤ ±10 μA at VCC = 0 V) allow safe connection to an energized 5 V bus. However, VCC must be powered before enabling outputs to avoid undefined behavior during power sequencing.
74AHCT125BQ-Q100,1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AHCT
- Package/Case:
- 14-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DHVQFN (2.5x3)
74AHCT125BQ-Q100,1 FAQ
1.How can I place an order for 74AHCT125BQ-Q100,1 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHCT125BQ-Q100,1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHCT125BQ-Q100,1 reliable?
The price and inventory of 74AHCT125BQ-Q100,1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHCT125BQ-Q100,1 is usually 5 days.
3.What payment methods are accepted for 74AHCT125BQ-Q100,1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHCT125BQ-Q100,1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AHCT125BQ-Q100,1?
74AHCT125BQ-Q100,1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AHCT125BQ-Q100,1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AHCT125BQ-Q100,1?
For technical support, including 74AHCT125BQ-Q100,1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHCT125BQ-Q100,1 requirements.
6.How does Aetrix verify that 74AHCT125BQ-Q100,1 is sourced from the original manufacturer or authorized distributors?
All 74AHCT125BQ-Q100,1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHCT125BQ-Q100,1 meets industry standards.
7.What is the process for return or replacement of 74AHCT125BQ-Q100,1?
All 74AHCT125BQ-Q100,1 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHCT125BQ-Q100,1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHCT125BQ-Q100,1 part is unused and in its original packaging.
Return procedure for 74AHCT125BQ-Q100,1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AHCT125BQ-Q100,1 Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

