Nexperia USA Inc. 74AHCT374D,118
- Part No.:
- 74AHCT374D,118
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
74AHCT374D,118.pdf
- Description:
- IC FF D-TYPE SNGL 8BIT 20SO
- Quantity:
- Payment:

- Shipping:

Inventory:2,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AHCT374D,118 from Nexperia is an octal positive-edge-triggered D-type flip-flop with 3-state outputs, designed for data latching and bus isolation in digital systems. It operates at 4.5 V to 5.5 V, features TTL-compatible inputs, overvoltage-tolerant I/O up to 5.5 V, and supports industrial temperature range (−40 °C to +125 °C). Used in microcontroller peripheral interfacing, memory address latching, and bidirectional bus control.
For engineers reviewing the 74AHCT374D,118 datasheet, 74AHCT374D,118 pinout, 74AHCT374D,118 application, or 74AHCT374D,118 equivalent, this page delivers verified functional behavior, SO20 package mapping, timing parameters (tpd = 4.3 ns @ 5 V, CL = 15 pF), 3-state enable logic, and real-world use cases - all grounded in Nexperia's Rev. 4 product data sheet (2023).
Technical Context
This device implements eight independent D-type flip-flops synchronized to the LOW-to-HIGH transition of CP, with asynchronous 3-state control via active-LOW OE. Each flip-flop samples its D-input only on clock edge, meeting setup (tsu = 2.5 ns) and hold (th = 2.5 ns) requirements at 5 V.
The 3-state output architecture allows shared-bus operation without external bus transceivers; OE assertion forces Q0–Q7 into high-impedance regardless of clock or data state. Input tolerance to 5.5 V enables safe interfacing with mixed-voltage domains, while Schmitt-trigger inputs improve noise immunity on slow-rising signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | 74AHCT - TTL-compatible input thresholds (VIH = 2.0 V, VIL = 0.8 V @ 5 V) enabling direct connection to legacy 5 V TTL logic. |
| Supply Voltage Range | 4.5 V to 5.5 V - ensures stable operation across standard 5 V ±10 % rails; not rated below 4.5 V. |
| Propagation Delay (tpd) | 4.3 ns (typ) / 9.4 ns (max) @ VCC = 5 V, CL = 15 pF - determines maximum synchronous data throughput in latch chains. |
| 3-State Enable Time (ten) | 3.5 ns (typ) / 10.2 ns (max) @ VCC = 5 V, CL = 15 pF - defines minimum time from OE deassertion to valid output drive capability. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules, industrial PLCs, and extended-range embedded controllers. |
| Input Overvoltage Tolerance | 5.5 V absolute max on all inputs - permits safe hot-plug or level-shifting use with 3.3 V/5 V mixed-signal buses. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - meets JEDEC JS-001/JS-002 Class 2/C3 for robust handling in automated assembly lines. |
Pinout & Package
74AHCT374D,118 is supplied in a plastic small outline package (SO20, SOT163-1) with 20 leads and 7.5 mm body width. Pin 1 is marked by a beveled corner or dot; pin numbering follows standard counter-clockwise layout from top-left.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OE) | 3-state output enable (active LOW) | Asynchronous control: drives all Q outputs to high-Z when HIGH; no effect on internal flip-flop states. |
| 2–9, 12, 15–16, 19 (Q0–Q7) | Octal 3-state output | Individually latched data outputs; each floats when OE = HIGH, driven to logic level when OE = LOW. |
| 3–4, 7–8, 13–14, 17–18 (D0–D7) | Data input | Independent D-inputs sampled on rising CP edge; Schmitt-trigger inputs reject noise on slow transitions. |
| 10 (GND) | Ground reference | 0 V return path for all internal circuitry and I/O; must be low-impedance for stable timing and noise immunity. |
| 11 (CP) | Clock input | Positive-edge-triggered master clock; LOW-to-HIGH transition captures Dn values meeting tsu/th timing windows. |
| 20 (VCC) | Supply voltage | Primary power rail (4.5–5.5 V); decoupling capacitor (100 nF) required near pin for transient current stability. |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible input thresholds | VIH = 2.0 V min, VIL = 0.8 V max @ 5 V - eliminates need for external level shifters when interfacing with legacy 5 V TTL drivers. |
| Overvoltage-tolerant I/O | Withstands up to 5.5 V on all pins regardless of VCC - enables safe use in partial-power-down or hot-swap scenarios. |
| Industrial temperature range | Specified from −40 °C to +125 °C - supports deployment in engine control units, motor drives, and outdoor telecom equipment. |
| Balanced propagation delays | tpLH and tpHL match within 0.5 ns @ 5 V - ensures minimal skew between parallel data paths in high-speed latch applications. |
| Low dynamic power consumption | CPD = 12 pF - limits switching power dissipation (PD = CPD × VCC² × fi × N) in high-frequency bus buffering. |
Applications
| Microcontroller Bus Interface | Memory Address Latching |
|---|---|
Use Scenario: Isolating an 8-bit microcontroller data bus from peripheral devices during read/write cycles. IC Role / Device Role / Timing Role: Acts as a transparent data latch synchronized to MCU WR signal, holding address/data stable during memory access. Use Value: Enables reliable handshaking with slower peripherals using single-cycle strobe timing; 3-state outputs prevent bus contention during idle periods. |
Use Scenario: Capturing and holding upper address bits for multiplexed address/data buses (e.g., Intel 8086-style systems). IC Role / Device Role / Timing Role: Latches A8–A15 on ALE pulse edge, freeing address lines for data transfer in subsequent cycle phases. Use Value: Reduces external component count versus discrete latch + buffer solutions; TTL compatibility ensures direct interface with 8086-family CPUs. |
| Industrial I/O Expansion | Digital Signal Routing |
Use Scenario: Buffering and isolating digital I/O lines in programmable logic controller (PLC) backplane modules. IC Role / Device Role / Timing Role: Provides galvanically isolated (via PCB layout) data staging between field-side sensors and CPU-side processing. Use Value: High noise immunity (Schmitt-trigger inputs) rejects EMI from solenoids/motors; 125 °C rating supports compact, fanless enclosures. |
Use Scenario: Dynamically routing sensor data streams between multiple ADC channels and a shared serial interface. IC Role / Device Role / Timing Role: Selectively enables one of eight parallel data paths to a common SPI/MICROWIRE bus using OE-controlled 3-state outputs. Use Value: Eliminates mechanical switches or analog muxes; sub-10 ns enable/disable times support rapid channel switching at >10 MHz rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal D-type latch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AHC374D,118 | CMOS input thresholds (VIH = 3.85 V @ 5.5 V); wider VCC range (2.0–5.5 V); lower ICC (4 μA typ) | Suitable for mixed 3.3 V/5 V systems where input levels follow CMOS logic, not TTL | Select when interfacing with 3.3 V FPGAs or ARM microcontrollers with CMOS I/O; avoid if driving from legacy 5 V TTL. |
| SN74ACT374N | TTL-compatible inputs (VIH = 2.0 V), same 5 V operation; PDIP-20 package; higher ICC (8 μA typ) | Through-hole mounting for prototyping or legacy board repair; identical timing but larger footprint | Choose for breadboard development or replacement in existing through-hole designs; not recommended for new surface-mount layouts. |
Compared with 74AHC374D,118 and SN74ACT374N, the 74AHCT374D,118 uniquely balances TTL-level compatibility, SO20 surface-mount efficiency, and industrial temperature resilience - making it optimal for volume-manufactured 5 V embedded systems requiring bus integrity and long-term reliability.
Availability
74AHCT374D,118 is available at Aetrix Electronics and suitable for microcontroller bus interfaces, memory address latching, industrial I/O expansion, and digital signal routing requiring stable component supply across automotive, industrial, and communications end markets.
Supply support for 74AHCT374D,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET components for automotive, industrial, and consumer applications.
The 74AHCT374 belongs to Nexperia's industry-standard 74-series logic family, engineered for interoperability with legacy TTL systems while delivering modern CMOS efficiency, thermal robustness, and ESD resilience.
FAQ
Can 74AHCT374D,118 operate at 3.3 V?
No. The 74AHCT374 variant is specified only for 4.5 V to 5.5 V supply operation per Table 5 of the datasheet. At 3.3 V, VIH and VIL thresholds fall outside guaranteed switching ranges, risking metastability or failure to recognize logic levels. Use 74AHC374D,118 instead for 3.3 V systems.
What is the maximum clock frequency supported?
The maximum operating frequency is 140 MHz (typical) at VCC = 5 V and CL = 15 pF, derived from tpd = 4.3 ns and minimum pulse width tW = 6.5 ns. Derate to 75 MHz under worst-case conditions (−40 °C to +125 °C, CL = 50 pF) per Table 7.
Is the output enable (OE) pin synchronous or asynchronous?
OE is fully asynchronous: asserting OE = HIGH immediately places Q0–Q7 into high-impedance, regardless of CP state or timing. Internal flip-flop states remain unchanged and are preserved until next clock edge, enabling glitch-free bus release.
Does this device support hot-swap insertion?
Yes - all inputs and outputs tolerate up to 5.5 V independent of VCC, and the device exhibits no latch-up per JEDEC JESD78 testing. However, VCC must be ramped before applying input signals, and GND must make first contact per IEC 61000-4-2 guidelines for full hot-swap compliance.
74AHCT374D,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AHCT
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Tri-State, Non-Inverted
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Clock Frequency:
- 130 MHz
- Max Propagation Delay @ V, Max CL:
- 10.4ns @ 5V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 3 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SO
74AHCT374D,118 FAQ
1.How can I place an order for 74AHCT374D,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AHCT374D,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AHCT374D,118 reliable?
The price and inventory of 74AHCT374D,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AHCT374D,118 is usually 5 days.
3.What payment methods are accepted for 74AHCT374D,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AHCT374D,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AHCT374D,118?
74AHCT374D,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AHCT374D,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AHCT374D,118?
For technical support, including 74AHCT374D,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AHCT374D,118 requirements.
6.How does Aetrix verify that 74AHCT374D,118 is sourced from the original manufacturer or authorized distributors?
All 74AHCT374D,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AHCT374D,118 meets industry standards.
7.What is the process for return or replacement of 74AHCT374D,118?
All 74AHCT374D,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74AHCT374D,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AHCT374D,118 part is unused and in its original packaging.
Return procedure for 74AHCT374D,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AHCT374D,118 Tags
-
SN74HC74DR
Texas Instruments

-
SN74HC74PWR
Texas Instruments

-
74LVC1G74GT,115
Nexperia USA Inc.

-
SN74LVC2G74DCUR
Texas Instruments
-
CD4013BM96
Texas Instruments

-
SN74HCT273PWR
Texas Instruments

-
SN74LVC1G74DCUR
Texas Instruments

-
SN74HC574DWR
Texas Instruments
-
74LVC1G74DC,125
Nexperia USA Inc.

-
SN74HC273DWR
Texas Instruments

-
SN74HCT574DWR
Texas Instruments

-
SN74LVC1G74DCTR
Texas Instruments
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…

