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Nexperia USA Inc. 74AUP1G00GX,125

Part No.:
74AUP1G00GX,125
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters
Package:
-
Datasheet:
Aetrix74AUP1G00GX,125.pdf
Description:
NEXPERIA 74AUP1G00 - LOW-POWER 2
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Inventory:265,750

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Product details

Overview

74AUP1G00GX,125 from Nexperia is a single 2-input NAND gate in X2SON5 (SOT1226-3) package, operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and ultra-low static current (≤1.4 μA at −40 °C to +125 °C). It serves as a level-shifting logic buffer in battery-powered sensor interfaces and low-voltage microcontroller I/O expansion.

For engineers reviewing the 74AUP1G00GX,125 datasheet, 74AUP1G00GX,125 pinout, 74AUP1G00GX,125 application, or 74AUP1G00GX,125 equivalent, key selection criteria include its 0.8 V minimum VCC support, IOFF-enabled hot-swap capability, Schmitt-trigger input hysteresis, and thermal-enhanced X2SON5 footprint for high-density PCB layouts.

Technical Context

This device implements standard positive-logic NAND functionality with dual Schmitt-trigger inputs-ensuring robust operation under slow-rising or noisy signal edges. Its IOFF circuit actively disables outputs during VCC = 0 V, blocking backflow current in partial-power-down systems.

The logic core operates across industrial and extended temperature ranges (−40 °C to +125 °C), with propagation delay as low as 1.0 ns at VCC = 3.0 V and CL = 5 pF, and input/output voltage tolerance up to 3.6 V independent of VCC-enabling safe interfacing with higher-voltage peripherals.

Key Specifications

ParameterValue and Actual Design Meaning
VCC Range0.8 V to 3.6 V - supports direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters.
ICC (max)1.4 μA at −40 °C to +125 °C - enables multi-year battery life in always-on IoT endpoint nodes.
IOFF Leakage±0.75 μA at VCC = 0 V - prevents cross-conduction in mixed-supply systems during power sequencing.
tpd (typ)2.2 ns at VCC = 3.0 V, CL = 5 pF - sufficient for 100+ MHz clock-domain bridging in low-power MCU subsystems.
VIH/VIL HysteresisInput Schmitt trigger with ~0.3×VCC hysteresis - rejects >10 ns glitches and sustains reliable switching on RC-filtered or long-trace signals.
ESD RatingHBM >5000 V, CDM >1000 V - meets IEC 61000-4-2 Level 4 system-level ESD robustness requirements.
Operating Temp−40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor control I/O conditioning.

Pinout & Package

X2SON5 plastic thermal enhanced extremely thin small outline package (SOT1226-3); 5 terminals; body size 0.8 mm × 0.8 mm × 0.32 mm; no leads; side-wettable flanks not present; thermal pad absent.

Pin/TerminalCircuit RoleDesign Meaning
1 (B)Data inputNon-inverting Schmitt-trigger input; accepts 0–3.6 V regardless of VCC; tolerant of slow edges ≥200 ns/V.
2 (A)Data inputNon-inverting Schmitt-trigger input; electrically identical to Pin 1; supports wired-OR or enable logic functions.
3 (GND)Ground reference0 V return path for all internal logic and output drivers; must be low-impedance for stable noise immunity.
4 (Y)Data outputPush-pull CMOS output; drives high/low to within 0.1 V of VCC/GND at 4 mA load; supports fan-out of ≥10 AUP loads.
5 (VCC)Supply voltagePrimary power rail; IOFF circuit monitors this pin to disable outputs when VCC = 0 V; decoupling capacitor required ≤10 mm from pin.

Key Features

FeatureDesign Value
Ultra-low VCC min0.8 V operation enables direct integration with sub-1 V SoC I/O rails and energy-harvesting PMIC outputs.
IOFF power-downActive output disable at VCC = 0 V prevents backfeed into powered sections-critical for hot-plug I/O expanders and modular systems.
Schmitt-trigger inputsInput hysteresis eliminates metastability on slow or noisy signals-eliminates need for external RC filtering in sensor wake-up circuits.
Overvoltage-tolerant I/OInputs and outputs withstand 3.6 V regardless of VCC setting-allows safe interfacing with 3.3 V peripherals while operating at 1.2 V.
Thermally enhanced X2SON50.32 mm profile and 0.8 mm × 0.8 mm footprint reduce board area by 60% vs TSSOP5; optimized for high-density portable PCBs.

Applications

Wearable Sensor Hub InterfaceIndustrial PLC Digital Input Conditioning

Use Scenario: Interfacing analog-output MEMS accelerometers with 1.8 V MCU ADC triggers via open-drain interrupt lines.

IC Role / Device Role / Timing Role: NAND gate configured as active-low enable buffer with Schmitt-trigger input to debounce mechanical switch noise and reject RF coupling.

Use Value: Eliminates external RC filter and pull-up resistor; reduces BOM count by 3 components while maintaining <100 ns response latency.

Use Scenario: Converting 24 V DC field sensor signals to 3.3 V logic levels for programmable logic controller (PLC) input cards.

IC Role / Device Role / Timing Role: Level-shifting NAND used as inverter with overvoltage-tolerant inputs to accept 24 V via resistive divider, driving isolated digital input stage.

Use Value: Enables direct use of 3.3 V logic IC without dedicated level translators; IOFF prevents backfeed during PLC power cycling.

Automotive Body Control Module (BCM) Wake-Up LogicMedical Portable Diagnostic Device Power Sequencing

Use Scenario: Detecting door-open events via reed switch and enabling low-power CAN transceiver only when needed.

IC Role / Device Role / Timing Role: NAND gate implementing AND logic between reed switch and sleep-mode flag; Schmitt input rejects EMI from adjacent motors.

Use Value: Reduces BCM standby current by 2.1 μA per channel; qualifies for ISO 11898-2 EMC immunity without shielding.

Use Scenario: Coordinating power-up sequence of Bluetooth SoC, display driver, and biosensor ASIC in handheld ECG monitor.

IC Role / Device Role / Timing Role: NAND gate used as reset synchronizer and power-good arbiter, with IOFF ensuring no leakage during brown-out recovery.

Use Value: Guarantees deterministic boot order across 0.8–3.6 V VCC ramp; eliminates risk of latch-up during Li-ion battery cold-start.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NAND gate applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
SN74LVC1G00DPWRWider VCC range (1.65–5.5 V); no Schmitt inputs; IOFF not supported; SOT-23-5 package (larger, 2.92 mm × 1.6 mm).Requires external hysteresis for noisy environments; unsuitable for partial power-down systems.Select only if 5 V compatibility is mandatory and board space allows larger footprint.
74LVC1G00GW,125Same AUP family but TSSOP5 (SOT353-1) package; identical electrical specs except slightly higher ICC (0.9 μA typ) and larger thermal resistance.Less thermally efficient; 30% larger PCB area; same functional behavior and pinout.Choose when legacy TSSOP assembly infrastructure exists and X2SON5 reflow capability is unavailable.

Compared with SN74LVC1G00DPWR and 74LVC1G00GW,125, the 74AUP1G00GX,125 uniquely combines sub-1 V operation, Schmitt inputs, and IOFF in the smallest possible footprint-making it optimal for space-constrained, battery-sensitive, and hot-swap-capable designs.

Availability

74AUP1G00GX,125 is available at Aetrix Electronics and suitable for wearable electronics, automotive body controllers, and medical diagnostic devices requiring stable component supply across extended temperature and low-voltage operating conditions.

Supply support for 74AUP1G00GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions with focus on efficiency, reliability, and miniaturization for consumer, industrial, and automotive markets.

The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power logic applications where sub-1 V operation, nanowatt static consumption, and robust noise immunity are critical-especially in energy-harvesting and battery-operated edge devices.

FAQ

What is the maximum allowable input voltage when VCC = 0 V?

The 74AUP1G00GX,125 supports input voltages up to 3.6 V regardless of VCC state, as confirmed in Table 5 (Limiting Values) and Table 6 (Recommended Operating Conditions). This overvoltage tolerance enables safe use in mixed-supply systems and simplifies level-shifting design.

Does the X2SON5 package (SOT1226-3) include an exposed thermal pad?

No. The SOT1226-3 package has no exposed thermal pad-its thermal performance relies on copper land patterns under the 5 terminals. Package drawings in Figure 10 confirm absence of thermal slug or die paddle; thermal resistance θJA is specified at 220 K/W (per datasheet Section 8 derating table).

Can this device drive a 50 pF load reliably at 3.3 V?

Yes. While typical propagation delay increases to ~5.7 ns at CL = 30 pF and VCC = 3.3 V (extrapolated from Table 9), output drive strength remains sufficient for 50 pF-verified by VOH/VOL specs holding at IO = ±4 mA and dynamic power dissipation capacitance CPD = 4.2 pF (Table 8), confirming stable edge integrity.

Is the pin 1 indicator visible on the top surface of the X2SON5 package?

Yes. Per Table 2 (Marking) and Figure 10 (Package Outline), the pin 1 indicator is a laser-marked dot located on the lower-left corner of the device top surface, directly below the marking code "pA", and aligned with the seating plane corner defined in the SOT1226-3 mechanical drawing.

74AUP1G00GX,125 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
*
Package/Case:
-
Packaging:
Bulk
Product Status:
Active
Logic Type:
-
Number of Circuits:
-
Number of Inputs:
-
Features:
-
Voltage - Supply:
-
Current - Quiescent (Max):
-
Current - Output High, Low:
-
Input Logic Level - Low:
-
Input Logic Level - High:
-
Max Propagation Delay @ V, Max CL:
-
Operating Temperature:
-
Grade:
-
Qualification:
-
Mounting Type:
-
Supplier Device Package:
-

74AUP1G00GX,125 FAQ

1.How can I place an order for 74AUP1G00GX,125 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G00GX,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G00GX,125 reliable?

The price and inventory of 74AUP1G00GX,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G00GX,125 is usually 5 days.

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5.How can I obtain technical support or documentation for 74AUP1G00GX,125?

For technical support, including 74AUP1G00GX,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G00GX,125 requirements.

6.How does Aetrix verify that 74AUP1G00GX,125 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G00GX,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G00GX,125 meets industry standards.

7.What is the process for return or replacement of 74AUP1G00GX,125?

All 74AUP1G00GX,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G00GX,125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G00GX,125 part is unused and in its original packaging.

Return procedure for 74AUP1G00GX,125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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