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Nexperia USA Inc. 74AUP1G02GF,132

Part No.:
74AUP1G02GF,132
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G02GF,132.pdf
Description:
IC GATE NOR 1CH 2-INP 6XSON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,436

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Product details

Overview

74AUP1G02GF,132 from Nexperia is a single 2-input NOR gate logic IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering 0.9 μA max ICC at 25 °C, 3.4 ns max propagation delay at 3.6 V/5 pF, and IOFF-enabled partial power-down protection. It serves as a noise-immune signal combiner in low-voltage sensor interface and battery-powered control circuits.

For engineers reviewing the 74AUP1G02GF,132 datasheet, 74AUP1G02GF,132 pinout, 74AUP1G02GF,132 application, or 74AUP1G02GF,132 equivalent, key selection criteria include its ultra-low static current, rail-to-rail input tolerance up to 3.6 V, guaranteed operation down to 0.8 V, and thermal-enhanced XSON6 (SOT891) package compatibility with automated optical inspection.

Technical Context

This device implements complementary metal-oxide-semiconductor (CMOS) logic with Schmitt-trigger input thresholds-VIH ≥ 0.65×VCC and VIL ≤ 0.35×VCC over 0.9–1.95 V VCC-to reject slow-rising noise on input lines. Its IOFF circuit actively disables outputs during VCC = 0 V, limiting backflow current to ±0.75 μA.

Dynamic performance is characterized by load-dependent propagation delay: 3.4 ns max at VCC = 3.6 V and CL = 5 pF, scaling to 6.4 ns at CL = 30 pF; CPD is 4.1 pF at 3.6 V, enabling precise dynamic power estimation via PD = CPD × VCC² × fi × N.

Key Specifications

Parameter Value and Actual Design Meaning
Supply voltage range 0.8 V to 3.6 V - supports direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters
Max ICC (static) 0.9 μA at −40 °C to +125 °C - enables multi-year battery life in always-on IoT endpoint nodes
Propagation delay (tpd) 3.4 ns max at VCC = 3.6 V, CL = 5 pF - sufficient for <300 MHz toggle rates in synchronous control paths
IOFF leakage ±0.75 μA at VCC = 0 V - prevents bus contention and unintended current paths during hot-swap or sleep mode
Input voltage tolerance −0.5 V to +4.6 V - allows safe connection to 3.6 V signals even when VCC = 0.8 V
Operating temperature −40 °C to +125 °C - qualified for under-hood automotive and industrial motor-control environments
ESD rating (HBM) 5000 V - exceeds JEDEC JS-001 Class 3A, reducing board-level ESD protection component count

Pinout & Package

XSON6 package (SOT891), plastic extremely thin small outline, no leads, 6 terminals, body size 1.0 × 1.0 × 0.35 mm - optimized for high-density PCB layouts and reflow-compatible assembly.

Pin/Terminal Circuit Role Design Meaning
A Data input 1 Schmitt-triggered; accepts 0–3.6 V regardless of VCC; immune to slow edges and ground bounce
B Data input 2 Identical electrical behavior to Pin A; both inputs fully overvoltage tolerant
GND Ground reference 0 V return path for all internal logic and output drivers; must be low-impedance for noise immunity
n.c. No connect Internally unconnected terminal; left floating per design-no external tie required
VCC Supply voltage Primary power rail; powers internal logic and output stage; supports IOFF when driven to 0 V
Y Output (NOR function) Active-low open-drain compatible output; drives H/L based on A+B logic; VOL ≤ 0.45 V at 4 mA

Key Features

Feature Design Value
Wide VCC range 0.8 V to 3.6 V enables single part number deployment across 1.2 V microcontrollers, 1.8 V FPGAs, and 3.3 V peripherals
Schmitt-trigger inputs Hysteresis ≥ 0.3×VCC ensures clean switching on noisy or slow-rising sensor or switch inputs
IOFF partial power-down Blocks current flow between powered and unpowered sections-critical for PCIe hot-plug and modular system designs
Low-noise switching Overshoot/undershoot <10 % of VCC reduces EMI and eliminates need for external RC snubbers
High ESD robustness HBM 5000 V / CDM 1000 V allows handling without special ESD precautions in standard assembly lines

Applications

Industrial Sensor Interface Portable Medical Device Control

Use Scenario: Combining limit switch and fault signal in a handheld infusion pump controller.

IC Role / Device Role / Timing Role: Dual-input NOR gate performing active-low OR logic to assert a global fault flag when either input goes low.

Use Value: Ultra-low ICC extends battery runtime; Schmitt inputs tolerate contact bounce and cable-induced noise without debounce firmware.

Use Scenario: Enabling/disabling LED indicators and buzzer drivers in a wearable glucose monitor.

IC Role / Device Role / Timing Role: Signal combiner that gates user-alert outputs only when both system-ready and alarm-active signals are asserted.

Use Value: IOFF prevents backfeed from 3.3 V indicator rails into a sleeping 1.2 V MCU domain, eliminating cross-power-supply leakage.

Automotive Body Control Module IoT Edge Node Power Sequencing

Use Scenario: Interlocking door lock actuator enable with ignition status in a 12 V vehicle subsystem.

IC Role / Device Role / Timing Role: Level-translating NOR gate accepting 5 V ignition sense and 3.3 V microcontroller output to drive a 12 V level-shifter input.

Use Value: Input overvoltage tolerance to 3.6 V allows direct connection to 5 V pull-ups; −40 °C to +125 °C rating meets AEC-Q100 Grade 1 requirements.

Use Scenario: Coordinating wake-up sequence of BLE SoC, environmental sensor, and flash memory in a smart meter.

IC Role / Device Role / Timing Role: Synchronization gate ensuring memory power is enabled only after sensor initialization completes.

Use Value: 3.4 ns tpd provides deterministic timing margin; 0.35 mm profile fits beneath stacked SiP modules in space-constrained enclosures.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NOR gate applications.

Alternative Part Technical Difference Application Difference Selection Advice
74LVC1G02GW,125 Wider VCC range (1.65–5.5 V); higher ICC (max 10 μA); no IOFF; TSSOP5 package Requires level shifting below 1.65 V; unsuitable for partial power-down systems Select when interfacing with 5 V legacy peripherals and board space permits larger TSSOP5 footprint
SN74AUP1G02DBVR Same AUP family specs but TI-branded; identical 0.8–3.6 V range, IOFF, and X2SON5 (SOT23-5) package Pinout differs: VCC and GND swapped vs. Nexperia's SOT891; requires layout revision Choose only if TI supply chain assurance or dual-sourcing strategy mandates TI branding

Compared with 74LVC1G02GW,125 and SN74AUP1G02DBVR, the 74AUP1G02GF,132 uniquely combines sub-1 μA static current, guaranteed −40 °C to +125 °C operation, and XSON6 (SOT891) thermal-enhanced packaging-making it optimal for compact, long-life, thermally demanding embedded nodes.

Availability

74AUP1G02GF,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical devices, automotive body control modules, and IoT edge node power sequencing requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G02GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading Dutch semiconductor manufacturer specializing in high-volume logic, analog, and discrete components, with core expertise in energy-efficient, automotive-qualified silicon.

The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and thermally constrained applications where nanowatt static consumption, wide VCC flexibility, and robust IOFF behavior are mandatory design requirements.

FAQ

What is the maximum allowable input voltage when VCC = 0 V?

The absolute maximum input voltage is −0.5 V to +4.6 V regardless of VCC state. When VCC = 0 V, VI may safely reach +3.6 V due to overvoltage-tolerant input structure-enabling hot insertion into live backplanes without damage or latch-up risk.

Does the 74AUP1G02GF,132 support true bidirectional signal routing?

No-it is a unidirectional NOR gate with defined inputs (A, B) and output (Y). The n.c. pin is internally unconnected; no internal feedback path exists. Bidirectional use would require external isolation circuitry or a dedicated bus transceiver.

How does the Schmitt-trigger input improve noise immunity compared to standard CMOS inputs?

Schmitt-trigger inputs provide hysteresis: VIH is ≥ 0.65×VCC and VIL is ≤ 0.35×VCC, creating a minimum 0.3×VCC noise margin. This rejects transient spikes and slow-rising interference that would cause multiple toggles on standard CMOS inputs with single threshold near VCC/2.

Can this device drive a 50 pF capacitive load reliably?

Yes-though not characterized in datasheet beyond 30 pF, the output driver maintains VOL ≤ 0.50 V at 4 mA sink current. At 50 pF, propagation delay increases predictably (~+30 % vs. 30 pF case), and dynamic power rises linearly with CPD × VCC² × f; no instability or ringing occurs.

74AUP1G02GF,132 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Logic Type:
NOR Gate
Number of Circuits:
1
Number of Inputs:
2
Features:
-
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
4mA, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
6.4ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON, SOT891 (1x1)

74AUP1G02GF,132 FAQ

1.How can I place an order for 74AUP1G02GF,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G02GF,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G02GF,132 reliable?

The price and inventory of 74AUP1G02GF,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G02GF,132 is usually 5 days.

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We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G02GF,132 transactions.

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4.How is shipping managed for 74AUP1G02GF,132?

74AUP1G02GF,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP1G02GF,132 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1G02GF,132?

For technical support, including 74AUP1G02GF,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G02GF,132 requirements.

6.How does Aetrix verify that 74AUP1G02GF,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G02GF,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G02GF,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1G02GF,132?

All 74AUP1G02GF,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G02GF,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G02GF,132 part is unused and in its original packaging.

Return procedure for 74AUP1G02GF,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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