Nexperia USA Inc. 74AUP1G02GX,125

Overview

74AUP1G02GX,125 from Nexperia is a single 2-input NOR gate logic IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering propagation delay as low as 0.8 ns (VCC = 3.0–3.6 V, CL = 5 pF), ICC ≤ 1.4 μA max at −40 °C to +125 °C, and IOFF-enabled partial power-down protection. It is used in level-shifting, noise-immune signal conditioning, and battery-powered interface logic.

For engineers reviewing the 74AUP1G02GX,125 datasheet, 74AUP1G02GX,125 pinout, 74AUP1G02GX,125 application, or 74AUP1G02GX,125 equivalent, this device supports ultra-low-voltage operation down to 0.8 V, offers guaranteed I/O overvoltage tolerance to 3.6 V, and provides thermal-enhanced X2SON5 packaging for high-density PCB layouts in space-constrained industrial and portable systems.

Technical Context

This device implements standard CMOS NOR logic with Schmitt-trigger input thresholds-VIH ≥ 0.65×VCC and VIL ≤ 0.35×VCC across most VCC ranges-enabling robust noise immunity against slow-rising signals. Its IOFF circuit actively disables outputs during power-down, preventing backflow current when VCC = 0 V.

Designed for wide-VCC compatibility, it meets JEDEC standards JESD8-12 through JESD8-B and delivers consistent timing performance across −40 °C to +125 °C ambient, with tpd ≤ 4.4 ns (max) at VCC = 3.0–3.6 V and CL = 5 pF under extended temperature conditions.

Key Specifications

Pinout & Package

X2SON5 package (SOT1226-3): plastic thermal-enhanced extremely thin small outline, no leads, 5 terminals, body size 0.8 × 0.8 × 0.32 mm, side-wettable flanks not present (distinguishes from GZ variant), footprint compatible with reflow soldering and AOI inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NOR gate applications.

Compared with 74LVC1G02GW,125 and SN74AUP1G02DBVR, the 74AUP1G02GX,125 uniquely combines Schmitt-trigger inputs, X2SON5 thermal performance, and sub-1-μA ICC at 125 °C - making it optimal for miniaturized, noise-prone, and battery-critical designs where reliability trumps lowest unit cost.

Availability

74AUP1G02GX,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical devices, automotive body control modules, and smart home hub signal routing requiring stable component supply across extended temperature and low-power constraints.

Supply support for 74AUP1G02GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for power, space, and reliability in mass-market electronics.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and thermally constrained applications, emphasizing sub-1-V operation, ultra-low static current, and robust signal integrity across mixed-voltage systems.

FAQ

Does 74AUP1G02GX,125 support true 0.8 V operation with full timing guarantees?

Yes. The datasheet specifies propagation delay, VIH/VIL thresholds, and VOH/VOL levels down to VCC = 0.8 V at Tamb = −40 °C to +125 °C, with tpd ≤ 17.0 ns (typ) and VIH ≥ 0.70×VCC. This enables direct integration with energy-harvesting PMUs and sub-1-V microcontrollers without level translation.

Can inputs be driven above VCC without damage or functional disruption?

Yes. Inputs tolerate voltages up to 3.6 V regardless of VCC value, per Absolute Maximum Ratings and verified in Recommended Operating Conditions. This allows safe interfacing with 3.3 V GPIOs while the device runs at 1.2 V, eliminating external clamping diodes or resistors.

How does the IOFF feature behave when VCC is ramping during power-up or power-down?

IOFF activates automatically when VCC falls below ~0.2 V, disabling the output stage before supply collapse. During power-up, outputs remain high-impedance until VCC exceeds ~0.5 V, preventing bus contention. This behavior is characterized in ΔIOFF and IOFF test conditions across temperature.

Is the X2SON5 (SOT1226-3) package compatible with standard reflow profiles and automated optical inspection?

Yes. SOT1226-3 has documented lead-free reflow compatibility (J-STD-020), coplanarity < 0.05 mm, and visible pin-1 marking per JEDEC MO-252. Its 0.8 mm × 0.8 mm body and 0.5 mm pitch allow reliable placement with ±25 μm accuracy and clear AOI contrast against solder mask.