Diodes Incorporated 74AUP1G04FW4-7

Overview

74AUP1G04FW4-7 from Diodes Incorporated is a single CMOS inverter gate with push-pull output, designed for ultra-low-power operation across 0.8V–3.6V supply rails. It features IOFF partial power-down protection, ±4 mA output drive at 3.0V, <0.9 µA static ICC, and Schmitt-trigger input hysteresis (250 mV typical at VCC = 3.0V), enabling robust signal conditioning in battery-powered portable electronics.

For engineers reviewing the 74AUP1G04FW4-7 datasheet, 74AUP1G04FW4-7 pinout, 74AUP1G04FW4-7 application, or 74AUP1G04FW4-7 equivalent, this device is selected for low-voltage logic inversion where supply flexibility, sub-µA quiescent current, and I/O isolation during power sequencing are critical design requirements.

Technical Context

The 74AUP1G04FW4-7 implements a standard positive Boolean inverter function (Y = A̅) using advanced ultra-low-power CMOS process technology. Its IOFF circuit actively disables outputs during power-down to prevent backflow current, supporting mixed-voltage system partitioning and hot-swap capability.

Input Schmitt-trigger action provides 250 mV typical hysteresis at 3.0V, tolerating slow-rising/falling signals without oscillation. Propagation delay is 2.1 ns (typical, CL = 5 pF, VCC = 1.2V) and scales predictably with supply voltage and load capacitance up to 30 pF.

Key Specifications

Pinout & Package

X2-DFN1010-6 package: 1.0 mm × 1.0 mm × 0.4 mm body, 0.35 mm pad pitch, no leads, bottom thermal pad (non-electrical), RoHS-compliant matte tin finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar single inverter applications.

Compared with SN74LVC1G04DBVR and 74LVC1G14GW,125, the 74AUP1G04FW4-7 uniquely combines ultra-low ICC, IOFF, and Schmitt input in a 1.0 mm × 1.0 mm footprint-making it optimal for battery-critical, multi-rail, and noise-prone portable designs where all three features are concurrently required.

Availability

74AUP1G04FW4-7 is available at Aetrix Electronics and suitable for smartphone power sequencing, IoT sensor node signal conditioning, wearable battery monitoring, and USB-C port configuration logic requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G04FW4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and precision timing solutions for consumer, industrial, and automotive markets.

The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-µA static current and wide supply flexibility to extend battery life in space-constrained devices such as wearables, medical sensors, and handheld computing platforms.

FAQ

What is the maximum capacitive load the 74AUP1G04FW4-7 can drive while maintaining specified propagation delay?

The device is characterized up to 30 pF load capacitance, with tPD = 2.1 ns (typical) at CL = 5 pF and VCC = 1.2 V. At CL = 30 pF, tPD increases to 4.0 ns (typical) under same conditions. Driving loads beyond 30 pF may cause excessive delay or edge degradation due to limited ±4 mA output drive strength.

Can the NC pins on the X2-DFN1010-6 package be grounded or left floating?

Per Diodes datasheet DS35147 Rev. 5–2, pins 3 and 6 are explicitly designated "No Connection" and must remain unconnected-neither grounded nor tied to VCC. Internal connection is absent; grounding them risks unintended parasitic coupling or violates JEDEC DFN layout guidelines.

Does the 74AUP1G04FW4-7 support operation at 0.8 V with full logic functionality?

Yes: all electrical characteristics-including VIH/VIL thresholds, output drive, and propagation delay-are fully specified down to 0.8 V. At this voltage, VOH ≥ VCC – 0.1 V and VOL ≤ 0.1 V, with tPD = 16.0 ns (typical, CL = 5 pF), enabling reliable operation from single alkaline or NiMH cells.

How does the IOFF feature behave when VCC is ramping during power-up?

IOFF activates when VCC falls below ~0.2 V and remains active until VCC exceeds ~0.6 V. During ramp-up, outputs stay disabled until VCC crosses the IOFF release threshold, preventing glitch generation or bus contention. This behavior is verified across –40°C to +125°C per datasheet Section 6.