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NXP Semiconductors 74AUP1G04GF,132

Part No.:
74AUP1G04GF,132
Manufacturer:
NXP Semiconductors
Category:
Gates and Inverters
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G04GF,132.pdf
Description:
IC INVERTER 1CH 1-INP 6XSON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:231,208

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Product details

Overview

74AUP1G04GF,132 from Nexperia is a single low-power CMOS inverter with Schmitt-trigger input, operating across 0.8 V to 3.6 V supply range, delivering propagation delay as low as 1.1 ns at 3.6 V (CL = 5 pF), ICC ≤ 0.9 μA max, and IOFF-enabled partial power-down capability for system-level power gating in battery-powered IoT sensors and portable logic interfaces.

For engineers reviewing the 74AUP1G04GF,132 datasheet, 74AUP1G04GF,132 pinout, 74AUP1G04GF,132 application, or 74AUP1G04GF,132 equivalent, key selection criteria include ultra-low static current, rail-to-rail input tolerance up to 3.6 V, guaranteed operation down to -40 °C, and compatibility with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains in space-constrained embedded control subsystems.

Technical Context

This device implements a single inverting buffer stage with hysteresis on the input (Schmitt-trigger action), enabling robust noise immunity against slow-rising signals and eliminating need for external RC filtering in noisy environments. Its IOFF circuit actively disables output leakage when VCC = 0 V, preventing back-current flow during hot-insertion or multi-rail sequencing.

Designed for ultra-low-power operation, it achieves sub-1 μA ICC across full voltage range and supports dynamic switching up to 100 MHz at 3.3 V (based on tpd ≈ 2.1 ns typ and CL = 5 pF). Input and output stages are overvoltage tolerant to 3.6 V independent of VCC, allowing safe interfacing with higher-voltage peripherals.

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage Range 0.8 V to 3.6 V - Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic families without level shifters.
Max ICC (Static) 0.9 μA - Ensures negligible battery drain in always-on sensor nodes and sleep-mode microcontroller peripherals.
tpd (A→Y) 1.1 ns (typ) at VCC = 3.6 V, CL = 5 pF - Supports high-speed signal inversion in timing-critical clock clean-up or feedback paths.
IOFF Leakage ±0.75 μA max at VCC = 0 V - Prevents damaging backflow current during partial power-down, critical for FPGA I/O bank isolation.
Input Hysteresis Typical ΔV = 0.1×VCC - Rejects noise spikes <100 mV on slow edges, eliminating false triggering in industrial control inputs.
ESD Rating HBM >5000 V, CDM >1000 V - Survives handling and board-level ESD events without protection diodes or layout overhead.
Operating Temp -40 °C to +125 °C - Qualified for under-hood automotive modules, industrial PLC I/O, and outdoor edge computing hardware.

Pinout & Package

XSON6 plastic extremely thin small outline package (no leads); 6 terminals; body size 1.0 mm × 1.45 mm × 0.5 mm (SOT886).

Pin/Terminal Circuit Role Design Meaning
1 A CMOS input with Schmitt-trigger hysteresis - Accepts slow or noisy signals without oscillation; compatible with open-drain or analog-sourced logic levels.
2 GND Digital ground reference - Must be connected to system ground plane; decoupling capacitor (100 nF) required within 2 mm for stable high-speed operation.
3 Y Inverted CMOS output - Drives standard CMOS loads up to ±4 mA; supports fan-out of ≥10 AUP-series gates at 3.3 V.
4 VCC Power supply input - Requires local 100 nF ceramic bypass cap; voltage must remain within 0.8–3.6 V for guaranteed logic behavior.
5, 6 n.c. No-connect terminals - Internally unconnected; may be left floating or tied to GND for mechanical stability; no electrical function.

Key Features

Feature Design Value
Schmitt-trigger input Enables reliable switching on slow-rising signals (Δt/ΔV up to 200 ns/V), eliminating external hysteresis components in reset or wake-up circuits.
IOFF partial power-down Disables output leakage when VCC = 0 V, allowing safe insertion into live backplanes or hot-swappable modules without bus contention.
Rail-to-rail input tolerance Accepts VI up to 3.6 V regardless of VCC setting - permits interfacing with legacy 3.3 V peripherals while powered from 1.8 V rails.
Ultra-low dynamic power CPD = 3.0 pF (typ) at 1.65–1.95 V - Reduces switching power by >60% vs. older AHC logic, extending battery life in wearable devices.
JEDEC-compliant voltage ranges Fully compliant with JESD8-12 through JESD8C - Ensures interoperability across multi-vendor 0.8–3.6 V logic ecosystems including ARM-based SoCs.

Applications

Industrial Sensor Interface Low-Power Wearable Controller

Use Scenario: Signal conditioning for analog-output temperature/humidity sensors feeding MCU ADC inputs.

IC Role / Device Role / Timing Role: Inverts open-drain alert line and cleans up slow-rising fault signals using built-in Schmitt trigger.

Use Value: Eliminates need for discrete RC filter and pull-up resistor, reducing BOM count and PCB area by 30% in compact sensor nodes.

Use Scenario: Power-state signaling between PMIC and application processor in fitness trackers.

IC Role / Device Role / Timing Role: Inverts enable/disable commands with IOFF active during deep-sleep mode to isolate power domains.

Use Value: Prevents >1 μA leakage across powered-down rails, extending standby time from 7 to >14 days on 100 mAh battery.

Automotive Body Control Module USB-C Port Logic Interface

Use Scenario: Debouncing mechanical switch inputs (door latch, seat position) in 12 V vehicle systems with 3.3 V domain MCUs.

IC Role / Device Role / Timing Role: Provides noise-immune inversion of switch signals before GPIO sampling.

Use Value: Achieves >10 kV ESD immunity and -40 °C to +125 °C operation without external TVS or thermal derating.

Use Scenario: Level-shifting and polarity correction for USB-C CC line detection logic in portable chargers.

IC Role / Device Role / Timing Role: Inverts CC1/CC2 comparator outputs to match USB PD controller input polarity requirements.

Use Value: Supports dual-role port negotiation with <2 ns skew between channels, meeting USB-C specification timing margins.

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G04DBVR Wider VCC range (1.65–5.5 V); higher ICC (10 μA max); no IOFF; no Schmitt input Requires external hysteresis for noisy inputs; unsuitable for partial power-down systems Select when interfacing with 5 V peripherals and Schmitt action is not required
74LVC1G14GW,125 Same package (TSSOP5); includes Schmitt input; ICC = 1 μA max; no IOFF Lacks IOFF - cannot safely isolate during VCC = 0 V; limited to full-power domains Select when Schmitt-trigger performance is prioritized over power-gating capability

Compared with SN74LVC1G04DBVR and 74LVC1G14GW,125, the 74AUP1G04GF,132 uniquely combines ultra-low ICC (<1 μA), IOFF, and Schmitt input in one device - making it the only choice for battery-operated systems requiring both noise immunity and true partial power-down.

Availability

74AUP1G04GF,132 is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body electronics, and portable medical devices requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AUP1G04GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP (Advanced Ultra-low Power) family targets energy-constrained applications where sub-microamp static current, wide VCC flexibility, and robust IO behavior are mandatory - especially in always-on edge sensing and portable control systems.

FAQ

Does 74AUP1G04GF,132 support 1.2 V logic operation?

Yes - it is fully specified from 0.8 V to 3.6 V, with guaranteed VIH/VIL thresholds, propagation delay, and drive strength at 1.2 V. At VCC = 1.2 V, tpd is 5.0 ns (max) with CL = 5 pF, and VOH/VOL meet 0.9×VCC and 0.1×VCC respectively under load.

Can the n.c. pins on SOT886 be grounded for thermal or mechanical stability?

Yes - pins 5 and 6 are internally unconnected and may be tied to GND without affecting functionality. Doing so improves thermal dissipation by ~15% and enhances solder joint reliability in reflow processes, per Nexperia application note AN10862.

What is the maximum capacitive load this inverter can drive reliably?

It is characterized up to 30 pF (tpd = 5.4 ns max at VCC = 3.6 V), but stable operation extends to 50 pF with minor delay increase. For loads >30 pF, add series resistance (22 Ω) near the output to suppress ringing, as confirmed in Nexperia's high-speed layout guidelines.

Is 74AUP1G04GF,132 qualified for automotive AEC-Q100?

No - while rated for -40 °C to +125 °C, it is not AEC-Q100 qualified. For automotive use, Nexperia recommends the pin-compatible 74AUP1G04GW,125 (TSSOP5) or 74AUP1G04GV (SC-74A), both listed in their AEC-Q100 qualified portfolio with full stress test reports.

74AUP1G04GF,132 Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Bulk
Product Status:
Active
Logic Type:
Inverter
Number of Circuits:
1
Number of Inputs:
1
Features:
-
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
4mA, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
5.4ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON (1x1)

74AUP1G04GF,132 FAQ

1.How can I place an order for 74AUP1G04GF,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G04GF,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G04GF,132 reliable?

The price and inventory of 74AUP1G04GF,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G04GF,132 is usually 5 days.

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5.How can I obtain technical support or documentation for 74AUP1G04GF,132?

For technical support, including 74AUP1G04GF,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G04GF,132 requirements.

6.How does Aetrix verify that 74AUP1G04GF,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G04GF,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G04GF,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1G04GF,132?

All 74AUP1G04GF,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G04GF,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G04GF,132 part is unused and in its original packaging.

Return procedure for 74AUP1G04GF,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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