Nexperia USA Inc. 74AUP1G04GM,115

Overview

74AUP1G04GM,115 from Nexperia is a single CMOS low-power inverter with Schmitt-trigger input, operating across 0.8 V to 3.6 V supply, delivering 1.1 ns propagation delay at 3.0 V (CL = 5 pF), <0.9 μA max ICC, and IOFF-enabled partial power-down capability for system-level power gating in battery-powered IoT sensors and portable logic interfaces.

For engineers reviewing the 74AUP1G04GM,115 datasheet, 74AUP1G04GM,115 pinout, 74AUP1G04GM,115 application, or 74AUP1G04GM,115 equivalent, this device supports ultra-low-voltage logic translation, noise-immune signal conditioning, and rail-to-rail input tolerance up to 3.6 V - critical for mixed-supply microcontroller GPIO interfacing and always-on sensor wake-up circuits.

Technical Context

This device implements a single-stage inverting buffer with hysteresis on the input (Schmitt-trigger), enabling robust operation with slow-rising signals and eliminating contact bounce or EMI-induced glitches across its full 0.8–3.6 V VCC range. Its IOFF circuit actively isolates I/O terminals when VCC = 0 V, preventing back-current flow during hot-insertion or partial system shutdown.

Designed for sub-1-V operation, it maintains VIH/VIL thresholds scaled to VCC (e.g., VIH = 0.75×VCC min at −40 °C to +125 °C), while dynamic performance is characterized at CL = 5–30 pF and ambient temperatures up to +125 °C - confirming suitability for automotive body electronics and industrial edge nodes.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); 6-terminal, leadless, 1.0 mm × 1.45 mm × 0.5 mm body; side-wettable flanks not present; thermal pad absent.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter applications.

Compared with SN74LVC1G04DBVR and 74LVC1G14GW,125, the 74AUP1G04GM,115 uniquely combines sub-1-V operation, Schmitt input, IOFF, and <1.5 μA ICC - making it the sole choice for energy-constrained, mixed-voltage, and hot-plug-safe designs.

Availability

74AUP1G04GM,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable device power sequencing, automotive body control modules, and IoT edge node wake-up circuits requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G04GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.

The 74AUP (Advanced Ultra-low-power) product line targets ultra-low-voltage, low-power logic functions for battery-operated and energy-harvesting systems - emphasizing sub-1-V operation, nanowatt static consumption, and robust IO architecture.

FAQ

Can 74AUP1G04GM,115 be used with a 0.8 V supply and still meet timing specs?

Yes. The datasheet specifies tpd ≤16.0 ns at VCC = 0.8 V (CL = 5 pF, Tamb = 25 °C) and confirms functional operation down to 0.8 V across −40 °C to +125 °C. Input thresholds scale with VCC (VIH ≥0.75×VCC), ensuring valid logic levels even at minimum supply.

What is the purpose of the two n.c. pins on the SOT886 package?

Pins 2 and 4 are unconnected - no internal die connection exists. They serve mechanical stability and thermal dissipation in the XSON6 package but must remain floating per design; soldering them to ground or VCC violates the absolute maximum ratings and may cause parametric shift or failure.

Does the IOFF feature protect against back-current when only VCC is powered down?

Yes. When VCC = 0 V, the IOFF circuit disables both input and output buffers, limiting VI/O leakage to ±0.75 μA max (−40 °C to +125 °C). This prevents damaging reverse current from powered downstream logic (e.g., 3.3 V bus) into the unpowered device.

Is the 74AUP1G04GM,115 compatible with 3.6 V-tolerant I/O in mixed-voltage systems?

Yes. Inputs tolerate up to 3.6 V regardless of VCC (e.g., VCC = 1.2 V), allowing safe connection to higher-voltage buses. Outputs swing rail-to-rail (VOL ≤0.5 V at 4 mA, VOH ≥2.3 V at −40 °C to +125 °C), supporting interoperability with 3.3 V logic families.