Nexperia USA Inc. 74AUP1G04GN,132

Overview

74AUP1G04GN,132 from NXP Semiconductors is a single unbuffered inverter gate operating at 0.8–3.6 V supply, with 2.9 ns typical propagation delay at 3.3 V, 3 µA max ICC at 3.3 V, and ±20 mA output drive capability. It serves as a logic-level shifter and signal inverter in low-power portable interface circuits.

For engineers reviewing the 74AUP1G04GN,132 datasheet, 74AUP1G04GN,132 pinout, 74AUP1G04GN,132 application, or 74AUP1G04GN,132 equivalent, key selection criteria include ultra-low static current, rail-to-rail input compatibility, guaranteed monotonicity across voltage range, and operation down to 0.8 V for battery-powered sensor nodes.

Technical Context

This device belongs to the 74AUP (Advanced Ultra-low Power) family, designed for sub-1-V operation while maintaining TTL-compatible thresholds. It uses silicon-on-insulator (SOI) CMOS process to achieve near-zero dynamic switching current and reduced capacitive loading.

The inverter implements complementary MOS topology with matched P/N transistor sizing to ensure symmetrical rise/fall times (<1.8 ns) and minimal propagation delay skew. Input hysteresis is absent-enabling clean inversion of slowly ramping signals only when buffered externally.

Key Specifications

Pinout & Package

Supplied in a 6-pin XSON6 (1.45 × 1.0 mm, 0.5 mm pitch) leadless package with wettable flank terminations for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter gate applications.

Compared with SN74LVC1G04DBVR and 74LVC1G04GW,125, the 74AUP1G04GN,132 delivers lowest ICC and widest sub-1-V operability - critical for energy-constrained edge nodes where every nanoamp matters and supply headroom is minimal.

Availability

74AUP1G04GN,132 is available at Aetrix Electronics and suitable for wearable electronics, automotive body controllers, and smart utility metering requiring stable component supply over extended product lifecycles.

Supply support for 74AUP1G04GN,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.

The 74AUP logic family targets ultra-low-power portable and battery-operated applications, emphasizing sub-1-V operation, nanowatt static consumption, and robust performance across wide temperature ranges.

FAQ

Is 74AUP1G04GN,132 compatible with 1.2 V supply rails?

Yes. The device is fully specified from 0.8 V to 3.6 V, including guaranteed functionality at 1.2 V. Propagation delay increases to 12.5 ns and output drive reduces to ±8 mA at that voltage, but all AC/DC parameters remain within datasheet limits.

Does this inverter include Schmitt-trigger inputs?

No. The 74AUP1G04GN,132 has standard CMOS input thresholds (VIL = 0.3×VCC, VIH = 0.7×VCC) without hysteresis. For noisy signal environments, external RC filtering or a dedicated Schmitt-trigger device such as 74AUP2G14 must be used.

Can multiple 74AUP1G04GN,132 outputs be wire-OR'd?

No. The device features a push-pull output stage, not open-drain. Direct wire-OR connection risks shoot-through current and potential damage. For wired-logic functions, use open-drain buffers like 74AUP1G07 or add external diodes with pull-up resistors.

What is the maximum capacitive load this inverter can drive reliably?

The device is characterized up to 50 pF load capacitance. At 30 pF and 3.3 V, tPLH/tPHL is 2.9 ns. Driving >50 pF may increase propagation delay nonlinearly and degrade edge monotonicity; for heavier loads, consider adding a buffer stage or reducing trace length.