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Nexperia USA Inc. 74AUP1G04GW,125
- Part No.:
- 74AUP1G04GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G04GW,125.pdf
- Description:
- IC INVERTER 1CH 1-INP 5TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:11,150
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Product details
Overview
74AUP1G04GW,125 from Nexperia is a single CMOS low-power inverter with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply voltage, delivering propagation delay as low as 1.1 ns at 3.6 V (CL = 5 pF), ICC ≤ 0.9 μA max, and IOFF-enabled partial power-down capability for system-level power gating in battery-powered IoT sensor nodes.
For engineers reviewing the 74AUP1G04GW,125 datasheet, 74AUP1G04GW,125 pinout, 74AUP1G04GW,125 application, or 74AUP1G04GW,125 equivalent, key selection criteria include ultra-low static current, rail-to-rail input tolerance up to 3.6 V, guaranteed operation down to 0.8 V, Schmitt-trigger noise immunity in noisy environments, and TSSOP5 package compatibility with high-density PCB layouts.
Technical Context
This device implements a single-stage inverting logic gate with hysteresis on the input stage, enabling robust signal conditioning of slow-rising or noisy digital signals without external RC filtering. Its IOFF circuit actively disables output leakage when VCC = 0 V, preventing backflow current during hot-swap or multi-rail sequencing.
The AUP family uses advanced silicon process optimization to achieve sub-1 μA ICC across full temperature range (–40 °C to +125 °C) while maintaining consistent VIH/VIL thresholds and propagation delay performance across 0.8–3.6 V VCC - critical for mixed-voltage interface bridging between legacy 1.2 V/1.8 V and modern 3.3 V subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - supports direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC | 0.9 μA at VCC = 0.8–3.6 V - enables >10-year battery life in always-on sensor wake-up circuits. |
| tpd (VCC = 3.6 V) | 1.1–3.2 ns (CL = 5–30 pF) - ensures timing-critical signal inversion with minimal latency in clock/data path buffering. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents cross-rail current injection during partial power-down in modular embedded systems. |
| Input Hysteresis | Typ. 100 mV - rejects EMI-induced glitches on long traces or unshielded cables in industrial control I/O. |
| ESD Rating | HBM >5000 V, CDM >1000 V - withstands handling and board assembly without special ESD precautions. |
| Operating Temp | –40 °C to +125 °C - qualified for under-hood automotive, industrial motor drives, and outdoor edge computing. |
Pinout & Package
TSSOP5 plastic thin shrink small outline package (SOT353-1), 5-lead, body width 1.25 mm, lead pitch 0.65 mm, exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | n.c. | No internal connection - electrically isolated; may be used for mechanical anchoring or thermal relief. |
| 2 | A | Inverting logic input with Schmitt-trigger hysteresis - accepts slow edges and rejects noise below threshold window. |
| 3 | GND | Ground reference (0 V) - must be low-impedance return path for both input and output current. |
| 4 | Y | Inverted logic output - drives capacitive loads up to 30 pF with guaranteed VOH/VOL across full VCC and temperature range. |
| 5 | VCC | Positive supply rail - powers internal logic and output stage; supports dynamic voltage scaling from 0.8 V. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger input | Enables reliable signal recovery from degraded waveforms (e.g., RC-filtered reset lines or long PCB traces). |
| IOFF partial power-down | Allows safe isolation of powered-down subsystems without disrupting active rails - essential for domain-based power management. |
| Overvoltage-tolerant inputs | Accepts up to 3.6 V regardless of VCC setting - simplifies mixed-voltage interconnect where input sources exceed local VCC. |
| Ultra-low ICC | ≤0.9 μA max across –40 °C to +125 °C - eliminates need for external enable/disable control in always-on monitoring functions. |
| JEDEC-compliant voltage ranges | Fully compliant with JESD8-12 through JESD8C - ensures interoperability with industry-standard 0.8–3.6 V logic families. |
Applications
| Industrial Sensor Interface | Low-Power Wearable Reset Circuit |
|---|---|
|
Use Scenario: Signal conditioning of analog sensor output fed into comparator with slow rise time due to RC filtering. IC Role / Device Role / Timing Role: Inverting buffer with Schmitt-trigger input cleans up noisy or sluggish comparator output before MCU GPIO capture. Use Value: Eliminates external hysteresis resistor network, reduces BOM count by one passive, and improves EMI resilience in factory-floor environments. |
Use Scenario: Debounced power-on reset generation for BLE SoC in fitness tracker with coin-cell battery. IC Role / Device Role / Timing Role: Inverter with IOFF isolates reset line during deep-sleep mode when main VCC is gated off. Use Value: Prevents leakage-induced premature wake-up; extends shelf life and operational runtime beyond 2 years on CR2032. |
| Automotive Body Control Module | USB-C Power Delivery Sequencing |
|
Use Scenario: Level translation and noise filtering for LIN bus wake-up signal routed across chassis harness. IC Role / Device Role / Timing Role: Single inverter bridges 12 V LIN transceiver output to 3.3 V microcontroller input with overvoltage tolerance. Use Value: Withstands load-dump transients up to 3.6 V on input while operating from 3.3 V rail - no external clamping diodes required. |
Use Scenario: Controlled enable/disable of USB-C VCONN power path during PD contract negotiation. IC Role / Device Role / Timing Role: Inverter toggles high-side load switch gate with precise timing and zero static current during negotiation idle state. Use Value: Reduces standby power by 0.9 μA per channel versus standard logic gates - critical for meeting USB-IF energy efficiency certification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G04DBVR | Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; no Schmitt input | Requires external hysteresis for noisy inputs; unsuitable for <1.65 V systems or partial power-down | Select when interfacing with 5 V legacy peripherals and noise environment is controlled. |
| 74LVC1G14GW,125 | Same package and pinout; includes Schmitt-trigger but higher ICC (2 μA max); no IOFF | Provides stronger hysteresis (≈250 mV) but cannot isolate powered-down sections | Select when enhanced noise margin is prioritized over zero-leakage power gating. |
Compared with SN74LVC1G04DBVR and 74LVC1G14GW,125, the 74AUP1G04GW,125 uniquely combines sub-μA static current, Schmitt-trigger input, and IOFF - making it the only choice for ultra-low-power, mixed-voltage, and hot-swap-safe inverter applications.
Availability
74AUP1G04GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body electronics, and USB-C power delivery sequencing requiring stable component supply across extended temperature and long product lifecycles.
Supply support for 74AUP1G04GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.
The AUP (Advanced Ultra-low Power) logic family targets battery-constrained and thermally sensitive applications, delivering nanowatt static power with full-speed functionality across wide voltage and temperature ranges.
FAQ
Does 74AUP1G04GW,125 support operation at 0.8 V with full timing guarantees?
Yes. The datasheet specifies tpd ≤ 16.0 ns (CL = 5 pF) and VIH/VIL thresholds scaled to VCC at 0.8 V, with ICC ≤ 0.9 μA max across –40 °C to +125 °C. This enables use in energy-harvesting systems where supply voltage drops near minimum specification.
Can pin 1 (n.c.) be connected to GND or left floating in PCB layout?
Pin 1 is internally unconnected and may be left floating or tied to GND for mechanical stability or thermal relief. It carries no electrical function and does not affect logic behavior, timing, or ESD performance.
What is the maximum capacitive load this inverter can drive while maintaining VOL ≤ 0.45 V at VCC = 3.0 V?
At VCC = 3.0 V and IO = 4.0 mA, VOL is guaranteed ≤ 0.45 V per datasheet Table 7. With typical CO = 1.7 pF and CL ≤ 30 pF, the device maintains timing integrity and output swing within spec - verified up to 30 pF load in dynamic characterization.
How does the IOFF feature behave when VCC ramps from 0 V to nominal during power-up?
IOFF activates when VCC falls below ~0.2 V and remains active until VCC exceeds ~0.4 V. During this transition, output leakage is limited to ±0.75 μA, preventing unintended current flow into downstream circuits before power stabilization.
74AUP1G04GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G04GW,125 FAQ
1.How can I place an order for 74AUP1G04GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G04GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G04GW,125 reliable?
The price and inventory of 74AUP1G04GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G04GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G04GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G04GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G04GW,125?
74AUP1G04GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G04GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G04GW,125?
For technical support, including 74AUP1G04GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G04GW,125 requirements.
6.How does Aetrix verify that 74AUP1G04GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G04GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G04GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G04GW,125?
All 74AUP1G04GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G04GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G04GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G04GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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