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Nexperia USA Inc. 74AUP1G04GW-Q100H
- Part No.:
- 74AUP1G04GW-Q100H
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G04GW-Q100H.pdf
- Description:
- IC INVERTER 1CH 1-INP 5TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:6,903
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Product details
Overview
74AUP1G04GW-Q100 from Nexperia is an automotive-grade single CMOS inverter with Schmitt-trigger input, operating across 0.8 V–3.6 V supply, delivering <0.9 μA max ICC at 25 °C, <3.2 ns propagation delay at 3.6 V/CL=5 pF, and IOFF-enabled partial power-down protection. It serves as a noise-immune signal inversion stage in automotive body control modules, sensor interface conditioning, and low-voltage microcontroller I/O buffering.
For engineers reviewing the 74AUP1G04GW-Q100 datasheet, 74AUP1G04GW-Q100 pinout, 74AUP1G04GW-Q100 application, or 74AUP1G04GW-Q100 equivalent, this page delivers verified AEC-Q100 Grade 1 specifications, TSSOP5 (SOT353-1) package mapping, functional truth table, and real-world automotive use context - all extracted from Nexperia's Rev. 5 product data sheet dated 20 September 2024.
Technical Context
This device implements a single unbuffered inverter gate with Schmitt-trigger input hysteresis, enabling robust operation with slow-rising/falling signals across its full 0.8 V–3.6 V VCC range. Its IOFF circuit actively disables output leakage when VCC = 0 V, preventing backflow current during partial system power-down.
It complies with JEDEC standards JESD8-12 through JESD8C for voltage-tiered logic compatibility and meets AEC-Q100 Grade 1 requirements (−40 °C to +125 °C), with latch-up immunity >100 mA per JESD78B Class II and HBM ESD rating >5000 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.8 V to 3.6 V - supports direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC (25 °C) | 0.9 μA - enables ultra-low static power in always-on automotive subsystems like door module wake-up circuits |
| tpd @ 3.6 V / CL=5 pF | 3.2 ns - ensures timing-critical signal inversion within CAN/LIN bus interface timing budgets |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - guarantees safe hot-insertion and mixed-voltage domain isolation |
| Input Hysteresis | Typical ΔVIH/VIL ≈ 0.3×VCC - rejects EMI-induced glitches on long PCB traces in vehicle harnesses |
| Operating Temp | −40 °C to +125 °C - qualified for under-hood and cabin-mounted ECUs per AEC-Q100 Grade 1 |
| ESD Rating | HBM >5000 V, CDM >1000 V - withstands assembly handling and field electrostatic events in production environments |
Pinout & Package
TSSOP5 plastic thin shrink small outline package (SOT353-1), 5-lead, body width 1.25 mm, pin 1 index located at lower-left corner below marking "pC".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | n.c. | No internal connection - electrically isolated; no routing or termination required |
| 2 | A | Inverting logic input - accepts Schmitt-triggered signals up to 3.6 V regardless of VCC |
| 3 | GND | Ground reference - must be low-impedance return path for both logic and power currents |
| 4 | Y | Inverted logic output - drives capacitive loads ≤30 pF with guaranteed VOL ≤0.5 V at 4 mA sink |
| 5 | VCC | Supply voltage - powers internal circuitry; requires local 100 nF ceramic decoupling adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger input | Enables reliable switching with slow edges (Δt/ΔV up to 200 ns/V), eliminating need for external RC filtering in noisy automotive environments |
| IOFF partial power-down | Disables Y output and blocks backflow current when VCC = 0 V, supporting live insertion into powered-backplane systems |
| Wide VCC tolerance | Operates from 0.8 V (ultra-low-power sleep mode) to 3.6 V (full-speed operation), simplifying multi-rail power architecture design |
| AEC-Q100 Grade 1 qualification | Validated for −40 °C to +125 °C ambient operation with 1000-cycle temperature cycling and 1000-hour HTOL stress testing |
| Low dynamic power | CPD = 4.0 pF at 3.6 V - reduces switching power to <50 μW at 1 MHz with 15 pF load, critical for battery-backed modules |
Applications
| Body Control Module (BCM) | Infotainment System Interface |
|---|---|
Use Scenario: Signal inversion between 1.8 V microcontroller GPIO and 3.3 V display backlight enable line. IC Role / Device Role / Timing Role: Level-shifting inverter with Schmitt input rejecting PWM noise from adjacent motor drivers. Use Value: Eliminates external resistor divider and debounce circuitry while maintaining <3.2 ns propagation delay for responsive backlight control. |
Use Scenario: Inverting reset signal polarity from PMIC to SoC in head unit power sequencing. IC Role / Device Role / Timing Role: Single-gate logic inverter ensuring clean, glitch-free reset assertion during cold-start sequences. Use Value: IOFF prevents contention when PMIC powers down before SoC, avoiding latch-up risk during boot state transitions. |
| Door Module Sensor Conditioning | ADAS Camera Power Sequencing |
Use Scenario: Converting open-drain door ajar switch output to active-high logic for MCU interrupt input. IC Role / Device Role / Timing Role: Noise-immune signal conditioner with hysteresis suppressing contact bounce and harness EMI. Use Value: VIH/VIL thresholds scale with VCC, allowing direct use with 2.5 V MCU rail without external biasing resistors. |
Use Scenario: Inverting power-good signal from camera image sensor to enable/disable ISP power rail. IC Role / Device Role / Timing Role: Timing-critical inverter synchronizing dual-rail power-up sequence with <4.3 ns max tpd at 125 °C. Use Value: Guaranteed operation at +125 °C ambient ensures reliability in sealed camera housings exposed to solar loading. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G04DRYR | Non-automotive grade; rated −40 °C to +85 °C only; no AEC-Q100 qualification; IOFF not supported | Limited to cabin interior modules without under-hood thermal exposure or safety-critical sequencing | Select only for cost-sensitive non-safety applications where AEC-Q100 and extended temperature are not required |
| 74LVC1G04GV-Q100 | Same functionality and AEC-Q100 Grade 1 spec, but in SC-74A (SOT753) package - larger footprint, higher thermal resistance (3.8 mW/K derating above 85 °C) | Better suited for manual rework or high-reliability solder joints where TSSOP5 reflow yield is a concern | Prefer GW variant for space-constrained PCBs; choose GV only when thermal margin or assembly process favors SOIC-like packages |
Compared with SN74LVC1G04DRYR, the 74AUP1G04GW-Q100 adds AEC-Q100 Grade 1 qualification, IOFF, and −40 °C to +125 °C operation - essential for power sequencing in ADAS and powertrain systems. Against 74LVC1G04GV-Q100, it trades package size for superior thermal performance in dense layouts.
Availability
74AUP1G04GW-Q100 is available at Aetrix Electronics and suitable for automotive body control modules, infotainment interface design, and ADAS camera power sequencing requiring stable component supply across extended temperature ranges and AEC-Q100 compliance.
Supply support for 74AUP1G04GW-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, with core R&D and manufacturing in Europe and Asia.
The 74AUP (Advanced Ultra Low Power) logic family targets automotive and portable electronics requiring sub-μA static current, wide VCC flexibility, and robust noise immunity - designed specifically for energy-efficient ECU subsystems.
FAQ
Is the 74AUP1G04GW-Q100 pin-compatible with standard 74LVC1G04 packages?
Yes - it uses the same TSSOP5 (SOT353-1) footprint and pinout as 74LVC1G04DRYR and 74AHC1G04GW, with identical pin 1 indexing and mechanical dimensions. However, its Schmitt-trigger input and IOFF functionality provide enhanced noise immunity and power-down behavior not present in baseline LVC variants.
What is the maximum capacitive load this inverter can drive reliably?
The device is characterized up to 30 pF load capacitance across its full temperature and voltage range, with propagation delay specified at CL = 5, 10, 15, and 30 pF. Driving >30 pF may increase tpd beyond datasheet limits and raise dynamic power; for heavier loads, consider buffer-stage amplification or layout optimization to minimize trace capacitance.
Does the IOFF feature require external control or enable signals?
No - IOFF is fully automatic and requires no external control. When VCC drops to 0 V, the internal circuitry detects the condition and disables the output driver, blocking current flow regardless of input (A) or output (Y) voltage levels. This occurs inherently during system power-down without firmware or hardware intervention.
Can this inverter operate at 0.8 V supply while driving a 3.3 V-tolerant input?
Yes - its inputs are overvoltage tolerant to 3.6 V independent of VCC, so a 0.8 V-powered 74AUP1G04GW-Q100 can safely accept 3.3 V logic signals at pin A. The output Y swings rail-to-rail between GND and 0.8 V, making it suitable only for downstream 0.8 V–1.2 V receivers unless level translation is added.
74AUP1G04GW-Q100H Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G04GW-Q100H FAQ
1.How can I place an order for 74AUP1G04GW-Q100H through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G04GW-Q100H on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G04GW-Q100H reliable?
The price and inventory of 74AUP1G04GW-Q100H are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G04GW-Q100H is usually 5 days.
3.What payment methods are accepted for 74AUP1G04GW-Q100H?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G04GW-Q100H transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G04GW-Q100H?
74AUP1G04GW-Q100H orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G04GW-Q100H order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G04GW-Q100H?
For technical support, including 74AUP1G04GW-Q100H datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G04GW-Q100H requirements.
6.How does Aetrix verify that 74AUP1G04GW-Q100H is sourced from the original manufacturer or authorized distributors?
All 74AUP1G04GW-Q100H products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G04GW-Q100H meets industry standards.
7.What is the process for return or replacement of 74AUP1G04GW-Q100H?
All 74AUP1G04GW-Q100H units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G04GW-Q100H, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G04GW-Q100H part is unused and in its original packaging.
Return procedure for 74AUP1G04GW-Q100H:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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