Diodes Incorporated 74AUP1G06FW4-7

Overview

74AUP1G06FW4-7 from Diodes Incorporated is a single CMOS inverter with open-drain output, designed for ultra-low-power portable systems operating from 0.8V to 3.6V. It features IOFF partial power-down protection, ±4mA output drive at 3.0V, <0.9µA static supply current, and Schmitt-trigger inputs with ~250mV hysteresis at 3.0V - enabling robust interfacing in battery-powered GPS receivers and SSD power sequencing circuits.

For engineers reviewing the 74AUP1G06FW4-7 datasheet, 74AUP1G06FW4-7 pinout, 74AUP1G06FW4-7 application, or 74AUP1G06FW4-7 equivalent, key selection criteria include open-drain logic level translation across voltage domains, sub-1µA quiescent current in always-on subsystems, IOFF-enabled hot-swap capability, and verified operation down to 0.8V for energy harvesting interfaces.

Technical Context

This device implements a single inverting logic gate with open-drain output topology, requiring an external pull-up resistor to define high-level voltage and sink current only. Its IOFF circuit actively disables both input and output paths when VCC = 0V, preventing back-current flow during partial power-down sequences in multi-rail systems.

Schmitt-trigger inputs provide noise immunity with 250mV typical hysteresis at VCC = 3.0V, supporting slow-rising signals from mechanical switches or low-speed sensors. Propagation delay ranges from 0.8ns (min) to 7.2ns (max) at 3.3V with 30pF load, scaling predictably with supply voltage and capacitive loading.

Key Specifications

Pinout & Package

X2-DFN1010-6 package: 1.0mm × 1.0mm × 0.4mm body, 0.35mm pad pitch, no leads, exposed thermal pad not electrically connected.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.

Compared with SN74LVC1G06DPWR and 74LVC1G06GW,125, the 74AUP1G06FW4-7 uniquely delivers sub-1µA ICC, 0.8V operation, IOFF, and Schmitt inputs - making it the sole choice for battery-critical, multi-voltage, noise-prone portable subsystems.

Availability

74AUP1G06FW4-7 is available at Aetrix Electronics and suitable for SSD power sequencing, USB-C port control, portable GPS receiver reset management, and IoT sensor node wake-up circuits requiring stable component supply across extended temperature and low-voltage operation.

Supply support for 74AUP1G06FW4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and precision timing solutions for industrial, computing, and consumer markets.

The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-1µA static current and 0.8V operation to extend battery life in wearables, medical monitors, and energy-harvesting devices.

FAQ

What is the maximum capacitive load the 74AUP1G06FW4-7 can drive while maintaining specified propagation delay?

The datasheet specifies switching characteristics up to 30pF load capacitance across all VCC and temperature ranges. At 3.3V and 25°C, tPD remains ≤4.6ns (max) with 30pF. Driving >30pF increases delay nonlinearly and may exceed timing budgets in high-speed control loops - external buffer stages are recommended beyond this limit.

Can the NC pin (Pin 3) be connected to GND or left floating in PCB layout?

Pin 3 is internally unconnected with no bond wire. Diodes Incorporated recommends leaving it floating per AP02002 layout guidelines. Tying it to GND adds unnecessary parasitic capacitance and offers no electrical benefit; floating placement simplifies routing and avoids potential leakage paths in humid environments.

Does the IOFF feature activate automatically when VCC drops below a threshold, or does it require external control?

IOFF activates autonomously when VCC falls below ~0.2V - no external enable signal or biasing is needed. The internal circuitry detects VCC collapse and disables both input and output paths within nanoseconds, blocking reverse current regardless of input/output voltage states. This behavior is intrinsic to the AUP process design.

How does the Schmitt-trigger input affect compatibility with non-rail-to-rail analog sensor outputs?

The 250mV hysteresis at 3.0V provides noise margin against EMI and crosstalk but requires input signals to cross both VIH and VIL thresholds cleanly. For analog sensors with slow slew rates (<200 ns/V), the hysteresis prevents chatter; however, signals with amplitude <2× hysteresis may fail to register transitions - external amplification or comparator conditioning is advised in such cases.